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/linux/drivers/input/rmi4/
H A Drmi_f34v7.c37 f34->v7.in_bl_mode = status >> 7; in rmi_f34v7_read_flash_status()
38 f34->v7.flash_status = status & 0x1f; in rmi_f34v7_read_flash_status()
40 if (f34->v7.flash_status != 0x00) { in rmi_f34v7_read_flash_status()
42 __func__, f34->v7.flash_status, f34->v7.command); in rmi_f34v7_read_flash_status()
55 f34->v7.command = command; in rmi_f34v7_read_flash_status()
66 if (!wait_for_completion_timeout(&f34->v7.cmd_done, timeout)) { in rmi_f34v7_wait_for_idle()
87 if (f34->v7.flash_status != 0x00) in rmi_f34v7_check_command_status()
192 f34->v7.command = command; in rmi_f34v7_write_command()
241 if (f34->v7 in rmi_f34v7_write_partition_id()
[all...]
H A Drmi_f34.h34 /* F34 V7 defines */
54 /* F34 V7 commands */
84 /* F34 V7 partition IDs */
96 /* F34 V7 container IDs */
287 struct f34v7_data v7; member
/linux/drivers/media/platform/samsung/s5p-mfc/
H A Ds5p_mfc_opr.h42 void __iomem *dis_shared_mem_addr;/* only v7 */
64 void __iomem *d_min_num_dis;/* only v7 */
65 void __iomem *d_min_first_dis_size;/* only v7 */
66 void __iomem *d_min_second_dis_size;/* only v7 */
67 void __iomem *d_min_third_dis_size;/* only v7 */
68 void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */
69 void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */
70 void __iomem *d_post_filter_luma_dpb2;/* only v7 */
71 void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */
72 void __iomem *d_post_filter_chroma_dpb1;/* v7 an
[all...]
H A Dregs-mfc-v7.h3 * Register definition file for Samsung MFC V7.x Interface (FIMV) driver
14 /* Additional features of v7 */
17 /* Additional registers for v7 */
/linux/lib/crc/arm64/
H A Dcrc-t10dif-core.S230 CPU_LE( rev64 v7.16b, v7.16b )
238 CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 )
252 // While >= 128 data bytes remain (not counting v0-v7), fold the 128
253 // bytes v0-v7 into them, storing the result back into v0-v7.
258 fold_32_bytes \p, v6, v7
263 // Now fold the 112 bytes in v0-v6 into the 16 bytes in v7
[all...]
/linux/arch/arm64/crypto/
H A Daes-neonbs-core.S385 ld1 {v7.4s}, [x1], #16 // load round 0 key
402 tbl v7.16b ,{v17.16b}, v16.16b
405 cmtst v0.16b, v7.16b, v8.16b
406 cmtst v1.16b, v7.16b, v9.16b
407 cmtst v2.16b, v7.16b, v10.16b
408 cmtst v3.16b, v7.16b, v11.16b
409 cmtst v4.16b, v7.16b, v12.16b
410 cmtst v5.16b, v7.16b, v13.16b
411 cmtst v6.16b, v7.16b, v14.16b
412 cmtst v7
[all...]
H A Dsm4-ce-core.S68 sm4ekey v7.4s, v6.4s, v31.4s;
74 st1 {v4.16b-v7.16b}, [x1];
76 tbl v16.16b, {v7.16b}, v24.16b
122 ld1 {v4.16b-v7.16b}, [x2], #64;
124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
127 st1 {v4.16b-v7.16b}, [x1], #64;
231 ld1 {v4.16b-v7.16b}, [x2], #64
240 rev32 v15.16b, v7.16b
256 mov RIV.16b, v7.16b
439 inc_le128(v7) /*
[all...]
H A Daes-ce-ccm-core.S93 ld1 {v7.16b-v8.16b}, [x9]
97 tbl v1.16b, {v1.16b}, v7.16b /* move keystream to end of register */
98 eor v7.16b, v2.16b, v1.16b /* encrypt partial input block */
99 bif v2.16b, v7.16b, v22.16b /* select plaintext */
100 tbx v7.16b, {v6.16b}, v8.16b /* insert output from previous iteration */
104 st1 {v7.16b}, [x0] /* store output block */
H A Dsha3-ce-core.S47 ld1 { v4.1d- v7.1d}, [x8], #32
73 eor v7.8b, v7.8b, v25.8b
104 eor v7.8b, v7.8b, v25.8b
113 eor3 v27.16b, v2.16b, v7.16b, v12.16b
149 xar v26.2d, v7.2d, v26.2d, (64 - 6)
172 bcax v7.16b, v30.16b, v9.16b, v4.16b
192 st1 { v4.1d- v7.1d}, [x0], #32
H A Daes-modes.S193 mov v7.16b, v2.16b
201 eor v3.16b, v3.16b, v7.16b
457 ld1 {v5.16b-v7.16b}, [IN], #48
464 eor v2.16b, v7.16b, v2.16b
510 ld1 {v7.16b}, [IN], x16
520 ST4( eor v7.16b, v7.16b, v1.16b )
528 ST5( eor v7.16b, v7.16b, v2.16b )
534 st1 {v7
[all...]
H A Dsm4-ce-cipher-core.S22 ld1 {v4.4s-v7.4s}, [x0]
30 sm4e v8.4s, v7.4s
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h105 f5, v5, f6, v6, f7, v7) \ argument
113 FN(reg, f7), v7)
116 f5, v5, f6, v6, f7, v7, f8, v8) \ argument
124 FN(reg, f7), v7,\
128 v5, f6, v6, f7, v7, f8, v8, f9, v9) \ argument
136 FN(reg, f7), v7, \
141 v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \ argument
149 FN(reg, f7), v7, \
195 #define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ argument
203 FN(reg_name, f7), v7)
205 REG_GET_8(reg_name,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) global() argument
269 REG_UPDATE_7(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) global() argument
279 REG_UPDATE_8(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) global() argument
290 REG_UPDATE_9(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) global() argument
302 REG_UPDATE_10(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) global() argument
315 REG_UPDATE_14(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14) global() argument
333 REG_UPDATE_19(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) global() argument
356 REG_UPDATE_20(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) global() argument
[all...]
/linux/lib/crc/powerpc/
H A Dcrc-vpmsum-template.S156 /* zero v0-v7 which will contain our checksums */
164 vxor v7,v7,v7
299 vxor v7,v7,v15
341 vxor v7,v7,v15
354 vxor v7,v7,v1
[all...]
/linux/lib/raid6/
H A Drvv.c217 * v4:wp1, v5:wq1, v6:wd1/w21, v7:w11 in raid6_rvv2_gen_syndrome_real()
254 "vsll.vi v7, v5, 1\n" in raid6_rvv2_gen_syndrome_real()
256 "vxor.vv v7, v7, v6\n" in raid6_rvv2_gen_syndrome_real()
258 "vxor.vv v5, v7, v6\n" in raid6_rvv2_gen_syndrome_real()
309 * v4:wp1, v5:wq1, v6:wd1/w21, v7:w11 in raid6_rvv2_xor_syndrome_real()
347 "vsll.vi v7, v5, 1\n" in raid6_rvv2_xor_syndrome_real()
349 "vxor.vv v7, v7, v6\n" in raid6_rvv2_xor_syndrome_real()
351 "vxor.vv v5, v7, v in raid6_rvv2_xor_syndrome_real()
[all...]
/linux/lib/crypto/arm64/
H A Dchacha-neon-core.S124 ld1 {v4.16b-v7.16b}, [x2]
140 eor v3.16b, v3.16b, v7.16b
216 ld4r { v4.4s- v7.4s}, [x8], #16
227 mov a7, v7.s[0]
251 add v3.4s, v3.4s, v7.4s
291 eor v19.16b, v7.16b, v11.16b
297 shl v7.4s, v19.4s, #12
305 sri v7.4s, v19.4s, #20
318 add v3.4s, v3.4s, v7.4s
358 eor v19.16b, v7
[all...]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-espressobin-v7-emmc.dts3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board V7 with eMMC
19 model = "Globalscale Marvell ESPRESSOBin Board V7 (eMMC)";
20 compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",
H A Darmada-3720-espressobin-v7.dts3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board V7
19 model = "Globalscale Marvell ESPRESSOBin Board V7";
20 compatible = "globalscale,espressobin-v7", "globalscale,espressobin",
/linux/Documentation/devicetree/bindings/arm/marvell/
H A Darmada-37xx.yaml34 - globalscale,espressobin-v7
39 - description: Globalscale Espressobin V7 boards
42 - globalscale,espressobin-v7-emmc
43 - const: globalscale,espressobin-v7
/linux/arch/arm/mm/
H A Dcache-tauros2.c29 * When Tauros2 is used on a CPU that supports the v7 hierarchical
30 * cache operations, the cache handling code in proc-v7.S takes care
34 * being used on a pre-v7 CPU, and we only need to build support for
36 * configured to support a pre-v7 CPU.
236 * Check whether this CPU has support for the v7 hierarchical in tauros2_internal_init()
237 * cache ops. (PJ4 is in its v7 personality mode if the MMFR3 in tauros2_internal_init()
238 * register indicates support for the v7 hierarchical cache in tauros2_internal_init()
242 * implement the v7 cache ops but are only ARMv6 CPUs (due to in tauros2_internal_init()
H A DMakefile14 obj-$(CONFIG_ARM_MPU) += pmsa-v7.o pmsa-v8.o
37 obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
43 obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
63 obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o
90 obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o
/linux/Documentation/devicetree/bindings/i2c/
H A Dmicrochip,corei2c.yaml22 - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
23 - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
51 compatible = "microchip,mpfs-i2c", "microchip,corei2c-rtl-v7";
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp.h31 #include "phy-qcom-qmp-qserdes-com-v7.h"
32 #include "phy-qcom-qmp-qserdes-txrx-v7.h"
57 #include "phy-qcom-qmp-pcs-v7.h"
/linux/lib/crypto/riscv/
H A Dchacha-riscv64-zvkb.S193 vmv.v.x v7, KEY3
213 v2, v6, v10, v14, v3, v7, v11, v15
216 v2, v7, v8, v13, v3, v4, v9, v14
232 vadd.vx v7, v7, KEY3
242 vxor.vv v23, v23, v7
/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_crtc.c464 PIXEL_CLOCK_PARAMETERS_V7 v7; member
706 args.v7.ulPixelClock = cpu_to_le32(clock * 10); /* 100 hz units */ in amdgpu_atombios_crtc_program_pll()
707 args.v7.ucMiscInfo = 0; in amdgpu_atombios_crtc_program_pll()
710 args.v7.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN; in amdgpu_atombios_crtc_program_pll()
711 args.v7.ucCRTC = crtc_id; in amdgpu_atombios_crtc_program_pll()
716 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_DIS; in amdgpu_atombios_crtc_program_pll()
719 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_5_4; in amdgpu_atombios_crtc_program_pll()
722 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_3_2; in amdgpu_atombios_crtc_program_pll()
725 args.v7.ucDeepColorRatio = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_2_1; in amdgpu_atombios_crtc_program_pll()
729 args.v7 in amdgpu_atombios_crtc_program_pll()
[all...]
/linux/lib/
H A Dtest_dynamic_debug.c85 enum cat_level_num { V0 = 14, V1, V2, V3, V4, V5, V6, V7 }; enumerator
87 "V0", "V1", "V2", "V3", "V4", "V5", "V6", "V7");
131 prdbg(V7); in do_levels()

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