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/linux-5.10/Documentation/ABI/testing/
Dsysfs-class-backlight-adp55202 ---------------------------------------------------------------
4 The backlight brightness control operates at three different levels for the
5 adp5520 and adp5501 devices: daylight (level 1), office (level 2) and dark
6 (level 3). By default the brightness operates at the daylight brightness level.
16 is at one of the three levels (daylight, office or dark). This
18 value between 0 mA and 30 mA using linear or non-linear
29 one of the three levels (daylight, office or dark). This is an
31 between 0 mA and 30 mA using linear or non-linear algorithms.
Dsysfs-class-backlight-adp88602 -----------------------------------------------------------
4 The backlight brightness control operates at three different levels for the
5 adp8860, adp8861 and adp8863 devices: daylight (level 1), office (level 2) and
6 dark (level 3). By default the brightness operates at the daylight brightness
7 level.
21 is at one of the three levels (daylight, office or dark). This
23 value between 0 mA and 30 mA using linear or non-linear
35 one of the three levels (daylight, office or dark). This is an
37 between 0 mA and 30 mA using linear or non-linear algorithms.
Dsysfs-driver-wacom4 Contact: linux-bluetooth@vger.kernel.org
14 Contact: linux-input@vger.kernel.org
25 Contact: linux-input@vger.kernel.org
30 button is pressed on the stylus. This luminance level is
31 normally lower than the level when a button is pressed.
35 Contact: linux-input@vger.kernel.org
44 Contact: linux-input@vger.kernel.org
49 24HD) status LEDs is active (0..3). The other three LEDs on the
54 Contact: linux-input@vger.kernel.org
58 and Cintiq 24HD) status LEDs is active (0..3). The other three LEDs on
[all …]
/linux-5.10/arch/x86/um/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
14 bool "64-bit kernel" if "$(SUBARCH)" = "x86"
31 bool "Three-level pagetables" if !64BIT
34 Three-level pagetables will let UML have more than 4G of physical
38 However, this it experimental on 32-bit architectures, so if unsure say
39 N (on x86-64 it's automatically enabled, instead, as it's safe there).
/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dimg,pdc-intc.txt10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
[all …]
Driscv,cpu-intc.txt1 RISC-V Hart-Level Interrupt Controller (HLIC)
2 ---------------------------------------------
4 RISC-V cores include Control Status Registers (CSRs) which are local to each
5 CPU core (HART in RISC-V terminology) and can be read or written by software.
10 The RISC-V supervisor ISA manual specifies three interrupt sources that are
13 timer interrupt comes from an architecturally mandated real-time timer that is
16 via the platform-level interrupt controller (PLIC).
18 All RISC-V systems that conform to the supervisor ISA specification are
19 required to have a HLIC with these three interrupt sources present. Since the
27 - compatible : "riscv,cpu-intc"
[all …]
/linux-5.10/Documentation/scheduler/
Dsched-stats.rst11 12 which was in the kernel from 2.6.13-2.6.19 (version 13 never saw a kernel
12 release). Some counters make more sense to be per-runqueue; other to be
13 per-domain. Note that domains (and their associated information) will only
16 In version 14 of schedstat, there is at least one level of domain
22 are no architectures which need more than three domain levels. The first
33 Note that any such script will necessarily be version-specific, as the main
38 --------------
45 Next three are schedule() statistics:
57 Next three are statistics describing scheduling latency:
66 -----------------
[all …]
Dsched-nice-design.rst6 nice-levels implementation in the new Linux scheduler.
12 scheduler, (otherwise we'd have done it long ago) because nice level
19 rule so that nice +19 level would be _exactly_ 1 jiffy. To better
34 -*----------------------------------*-----> [nice level]
35 -20 | +19
52 right minimal granularity - and this translates to 5% CPU utilization.
53 But the fundamental HZ-sensitive property for nice+19 still remained,
56 too _strong_ :-)
59 within the constraints of HZ and jiffies and their nasty design level
63 about Linux's nice level support was its assymetry around the origo
[all …]
/linux-5.10/arch/sh/boards/mach-dreamcast/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
18 * Dreamcast System ASIC Hardware Events -
28 * There are three 32-bit ESRs located at 0xa05f6900 - 0xa05f6908. Event
29 * types can be found in arch/sh/include/mach-dreamcast/mach/sysasic.h.
30 * There are three groups of EMRs that parallel the ESRs. Each EMR group
31 * corresponds to an IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13,
32 * 0xa05f6920 - 0xa05f6928 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938
39 * 6900/6910 - Events 0-31, IRQ 13
40 * 6904/6924 - Events 32-63, IRQ 11
41 * 6908/6938 - Events 64-95, IRQ 9
[all …]
/linux-5.10/drivers/gpu/drm/amd/include/ivsrcid/dcn/
Dirqsrcs_dcn_1_0.h30 …C_I2C_SW_DONE 1 // DC_I2C SW done DC_I2C_SW_DONE_INTERRUPT DISP_INTERRUPT_STATUS Level
33 … // DC_I2C DDC1 HW done DOUT_IHC_I2C_DDC1_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
36 … // DC_I2C DDC2 HW done DOUT_IHC_I2C_DDC2_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
39 … // DC_I2C DDC3 HW done DOUT_IHC_I2C_DDC3_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
42 … // DC_I2C_DDC4 HW done DOUT_IHC_I2C_DDC4_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
45 … // DC_I2C_DDC5 HW done DOUT_IHC_I2C_DDC5_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
48 … // DC_I2C_DDC6 HW done DOUT_IHC_I2C_DDC6_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
51 …DC_I2C_DDCVGA HW done DOUT_IHC_I2C_DDCVGA_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
54 …DC1 read request DC_I2C_DDC1_READ_REQUEST_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level / Pulse
57 …DC2 read request DC_I2C_DDC2_READ_REQUEST_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level / Pulse
[all …]
/linux-5.10/Documentation/devicetree/bindings/watchdog/
Dgpio-wdt.txt1 * GPIO-controlled Watchdog
4 - compatible: Should contain "linux,wdt-gpio".
5 - gpios: From common gpio binding; gpio connection to WDT reset pin.
6 - hw_algo: The algorithm used by the driver. Should be one of the
8 - toggle: Either a high-to-low or a low-to-high transition clears
10 left floating or connected to a three-state buffer.
11 - level: Low or high level starts counting WDT timeout,
12 the opposite level disables the WDT. Active level is determined
14 - hw_margin_ms: Maximum time to reset watchdog circuit (milliseconds).
17 - always-running: If the watchdog timer cannot be disabled, add this flag to
[all …]
/linux-5.10/Documentation/virt/
Dparavirt_ops.rst1 .. SPDX-License-Identifier: GPL-2.0
13 including native machine -- without any hypervisors.
16 corresponding to low level critical instructions and high level
17 functionalities in various areas. pv-ops allows for optimizations at run
18 time by enabling binary patching of the low-ops critical operations
21 pv_ops operations are classified into three categories:
23 - simple indirect call
24 These operations correspond to high level functionality where it is
27 - indirect call which allows optimization with binary patch
28 Usually these operations correspond to low level critical instructions. They
[all …]
/linux-5.10/Documentation/devicetree/bindings/opp/
Dopp.txt2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
39 Binding 2: operating-points-v2
[all …]
/linux-5.10/Documentation/power/regulator/
Doverview.rst26 - Regulator
27 - Electronic device that supplies power to other devices.
31 Input Voltage -> Regulator -> Output Voltage
34 - PMIC
35 - Power Management IC. An IC that contains numerous
39 - Consumer
40 - Electronic device that is supplied power by a regulator.
41 Consumers can be classified into two types:-
52 - Power Domain
53 - Electronic circuit that is supplied its input power by the
[all …]
/linux-5.10/arch/m68k/mac/
Dmacints.c1 // SPDX-License-Identifier: GPL-2.0
7 * exclusively use the autovector interrupts (the 'generic level0-level7'
8 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
10 * 1 - VIA1
11 * - slot 0: one second interrupt (CA2)
12 * - slot 1: VBlank (CA1)
13 * - slot 2: ADB data ready (SR full)
14 * - slot 3: ADB data (CB2)
15 * - slot 4: ADB clock (CB1)
16 * - slot 5: timer 2
[all …]
/linux-5.10/Documentation/hwmon/
Dlm78.rst6 * National Semiconductor LM78 / LM78-J
10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
20 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
28 - Frodo Looijaard <frodol@dds.nl>
29 - Jean Delvare <jdelvare@suse.de>
32 -----------
34 This driver implements support for the National Semiconductor LM78, LM78-J
37 There is almost no difference between the three supported chips. Functionally,
38 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line,
40 From here on, LM7* means either of these three types.
[all …]
Dpc87360.rst22 -----------------
25 Chip initialization level:
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
49 hardware monitoring chipsets, not only controlling and monitoring three fans,
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
[all …]
/linux-5.10/arch/x86/include/asm/
Dpgtable_32.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * The Linux memory management assumes a three-level page table setup. On
9 * the i386, we use that, but "fold" the mid level into the top-level page
10 * table, so that we physically have the same two-level page table as the
36 # include <asm/pgtable-3level.h>
38 # include <asm/pgtable-2level.h>
85 * with only a host target support using a 32-bit type for internal
88 #define LOWMEM_PAGES ((((_ULL(2)<<31) - __PAGE_OFFSET) >> PAGE_SHIFT))
/linux-5.10/Documentation/admin-guide/
Dsysfs-rules.rst4 The kernel-exported sysfs exports internal kernel implementation details
11 low-level userspace applications, with a new kernel release, the users
12 of sysfs must follow some rules to use an as-abstract-as-possible way to
21 - Do not use libsysfs
23 offer any abstraction, it exposes all the kernel driver-core
31 - sysfs is always at ``/sys``
38 - devices are only "devices"
39 There is no such thing like class-, bus-, physical devices,
41 just simply a "device". Class-, bus-, physical, ... types are just
47 - devpath (``/devices/pci0000:00/0000:00:1d.1/usb2/2-2/2-2:1.0``)
[all …]
/linux-5.10/Documentation/core-api/
Dgenericirq.rst7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
[all …]
/linux-5.10/lib/zlib_inflate/
Dinffast.c1 /* inffast.c -- fast decoding
2 * Copyright (C) 1995-2004 Mark Adler
33 available, an end-of-block is encountered, or a data error is encountered.
40 state->mode == LEN
41 strm->avail_in >= 6
42 strm->avail_out >= 258
43 start >= strm->avail_out
44 state->bits < 8
46 On return, state->mode is one of:
48 LEN -- ran out of enough output space or enough available input
[all …]
/linux-5.10/Documentation/m68k/
Dbuddha-driver.rst8 ------------------------------------------------------------------------
11 Buddha-part of the Catweasel Zorro-II version
21 product number: 0 (42 for Catweasel Z-II)
23 Rom-vector: $1000
25 The card should be a Z-II board, size 64K, not for freemem
26 list, Rom-Vektor is valid, no second Autoconfig-board on the
30 as the Amiga Kickstart does: The lower nibble of the 8-Bit
36 otherwise your chance is only 1:16 to find the board :-).
38 The local memory-map is even active when mapped to $e8:
41 $0-$7e Autokonfig-space, see Z-II docs.
[all …]
/linux-5.10/include/linux/
Drcu_node_tree.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * global attributes while avoiding common-case global contention. A key
5 * property that these computations rely on is a tournament-style approach
6 * where only one of the tasks contending a lower level in the tree need
7 * advance to the next higher level. If properly configured, this allows
8 * unlimited scalability while maintaining a constant level of contention
11 * This seemingly RCU-private file must be available to SRCU users
27 * In practice, this did work well going from three levels to four.
/linux-5.10/Documentation/ABI/stable/
Dsysfs-driver-speakup3 Contact: speakup@linux-speakup.org
10 Contact: speakup@linux-speakup.org
17 Contact: speakup@linux-speakup.org
24 Contact: speakup@linux-speakup.org
31 Contact: speakup@linux-speakup.org
40 Contact: speakup@linux-speakup.org
46 Contact: speakup@linux-speakup.org
51 Contact: speakup@linux-speakup.org
57 Contact: speakup@linux-speakup.org
66 Contact: speakup@linux-speakup.org
[all …]
/linux-5.10/drivers/media/rc/
Dnuvoton-cir.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Driver for Nuvoton Technology Corporation w83667hg/w83677hg-i CIR
18 #define NVT_DRIVER_NAME "nuvoton-cir"
163 /* select TX trigger level as 16 */
174 /* select RX trigger level as 24 */
242 /* select WAKE UP RX trigger level as 67 */
284 /* next three regs valid for both the CIR and CIR_WAKE logical devices */
288 /* next three regs valid only for ACPI logical dev */
308 #define OUTPUT_ENABLE_CIRWB 0x40 /* enable wide-band sensor */
313 #define MULTIFUNC_ENABLE_CIRWB 0x20 /* enable wide-band sensor */

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