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Searched +full:stm32mp1 +full:- +full:rtc (Results 1 – 7 of 7) sorted by relevance

/linux-5.10/Documentation/devicetree/bindings/rtc/
Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@st.com>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
26 clock-names:
28 - const: pclk
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/linux-5.10/arch/arm/boot/dts/
Dstm32mp157c-dhcom-pdk2.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E2-CAN2-SDR104-RTC-WBT-T-DSI-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * PDK2 PCB number: 516-400 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-pdk2.dtsi"
19 compatible = "dh,stm32mp157c-dhcom-pdk2", "dh,stm32mp157c-dhcom-som",
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Dstm32mp153c-dhcom-drc02.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP153C-C065-R102-F0819-SPI-E2-CAN2-RTC-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * DRC02 PCB number: 568-100 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-drc02.dtsi"
19 compatible = "dh,stm32mp153c-dhcom-drc02", "dh,stm32mp153c-dhcom-som",
24 pinctrl-names = "default", "sleep";
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Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
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/linux-5.10/drivers/rtc/
Drtc-stm32.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/rtc.h>
89 /* Max STM32 RTC register offset is 0x3FC */
114 void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
133 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc) in stm32_rtc_wpr_unlock() argument
135 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock()
137 writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
138 writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
141 static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc) in stm32_rtc_wpr_lock() argument
143 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_lock()
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/linux-5.10/drivers/clk/
Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/stm32mp1-clks.h>
160 "ck_hse", "pll4_r", "clk-hse-div2"
385 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
388 cfg->name, in _clk_hw_register_gate()
389 cfg->parent_name, in _clk_hw_register_gate()
390 cfg->flags, in _clk_hw_register_gate()
391 gate_cfg->reg_off + base, in _clk_hw_register_gate()
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