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/linux-5.10/Documentation/devicetree/bindings/rtc/
Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Real Time Clock Bindings
10 - Gabriel Fernandez <gabriel.fernandez@st.com>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
26 clock-names:
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/linux-5.10/arch/arm/boot/dts/
Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
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Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
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Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32f769-disco.dts2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f769-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/gpio/gpio.h>
50 model = "STMicroelectronics STM32F769-DISCO board";
51 compatible = "st,stm32f769-disco", "st,stm32f769";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
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Dstm32746g-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f746-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
50 model = "STMicroelectronics STM32746g-EVAL board";
51 compatible = "st,stm32746g-eval", "st,stm32f746";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
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Dstm32f429-disco.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53 #include <dt-bindings/gpio/gpio.h>
56 model = "STMicroelectronics STM32F429i-DISCO board";
57 compatible = "st,stm32f429i-disco", "st,stm32f429";
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Dstm32f469-disco.dts2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
60 stdout-path = "serial0:115200n8";
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Dstm32429i-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/gpio/gpio.h>
55 model = "STMicroelectronics STM32429i-EVAL board";
56 compatible = "st,stm32429i-eval", "st,stm32f429";
60 stdout-path = "serial0:115200n8";
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/linux-5.10/Documentation/devicetree/bindings/clock/
Dst,stm32h7-rcc.txt6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32h743-rcc"
13 - reg: should be register base and length as documented in the
16 - #reset-cells: 1, see below
18 - #clock-cells : from common clock binding; shall be set to 1
20 - clocks: External oscillator clock phandle
21 - high speed external clock signal (HSE)
22 - low speed external clock signal (LSE)
23 - external I2S clock (I2S_CKIN)
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Dst,stm32-rcc.txt1 STMicroelectronics STM32 Reset and Clock Controller
6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32f42xx-rcc"
12 "st,stm32f469-rcc"
13 "st,stm32f746-rcc"
14 "st,stm32f769-rcc"
16 - reg: should be register base and length as documented in the
18 - #reset-cells: 1, see below
19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"
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/linux-5.10/drivers/rtc/
Drtc-stm32.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/rtc.h>
89 /* Max STM32 RTC register offset is 0x3FC */
114 void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
133 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc) in stm32_rtc_wpr_unlock() argument
135 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock()
137 writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
138 writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
141 static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc) in stm32_rtc_wpr_lock() argument
143 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_lock()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_SYSTOHC) += systohc.o
10 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
11 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
12 rtc-core-y := class.o interface.o
14 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
15 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
50 sleep states. Do not specify an RTC here unless it stays powered
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/linux-5.10/drivers/mfd/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 tristate "Active-semi ACT8945A"
49 Support for the ACT8945A PMIC from Active-semi. This device
50 features three step-down DC/DC converters and four low-dropout
66 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
69 called sun4i-gpadc.
88 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
89 controllers, 11 LDOs, RTC, automatic battery, temperature and
119 over at91-usart-serial driver and usart-spi-driver. Only one function
135 tristate "Atmel HLCDC (High-end LCD Controller)"
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/linux-5.10/drivers/spi/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG
8 # small core, mostly translating board-specific
10 obj-$(CONFIG_SPI_MASTER) += spi.o
11 obj-$(CONFIG_SPI_MEM) += spi-mem.o
12 obj-$(CONFIG_SPI_MUX) += spi-mux.o
13 obj-$(CONFIG_SPI_SPIDEV) += spidev.o
14 obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi-loopback-test.o
17 obj-$(CONFIG_SPI_ALTERA) += spi-altera.o
18 obj-$(CONFIG_SPI_AR934X) += spi-ar934x.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
111 supports spi-mem interface.
181 this code to manage the per-word or per-transfer accesses to the
211 Flash over 1/2/4-bit wide bus. Enable this option if you have a
219 This enables dedicated general purpose SPI/Microwire1-compatible
220 master mode interface (SSI1) for CLPS711X-based CPUs.
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/linux-5.10/drivers/clocksource/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
163 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
186 32-bit free running decrementing counters.
240 bool "Integrator-AP timer driver" if COMPILE_TEST
243 Enables support for the Integrator-AP timer.
276 available on many OMAP-like platforms.
285 It has a 64-bit counter with update rate up to 1000MHz.
286 This counter is accessed via couple of 32-bit memory-mapped registers.
289 bool "Clocksource for STM32 SoCs" if !ARCH_STM32
295 bool "Low power clocksource for STM32 SoCs"
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/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/linux-5.10/drivers/clk/
Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/stm32mp1-clks.h>
160 "ck_hse", "pll4_r", "clk-hse-div2"
372 /* STM32 Composite clock */
385 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
388 cfg->name, in _clk_hw_register_gate()
389 cfg->parent_name, in _clk_hw_register_gate()
390 cfg->flags, in _clk_hw_register_gate()
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/linux-5.10/drivers/watchdog/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
218 tristate "Watchdog device controlled through GPIO-line"
223 controlled through GPIO-line.
341 module will be called mlx-wdt.
375 More details: ARM DEN0029B - Server Base System Architecture (SBSA)
443 The Intel Footbridge chip contains a built-in watchdog circuit. Say Y
451 "If in doubt, leave it out" - say N.
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