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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8450-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450
17 See also: include/dt-bindings/interconnect/qcom,sm8450.h
22 - qcom,sm8450-aggre1-noc
23 - qcom,sm8450-aggre2-noc
24 - qcom,sm8450-clk-virt
25 - qcom,sm8450-config-noc
26 - qcom,sm8450-gem-noc
27 - qcom,sm8450-lpass-ag-noc
28 - qcom,sm8450
[all...]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sm8350-pas.yaml7 title: Qualcomm SM8350/SM8450 Peripheral Authentication Service
13 Qualcomm SM8350/SM8450 SoC Peripheral Authentication Service loads and boots
25 - qcom,sm8450-adsp-pas
26 - qcom,sm8450-cdsp-pas
27 - qcom,sm8450-mpss-pas
28 - qcom,sm8450-slpi-pas
74 - qcom,sm8450-adsp-pas
75 - qcom,sm8450-cdsp-pas
76 - qcom,sm8450-slpi-pas
95 - qcom,sm8450
[all...]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8450-videocc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
7 title: Qualcomm Video Clock & Reset Controller on SM8450
15 domains on SM8450.
18 include/dt-bindings/clock/qcom,sm8450-videocc.h
24 - qcom,sm8450-videocc
62 - qcom,sm8450-videocc
72 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
76 compatible = "qcom,sm8450-videocc";
H A Dqcom,sm8450-camcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SM8450
15 domains on SM8450.
18 include/dt-bindings/clock/qcom,sm8450-camcc.h
25 - qcom,sm8450-camcc
67 - qcom,sm8450-camcc
77 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
81 compatible = "qcom,sm8450-camcc";
H A Dqcom,sm8450-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM8450
20 include/dt-bindings/clock/qcom,sm8450-gpucc.h
22 include/dt-bindings/reset/qcom,sm8450-gpucc.h
32 - qcom,sm8450-gpucc
57 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
65 compatible = "qcom,sm8450-gpucc";
H A Dqcom,gcc-sm8450.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM8450
14 domains on SM8450
16 See also: include/dt-bindings/clock/qcom,gcc-sm8450.h
21 - qcom,gcc-sm8450
65 compatible = "qcom,gcc-sm8450";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8450-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8450 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.
18 const: qcom,sm8450-lpass-lpi-pinctrl
38 - $ref: "#/$defs/qcom-sm8450-lpass-state"
41 $ref: "#/$defs/qcom-sm8450-lpass-state"
45 qcom-sm8450-lpass-state:
90 compatible = "qcom,sm8450-lpass-lpi-pinctrl";
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sm8450.yaml4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8450.yaml#
7 title: Qualcomm SM8450 PCI Express Root Complex
14 Qualcomm SM8450 SoC PCIe root complex controller is based on the Synopsys
20 - qcom,pcie-sm8450-pcie0
21 - qcom,pcie-sm8450-pcie1
87 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
90 #include <dt-bindings/interconnect/qcom,sm8450.h>
98 compatible = "qcom,pcie-sm8450-pcie0";
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8450-qrd.dts9 #include "sm8450.dtsi"
19 model = "Qualcomm Technologies, Inc. SM8450 QRD";
20 compatible = "qcom,sm8450-qrd", "qcom,sm8450";
384 firmware-name = "qcom/sm8450/adsp.mbn";
389 firmware-name = "qcom/sm8450/cdsp.mbn";
394 firmware-name = "qcom/sm8450/modem.mbn";
399 firmware-name = "qcom/sm8450/slpi.mbn";
H A Dsm8450-sony-xperia-nagara-pdx224.dts9 #include "sm8450-sony-xperia-nagara.dtsi"
13 compatible = "sony,pdx224", "qcom,sm8450";
H A Dsm8450-sony-xperia-nagara-pdx223.dts9 #include "sm8450-sony-xperia-nagara.dtsi"
13 compatible = "sony,pdx223", "qcom,sm8450";
/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,ufs.yaml43 - qcom,sm8450-ufshc
159 - qcom,sm8450-ufshc
300 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
303 #include <dt-bindings/interconnect/qcom,sm8450.h>
311 compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
/linux/include/dt-bindings/clock/
H A Dqcom,sm8650-videocc.h9 #include "qcom,sm8450-videocc.h"
11 /* SM8650 introduces below new clocks and resets compared to SM8450 */
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml39 - qcom,sm8450-qmp-gen3x1-pcie-phy
40 - qcom,sm8450-qmp-gen4x2-pcie-phy
161 - qcom,sm8450-qmp-gen3x1-pcie-phy
162 - qcom,sm8450-qmp-gen3x2-pcie-phy
231 - qcom,sm8450-qmp-gen4x2-pcie-phy
H A Dqcom,sc8280xp-qmp-ufs-phy.yaml43 - qcom,sm8450-qmp-ufs-phy
111 - qcom,sm8450-qmp-ufs-phy
/linux/drivers/interconnect/qcom/
H A Dsm8450.c14 #include <dt-bindings/interconnect/qcom,sm8450.h>
19 #include "sm8450.h"
1859 { .compatible = "qcom,sm8450-aggre1-noc",
1861 { .compatible = "qcom,sm8450-aggre2-noc",
1863 { .compatible = "qcom,sm8450-clk-virt",
1865 { .compatible = "qcom,sm8450-config-noc",
1867 { .compatible = "qcom,sm8450-gem-noc",
1869 { .compatible = "qcom,sm8450-lpass-ag-noc",
1871 { .compatible = "qcom,sm8450-mc-virt",
1873 { .compatible = "qcom,sm8450
[all...]
H A DMakefile41 qnoc-sm8450-objs := sm8450.o
83 obj-$(CONFIG_INTERCONNECT_QCOM_SM8450) += qnoc-sm8450.o
/linux/drivers/clk/qcom/
H A DMakefile131 obj-$(CONFIG_SM_CAMCC_8450) += camcc-sm8450.o
142 obj-$(CONFIG_SM_DISPCC_8450) += dispcc-sm8450.o
155 obj-$(CONFIG_SM_GCC_8450) += gcc-sm8450.o
168 obj-$(CONFIG_SM_GPUCC_8450) += gpucc-sm8450.o
181 obj-$(CONFIG_SM_VIDEOCC_8450) += videocc-sm8450.o
H A DKconfig999 tristate "SM8450 Camera Clock Controller"
1003 Support for the camera clock controller on SM8450 or SM8475 devices.
1103 tristate "SM8450 Display Clock Controller"
1108 SM8450 or SM8475 devices.
1224 tristate "SM8450 Global Clock Controller"
1228 Support for the global clock controller on SM8450 or SM8475
1342 tristate "SM8450 Graphics Clock Controller"
1346 Support for the graphics clock controller on SM8450 or SM8475
1522 tristate "SM8450 Video Clock Controller"
1528 SM8450 o
[all...]
H A Dvideocc-sm8450.c12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
450 { .compatible = "qcom,sm8450-videocc" },
475 .name = "video_cc-sm8450",
482 MODULE_DESCRIPTION("QTI VIDEOCC SM8450 / SM8475 Driver");
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-rx-macro.yaml18 - qcom,sm8450-lpass-rx-macro
89 - qcom,sm8450-lpass-rx-macro
H A Dqcom,lpass-va-macro.yaml18 - qcom,sm8450-lpass-va-macro
109 - qcom,sm8450-lpass-va-macro
H A Dqcom,lpass-tx-macro.yaml19 - qcom,sm8450-lpass-tx-macro
94 - qcom,sm8450-lpass-tx-macro
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm8450-lpass-lpi.c198 .compatible = "qcom,sm8450-lpass-lpi-pinctrl",
207 .name = "qcom-sm8450-lpass-lpi-pinctrl",
215 MODULE_DESCRIPTION("QTI SM8450 LPI GPIO pin control driver");
H A DKconfig109 tristate "Qualcomm Technologies Inc SM8450 LPASS LPI pin controller driver"
115 (Low Power Island) found on the Qualcomm Technologies Inc SM8450 platform.

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