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/linux/Documentation/devicetree/bindings/phy/
H A Dhisilicon,hi3670-usb3.yaml30 hisilicon,sctrl-syscon:
47 - hisilicon,sctrl-syscon
61 hisilicon,sctrl-syscon = <&sctrl>;
/linux/drivers/slimbus/
H A Dqcom-ctrl.c278 static int qcom_clk_pause_wakeup(struct slim_controller *sctrl) in qcom_clk_pause_wakeup() argument
280 struct qcom_slim_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_clk_pause_wakeup()
325 static int qcom_xfer_msg(struct slim_controller *sctrl, in qcom_xfer_msg() argument
328 struct qcom_slim_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_xfer_msg()
390 static int qcom_set_laddr(struct slim_controller *sctrl, in qcom_set_laddr() argument
393 struct qcom_slim_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_set_laddr()
491 struct slim_controller *sctrl; in qcom_slim_probe() local
516 sctrl = &ctrl->ctrl; in qcom_slim_probe()
517 sctrl->dev = &pdev->dev; in qcom_slim_probe()
526 sctrl->set_laddr = qcom_set_laddr; in qcom_slim_probe()
[all …]
H A Dqcom-ngd-ctrl.c785 static int qcom_slim_ngd_xfer_msg(struct slim_controller *sctrl, in qcom_slim_ngd_xfer_msg() argument
788 struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(sctrl->dev); in qcom_slim_ngd_xfer_msg()
848 ret = slim_alloc_txn_tid(sctrl, txn); in qcom_slim_ngd_xfer_msg()
896 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc, in qcom_slim_ngd_xfer_msg()
905 dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", in qcom_slim_ngd_xfer_msg()
/linux/drivers/phy/hisilicon/
H A Dphy-hi3670-usb3.c130 struct regmap *sctrl; member
327 if (!priv->sctrl) { in hi3670_is_abbclk_selected()
328 dev_err(priv->dev, "priv->sctrl is null!\n"); in hi3670_is_abbclk_selected()
332 if (regmap_read(priv->sctrl, SCTRL_SCDEEPSLEEPED, &reg)) { in hi3670_is_abbclk_selected()
614 priv->sctrl = syscon_regmap_lookup_by_phandle(dev->of_node, in hi3670_phy_probe()
615 "hisilicon,sctrl-syscon"); in hi3670_phy_probe()
616 if (IS_ERR(priv->sctrl)) { in hi3670_phy_probe()
617 dev_err(dev, "no hisilicon,sctrl-syscon\n"); in hi3670_phy_probe()
618 return PTR_ERR(priv->sctrl); in hi3670_phy_probe()
H A Dphy-hi3670-pcie.c760 phy->sysctrl = syscon_regmap_lookup_by_compatible("hisilicon,hi3670-sctrl"); in hi3670_pcie_phy_get_resources()
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3670.dtsi173 sctrl: sctrl@fff0a000 { label
174 compatible = "hisilicon,hi3670-sctrl", "syscon";
522 clocks = <&sctrl HI3670_PCLK_GPIO18>;
535 clocks = <&sctrl HI3670_PCLK_GPIO19>;
575 clocks = <&sctrl HI3670_PCLK_AO_GPIO0>;
589 clocks = <&sctrl HI3670_PCLK_AO_GPIO1>;
603 clocks = <&sctrl HI3670_PCLK_AO_GPIO2>;
617 clocks = <&sctrl HI3670_PCLK_AO_GPIO3>;
631 clocks = <&sctrl HI3670_PCLK_AO_GPIO4>;
645 clocks = <&sctrl HI3670_PCLK_AO_GPIO5>;
[all …]
H A Dhi3660.dtsi368 sctrl: sctrl@fff0a000 { label
369 compatible = "hisilicon,hi3660-sctrl", "syscon";
886 clocks = <&sctrl HI3660_PCLK_AO_GPIO0>;
900 clocks = <&sctrl HI3660_PCLK_AO_GPIO1>;
914 clocks = <&sctrl HI3660_PCLK_AO_GPIO2>;
928 clocks = <&sctrl HI3660_PCLK_AO_GPIO3>;
942 clocks = <&sctrl HI3660_PCLK_AO_GPIO4>;
956 clocks = <&sctrl HI3660_PCLK_AO_GPIO5>;
968 clocks = <&sctrl HI3660_PCLK_AO_GPIO6>;
1072 hisilicon,peripheral-syscon = <&sctrl>;
/linux/drivers/hv/
H A Dhv.c271 union hv_synic_scontrol sctrl; in hv_synic_enable_regs() local
322 sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL); in hv_synic_enable_regs()
323 sctrl.enable = 1; in hv_synic_enable_regs()
325 hv_set_msr(HV_MSR_SCONTROL, sctrl.as_uint64); in hv_synic_enable_regs()
344 union hv_synic_scontrol sctrl; in hv_synic_disable_regs() local
384 sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL); in hv_synic_disable_regs()
385 sctrl.enable = 0; in hv_synic_disable_regs()
386 hv_set_msr(HV_MSR_SCONTROL, sctrl.as_uint64); in hv_synic_disable_regs()
H A Dmshv_synic.c457 union hv_synic_scontrol sctrl; in mshv_synic_init() local
519 sctrl.as_uint64 = hv_get_non_nested_msr(HV_MSR_SCONTROL); in mshv_synic_init()
520 sctrl.enable = 1; in mshv_synic_init()
521 hv_set_non_nested_msr(HV_MSR_SCONTROL, sctrl.as_uint64); in mshv_synic_init()
551 union hv_synic_scontrol sctrl; in mshv_synic_cleanup() local
590 sctrl.as_uint64 = hv_get_non_nested_msr(HV_MSR_SCONTROL); in mshv_synic_cleanup()
591 sctrl.enable = 0; in mshv_synic_cleanup()
592 hv_set_non_nested_msr(HV_MSR_SCONTROL, sctrl.as_uint64); in mshv_synic_cleanup()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c35 u32 cctrl, sctrl; member
250 clk->sctrl = (divs + P2) << 16; in mcp77_clk_calc()
254 clk->sctrl = P1 << 16; in mcp77_clk_calc()
273 clk->scoef, clk->spost, clk->sctrl); in mcp77_clk_calc()
338 nvkm_mask(device, 0x4020, 0x00070000, clk->sctrl); in mcp77_clk_prog()
343 nvkm_wr32(device, 0x4020, 0x80000000 | clk->sctrl); in mcp77_clk_prog()
/linux/sound/pci/
H A Dens1370.c377 unsigned int sctrl; /* serial control register */ member
809 ensoniq->sctrl |= what; in snd_ensoniq_trigger()
811 ensoniq->sctrl &= ~what; in snd_ensoniq_trigger()
812 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); in snd_ensoniq_trigger()
877 ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM); in snd_ensoniq_playback1_prepare()
878 ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode); in snd_ensoniq_playback1_prepare()
879 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); in snd_ensoniq_playback1_prepare()
918 ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN | in snd_ensoniq_playback2_prepare()
920 ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) | in snd_ensoniq_playback2_prepare()
922 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); in snd_ensoniq_playback2_prepare()
[all …]
/linux/arch/arm64/boot/dts/bitmain/
H A Dbm1880.dtsi91 sctrl: system-controller@50010000 { label
92 compatible = "bitmain,bm1880-sctrl", "syscon",
/linux/Documentation/devicetree/bindings/clock/
H A Dhi3670-clock.txt14 - "hisilicon,hi3670-sctrl"
H A Dhi3660-clock.txt14 - "hisilicon,hi3660-sctrl"
H A Dhi6220-clock.txt14 - "hisilicon,hi6220-acpu-sctrl"
/linux/include/dt-bindings/clock/
H A Dhi6220-clock.h175 /* clk in Hi6220 acpu sctrl */
H A Dhi3660-clock.h178 /* clk in sctrl */
H A Dhi3670-clock.h244 /* clk in sctrl */
/linux/arch/arm/common/
H A Dmcpm_entry.c32 * The CPU cache (SCTRL.C bit) is expected to still be active.
44 * The CPU cache (SCTRL.C bit) is expected to be off.
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dbitmain,bm1880-pinctrl.txt8 - reg: Offset and length of pinctrl space in SCTRL.
/linux/drivers/isdn/hardware/mISDN/
H A Dhfcsusb.c688 __u8 conhdlc, sctrl, sctrl_r; in hfcsusb_setup_bch() local
735 sctrl = 0x40 + ((hw->protocol == ISDN_P_TE_S0) ? 0x00 : 0x04); in hfcsusb_setup_bch()
738 sctrl |= 1; in hfcsusb_setup_bch()
742 sctrl |= 2; in hfcsusb_setup_bch()
745 write_reg(hw, HFCUSB_SCTRL, sctrl); in hfcsusb_setup_bch()
/linux/arch/arm/kernel/
H A Dhead-nommu.S168 orreq r0, r0, #CR_M @ Set SCTRL.M (MPU on)
/linux/drivers/net/dsa/microchip/
H A Dksz8.c1815 u8 sctrl = 0; in ksz8_phy_port_link_up() local
1843 sctrl |= PORT_FORCE_FLOW_CTRL; in ksz8_phy_port_link_up()
1845 ksz_prmw8(dev, port, regs[P_STP_CTRL], PORT_FORCE_FLOW_CTRL, sctrl); in ksz8_phy_port_link_up()
/linux/drivers/pci/controller/dwc/
H A Dpcie-kirin.c192 phy->sysctrl = syscon_regmap_lookup_by_compatible("hisilicon,hi3660-sctrl"); in hi3660_pcie_phy_get_resource()
/linux/drivers/clk/hisilicon/
H A Dclk-hi3660.c603 { .compatible = "hisilicon,hi3660-sctrl",

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