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/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json42 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache."
63 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache."
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention."
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention."
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-4 cache."
133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention."
140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention."
147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache."
154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention."
161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cach
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/linux/Documentation/i2c/
H A Dfault-codes.rst28 These are returned as negative numbers from most calls, with zero or
34 codes that may be returned, and other cases where these codes should
35 be returned. However, drivers should not return other codes for these
38 Also, codes returned by adapter probe methods follow rules which are
43 Returned by I2C adapters not supporting 10 bit addresses when
47 Returned by I2C adapters when they lose arbitration in master
51 Also returned when trying to invoke an I2C operation in an
56 Returned by SMBus logic when an invalid Packet Error Code byte
65 Returned by SMBus adapters when the bus was busy for longer
81 Returned b
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/linux/tools/perf/pmu-events/arch/s390/cf_z14/
H A Dextended.json42 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache."
63 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache."
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention."
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory."
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention."
133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Cluster Level-3 cache without intervention."
140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster memory."
147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache with intervention."
154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention."
161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cach
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/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json98 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache."
105 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache with intervention."
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using chip level horizontal persistence, Chip-HP hit."
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using drawer level horizontal persistence, Drawer-HP hit."
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache."
133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache with intervention."
140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache after using chip level horizontal persistence, Chip-HP hit."
147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache using drawer level horizontal persistence, Drawer-HP hit."
154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Module Level-2 cache."
161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cach
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/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json42 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache."
63 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache."
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention."
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory."
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention."
133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Cluster Level-3 cache without intervention."
140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster memory."
147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache with intervention."
154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention."
161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cach
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/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dextended.json21 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Instruction cache."
28 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache."
35 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache."
105 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On Chip Level-3 cache without intervention."
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache without intervention."
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-3 cache without intervention."
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On Book Level-4 cache."
133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-4 cache."
147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from a On Chip Level-3 cache with intervention."
154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cach
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/linux/tools/perf/pmu-events/arch/s390/cf_z17/
H A Dextended.json98 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache."
105 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache with intervention."
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using chip level horizontal persistence, Chip-HP hit."
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using drawer level horizontal persistence, Drawer-HP hit."
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache."
133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache with intervention."
140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache after using chip level horizontal persistence, Chip-HP hit."
147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-2 cache after using drawer level horizontal persistence, Drawer-HP hit."
154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Module Level-2 cache."
161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cach
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n3/
H A Dll_cache.json4 "PublicDescription": "Counts transactions that were returned from outside the core cluster. This event counts transactions for external last level cache when the system register CPUECTLR.EXTLLC bit is set, otherwise it counts transactions for L3 cache."
8 "PublicDescription": "Counts transactions that were returned from outside the core cluster and missed in the last level cache"
12 "PublicDescription": "Counts read transactions that were returned from outside the core cluster. This event counts for external last level cache when the system register CPUECTLR.EXTLLC bit is set, otherwise it counts for the L3 cache. This event counts read transactions returned from outside the core if those transactions are either hit in the system level cache or missed in the SLC and are returned from any other external sources."
16 "PublicDescription": "Counts read transactions that were returned from outside the core cluster but missed in the system level cache. This event counts for external last level cache when the system register CPUECTLR.EXTLLC bit is set, otherwise it counts for L3 cache. This event counts read transactions returned from outside the core if those transactions are missed in the System level Cache. The data source of the transaction is indicated by a field in the CHI transaction returning to the CPU. This event does not count reads caused by cache maintenance operations."
/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A Dmemory.json125 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data returned from dram.",
135 "BriefDescription": "Counts all demand & prefetch data reads that miss the LLC and the data returned from dram.",
145 "BriefDescription": "Counts all prefetch code reads that miss the LLC and the data returned from dram.",
155 "BriefDescription": "Counts all prefetch data reads that miss the LLC and the data returned from dram.",
165 "BriefDescription": "Counts all prefetch RFOs that miss the LLC and the data returned from dram.",
175 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data returned from dram.",
185 "BriefDescription": "Counts all demand & prefetch RFOs that miss the LLC and the data returned from dram.",
201 "PublicDescription": "This event counts any requests that miss the LLC where the data was returned from local DRAM",
212 "PublicDescription": "This event counts all data requests (demand/prefetch data reads and demand data writes (RFOs) that miss the LLC where the data is returned from local DRAM",
227 "BriefDescription": "Counts demand code reads that miss the LLC and the data returned fro
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/linux/tools/perf/pmu-events/arch/s390/cf_z196/
H A Dextended.json7 "PublicDescription": "A directory write to the Level-1 Data Cache directory where the returned cache line was sourced from the Level-2 cache."
14 "PublicDescription": "A directory write to the Level-1 Instruction Cache directory where the returned cache line was sourced from the Level-2 cache."
42 "PublicDescription": "A directory write to the Level-1 Data Cache directory where the returned cache line was sourced from an Off Book Level-3 cache."
49 "PublicDescription": "A directory write to the Level-1 Data Cache directory where the returned cache line was sourced from an On Book Level-4 cache."
56 "PublicDescription": "A directory write to the Level-1 Instruction Cache directory where the returned cache line was sourced from an On Book Level-4 cache."
70 "PublicDescription": "A directory write to the Level-1 Data Cache directory where the returned cache line was sourced from an Off Book Level-4 cache."
77 "PublicDescription": "A directory write to the Level-1 Instruction Cache directory where the returned cache line was sourced from an Off Book Level-4 cache."
105 "PublicDescription": "A directory write to the Level-1 Instruction Cache directory where the returned cache line was sourced from an Off Book Level-3 cache."
147 "PublicDescription": "A directory write to the Level-1 Data Cache directory where the returned cache line was sourced from an On Chip Level-3 cache."
154 "PublicDescription": "A directory write to the Level-1 Data Cache directory where the returned cach
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/linux/Documentation/filesystems/
H A Dfiemap.rst21 which the process would like mappings for. Extents returned mirror
22 those on disk - that is, the logical offset of the 1st returned extent
23 may start before fm_start, and the range covered by the last returned
38 fm_extents[] array is ignored (no extents will be returned), and the
49 If this flag is set, the extents returned will describe the inodes
58 Extent information is returned within the embedded fm_extents array
62 returned via fm_mapped_extents. If the number of fiemap_extents
65 array will be returned and fm_mapped_extents will be equal to
71 returned in fm_extents:
79 returned, fe_logica
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/linux/include/linux/soc/mediatek/
H A Dmtk-cmdq.h73 * Return: 0 for success; else the error code is returned
102 * Return: 0 for success; else the error code is returned
120 * Return: 0 for success; else the error code is returned
132 * Return: 0 for success; else the error code is returned
144 * Return: 0 for success; else the error code is returned
156 * Return: 0 for success; else the error code is returned
174 * Return: 0 for success; else the error code is returned
192 * Return: 0 for success; else the error code is returned
207 * Return: 0 for success; else the error code is returned
220 * Return: 0 for success; else the error code is returned
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/linux/Documentation/userspace-api/media/dvb/
H A Dlegacy_dvb_video.rst84 data structures `video_status`_ returned by `VIDEO_GET_STATUS`_
85 and `video_event`_ returned by `VIDEO_GET_EVENT`_ which report
283 This values can be returned by the `VIDEO_GET_STATUS`_ call
607 This is the structure of a video event as it is returned by the
831 - :cspan:`1` File descriptor returned by a previous call
874 On success 0 is returned, on error -1 and the ``errno`` variable is set
905 - :cspan:`1` File descriptor returned by a previous call
929 On success 0 is returned, on error -1 and the ``errno`` variable is set
960 - :cspan:`1` File descriptor returned by a previous call
989 On success 0 is returned, o
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H A Dlegacy_dvb_audio.rst132 This values can be returned by the `AUDIO_GET_STATUS`_ call
480 - File descriptor returned by a previous call to `open()`_.
500 On success 0 is returned, on error -1 and the ``errno`` variable is set
531 - File descriptor returned by a previous call to `open()`_.
551 On success 0 is returned, on error -1 and the ``errno`` variable is set
582 - :cspan:`1` File descriptor returned by a previous call
604 On success 0 is returned, on error -1 and the ``errno`` variable is set
635 - :cspan:`1` File descriptor returned by a previous call
656 On success 0 is returned, on error -1 and the ``errno`` variable is set
688 - :cspan:`1` File descriptor returned b
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
H A Dll_cache.json4 "PublicDescription": "Counts read transactions that were returned from outside the core cluster. This event counts when the system register CPUECTLR.EXTLLC bit is set. This event counts read transactions returned from outside the core if those transactions are either hit in the system level cache or missed in the SLC and are returned from any other external sources."
8 "PublicDescription": "Counts read transactions that were returned from outside the core cluster but missed in the system level cache. This event counts when the system register CPUECTLR.EXTLLC bit is set. This event counts read transactions returned from outside the core if those transactions are missed in the System level Cache. The data source of the transaction is indicated by a field in the CHI transaction returning to the CPU. This event does not count reads caused by cache maintenance operations."
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
H A Dll_cache.json4 "PublicDescription": "Counts read transactions that were returned from outside the core cluster. This event counts when the system register CPUECTLR.EXTLLC bit is set. This event counts read transactions returned from outside the core if those transactions are either hit in the system level cache or missed in the SLC and are returned from any other external sources."
8 "PublicDescription": "Counts read transactions that were returned from outside the core cluster but missed in the system level cache. This event counts when the system register CPUECTLR.EXTLLC bit is set. This event counts read transactions returned from outside the core if those transactions are missed in the System level Cache. The data source of the transaction is indicated by a field in the CHI transaction returning to the CPU. This event does not count reads caused by cache maintenance operations."
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v3/
H A Dll_cache.json4 "PublicDescription": "Counts read transactions that were returned from outside the core cluster. This event counts for external last level cache when the system register CPUECTLR.EXTLLC bit is set, otherwise it counts for the L3 cache. This event counts read transactions returned from outside the core if those transactions are either hit in the system level cache or missed in the SLC and are returned from any other external sources."
8 "PublicDescription": "Counts read transactions that were returned from outside the core cluster but missed in the system level cache. This event counts for external last level cache when the system register CPUECTLR.EXTLLC bit is set, otherwise it counts for L3 cache. This event counts read transactions returned from outside the core if those transactions are missed in the System level Cache. The data source of the transaction is indicated by a field in the CHI transaction returning to the CPU. This event does not count reads caused by cache maintenance operations."
/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
H A Dll_cache.json4 "PublicDescription": "Counts read transactions that were returned from outside the core cluster. This event counts for external last level cache when the system register CPUECTLR.EXTLLC bit is set, otherwise it counts for the L3 cache. This event counts read transactions returned from outside the core if those transactions are either hit in the system level cache or missed in the SLC and are returned from any other external sources."
8 "PublicDescription": "Counts read transactions that were returned from outside the core cluster but missed in the system level cache. This event counts for external last level cache when the system register CPUECTLR.EXTLLC bit is set, otherwise it counts for L3 cache. This event counts read transactions returned from outside the core if those transactions are missed in the System level Cache. The data source of the transaction is indicated by a field in the CHI transaction returning to the CPU. This event does not count reads caused by cache maintenance operations."
/linux/sound/soc/codecs/
H A Drt-sdw-common.c28 * A value of zero will be returned on success, a negative errno will
29 * be returned in error cases.
54 * A value of zero will be returned on success, a negative errno will
55 * be returned in error cases.
81 * A value of zero will be returned on success, a negative errno will
82 * be returned in error cases.
105 * A button type will be returned regarding to buffer,
137 * A headset jack type will be returned, a negative errno will
138 * be returned in error cases.
188 * A button type will be returned regardin
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/linux/Documentation/userspace-api/media/rc/
H A Dlirc-write.rst28 File descriptor returned by ``open()``.
57 ``EINVAL`` is returned. Set the desired scancode in the ``scancode`` member,
60 set to 0, else ``EINVAL`` is returned. If there is no protocol encoder
62 ``EINVAL`` is returned. The write function blocks until the scancode
68 On success, the number of bytes written is returned. It is not an error if
70 of data required for one frame. On error, -1 is returned, and the ``errno``
/linux/Documentation/userspace-api/media/mediactl/
H A Dmedia-request-ioc-queue.rst26 File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`.
37 If the request was already queued before, then ``EBUSY`` is returned.
38 Other errors can be returned if the contents of the request contained
48 (without a request). ``EBUSY`` will be returned if the first buffer was
57 On success 0 is returned, on error -1 and the ``errno`` variable is set
67 to have at least one buffer. This can also be returned if some required
/linux/net/netlabel/
H A Dnetlabel_addrlist.c42 * is found it is returned, otherwise NULL is returned. The caller is
66 * it is returned, otherwise NULL is returned. The caller is responsible for
92 * is found it is returned, otherwise NULL is returned. The caller is
117 * it is returned, otherwise NULL is returned. The caller is responsible for
144 * returned, otherwise a negative value is returned
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/linux/Documentation/userspace-api/media/cec/
H A Dcec-ioc-g-mode.rst29 File descriptor returned by :c:func:`open()`.
132 was specified, the ``EINVAL`` error code is returned in that case.
142 was specified, the ``EINVAL`` error code is returned in that case.
155 the ``EINVAL`` error code is returned in that case.
162 otherwise the ``EINVAL`` error code will be returned.
164 capability is set, otherwise the ``EINVAL`` error code is returned.
169 capability. If that is not set, then the ``EPERM`` error code is returned.
176 otherwise the ``EINVAL`` error code will be returned.
182 that is not set, then the ``EPERM`` error code is returned.
189 the ``EINVAL`` error code will be returned
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/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Dmemory.json269 "BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the data is returned from local or remote dram.",
279 "BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the data is returned from local dram.",
289 "BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the data is returned from remote dram.",
329 "BriefDescription": "Counts all prefetch data reads that miss the L3 and the data is returned from local or remote dram.",
339 "BriefDescription": "Counts all prefetch data reads that miss the L3 and the data is returned from local dram.",
349 "BriefDescription": "Counts all prefetch data reads that miss the L3 and the data is returned from remote dram.",
389 "BriefDescription": "Counts prefetch RFOs that miss the L3 and the data is returned from local or remote dram.",
399 "BriefDescription": "Counts prefetch RFOs that miss the L3 and the data is returned from local dram.",
409 "BriefDescription": "Counts prefetch RFOs that miss the L3 and the data is returned from remote dram.",
449 "BriefDescription": "Counts all demand & prefetch RFOs that miss the L3 and the data is returned fro
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/linux/Documentation/admin-guide/device-mapper/
H A Dstatistics.rst108 region_id returned from @stats_create
114 region_id returned from @stats_create
122 are returned.
123 If it is not specified, all regions are returned.
136 region_id returned from @stats_create
140 If omitted, all lines are returned.
144 If omitted, all lines are returned.
180 region_id returned from @stats_create
194 region_id returned from @stats_create

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