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/linux-5.10/drivers/opp/
Dof.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
31 /* "operating-points-v2" can be an array for power domain providers */ in _opp_of_get_opp_desc_node()
32 return of_parse_phandle(np, "operating-points-v2", index); in _opp_of_get_opp_desc_node()
38 return _opp_of_get_opp_desc_node(dev->of_node, 0); in dev_pm_opp_of_get_opp_desc_node()
47 np = _opp_of_get_opp_desc_node(dev->of_node, index); in _managed_opp()
52 if (opp_table->np == np) { in _managed_opp()
55 * so will have same node-pointer, np. in _managed_opp()
57 * But the OPPs will be considered as shared only if the in _managed_opp()
58 * OPP table contains a "opp-shared" property. in _managed_opp()
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Dopp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
35 * |- device 1 (represents voltage domain 1)
36 * | |- opp 1 (availability, freq, voltage)
37 * | |- opp 2 ..
39 * | `- opp n ..
40 * |- device 2 (represents the next voltage domain)
42 * `- device m (represents mth voltage domain)
48 * struct dev_pm_opp - Generic OPP description structure
50 * of boot. It is expected only an optimal set of OPPs are
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Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
25 * The root of the list of all opp-tables. All opp_table structures branch off
26 * from here, with each opp_table containing the list of opps it supports in
38 list_for_each_entry(opp_dev, &opp_table->dev_list, node) in _find_opp_dev()
39 if (opp_dev->dev == dev) in _find_opp_dev()
51 mutex_lock(&opp_table->lock); in _find_opp_table_unlocked()
53 mutex_unlock(&opp_table->lock); in _find_opp_table_unlocked()
62 return ERR_PTR(-ENODEV); in _find_opp_table_unlocked()
66 * _find_opp_table() - find opp_table struct using device pointer
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Dcpu.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2014 Texas Instruments Incorporated.
25 * dev_pm_opp_init_cpufreq_table() - create a cpufreq table for a device
29 * Generate a cpufreq table for a provided device- this assumes that the
32 * This function allocates required memory for the cpufreq table. It is
33 * expected that the caller does the required maintenance such as freeing
34 * the table as required.
36 * Returns -EINVAL for bad pointers, -ENODEV if the device is not found, -ENOMEM
53 return max_opps ? max_opps : -ENODATA; in dev_pm_opp_init_cpufreq_table()
57 return -ENOMEM; in dev_pm_opp_init_cpufreq_table()
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/linux-5.10/Documentation/devicetree/bindings/power/
Dqcom,rpmpd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rajendra Nayak <rnayak@codeaurora.org>
19 - qcom,msm8976-rpmpd
20 - qcom,msm8996-rpmpd
21 - qcom,msm8998-rpmpd
22 - qcom,qcs404-rpmpd
23 - qcom,sc7180-rpmhpd
24 - qcom,sdm845-rpmhpd
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Dpower_domain.txt12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
20 Required properties:
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
32 leaky-device@12350000 {
33 compatible = "foo,i-leak-current";
35 power-domains = <&power 0>;
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/linux-5.10/Documentation/power/
Dopp.rst5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
31 OPPs.
39 We can represent these as three OPPs as the following {Hz, uV} tuples:
41 - {300000000, 1000000}
42 - {800000000, 1200000}
43 - {1000000000, 1300000}
46 ----------------------------------------
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/linux-5.10/Documentation/devicetree/bindings/opp/
Dopp.txt2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
6 Performance Points aka OPPs. This document defines bindings for these OPPs
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
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Dqcom-opp.txt3 The bindings are based on top of the operating-points-v2 bindings
9 Required properties:
10 - compatible: Allow OPPs to express their compatibility. It should be:
11 "operating-points-v2-qcom-level"
15 Required properties:
16 - qcom,opp-fuse-level: A positive value representing the fuse corner/level
Dqcom-nvmem-cpufreq.txt8 defines the voltage and frequency value based on the msm-id in SMEM
10 The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
11 to provide the OPP framework with required information (existing HW bitmap).
13 operating-points-v2 table when it is parsed by the OPP framework.
15 Required properties:
16 --------------------
18 - operating-points-v2: Phandle to the operating-points-v2 table to use.
20 In 'operating-points-v2' table:
21 - compatible: Should be
22 - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
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/linux-5.10/Documentation/devicetree/bindings/cpufreq/
Dti-cpufreq.txt5 families support different OPPs depending on the silicon variant in use.
6 The ti-cpufreq driver can use revision and an efuse value from the SoC to
8 used to determine which OPPs from the operating-points-v2 table get enabled
11 Required properties:
12 --------------------
14 - operating-points-v2: Phandle to the operating-points-v2 table to use.
16 In 'operating-points-v2' table:
17 - compatible: Should be
18 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
20 - syscon: A phandle pointing to a syscon node representing the control module
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Dcpufreq-dt.txt7 Both required and optional properties listed below must be defined
10 Required properties:
11 - None
14 - operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt for
15 details. OPPs *must* be supplied either via DT, i.e. this property, or
17 - clock-latency: Specify the possible maximum transition latency for clock,
19 - voltage-tolerance: Specify the CPU voltage tolerance in percentage.
20 - #cooling-cells:
22 Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml.
27 #address-cells = <1>;
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Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
4 Certain i.MX SoCs support different OPPs depending on the "market segment" and
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
8 Required properties:
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
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/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
16 #include <dt-bindings/interconnect/qcom,sdm845.h>
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Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
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/linux-5.10/drivers/firmware/
Darm_scpi.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * provides a mechanism for inter-processor communication between SCP's
155 /* List all commands that are required to go through the high priority link */
207 -1, /* GET_CLOCK_INFO */
216 -1, /* SET_DEVICE_PWR_STATE */
217 -1, /* GET_DEVICE_PWR_STATE */
259 * The SCP firmware only executes in little-endian mode, so any buffers
260 * shared through SCPI should have their contents converted to little-endian
307 } opps[MAX_DVFS_OPPS]; member
332 -EINVAL, /* SCPI_ERR_PARAM */
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/linux-5.10/Documentation/arm/omap/
Domap_pm.rst13 - support the range of power management parameters present in the TI SRF;
15 - separate the drivers from the underlying PM parameter
19 - specify PM parameters in terms of fundamental units, such as
23 - allow drivers which are shared with other architectures (e.g.,
24 DaVinci) to add these constraints in a way which won't affect non-OMAP
27 - can be implemented immediately with minimal disruption of other
36 (*pdata->set_max_mpu_wakeup_lat)(struct device *dev, unsigned long t)
40 (*pdata->set_max_dev_wakeup_lat)(struct device *dev, unsigned long t)
44 (*pdata->set_max_sdma_lat)(struct device *dev, long t)
48 (*pdata->set_min_bus_tput)(struct device *dev, u8 agent_id, unsigned long r)
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/linux-5.10/drivers/cpufreq/
Dcpufreq-dt.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include "cpufreq-dt.h"
41 NULL, /* Extra space for boost-attr if required */
50 if (cpumask_test_cpu(cpu, priv->cpus)) in cpufreq_dt_find_data()
59 struct private_data *priv = policy->driver_data; in set_target()
60 unsigned long freq = policy->freq_table[index].frequency; in set_target()
62 return dev_pm_opp_set_rate(priv->cpu_dev, freq * 1000); in set_target()
66 * An earlier version of opp-v1 bindings used to name the regulator
67 * "cpu0-supply", we still need to handle that for backwards compatibility.
73 int cpu = dev->id; in find_supply_name()
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DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
32 module will be called sun50i-cpufreq-nvmem.
77 Some Broadcom STB SoCs use a co-processor running proprietary firmware
84 tristate "Calxeda Highbank-based"
109 based on cpufreq-dt.
174 For details, take a look at <file:Documentation/cpu-freq>.
288 we will fall-back so safe-values contained in Device Tree. Enable
329 This driver enables valid OPPs on the running platform based on
331 use the cpufreq-dt driver on all Texas Instruments platforms that
332 provide dt based operating-points-v2 tables with opp-supported-hw
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/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dexynos5422-dmc.txt11 Required properties for DMC device for Exynos5422:
12 - compatible: Should be "samsung,exynos5422-dmc".
13 - clocks : list of clock specifiers, must contain an entry for each
14 required entry in clock-names for CLK_FOUT_SPLL, CLK_MOUT_SCLK_SPLL,
17 - clock-names : should include "fout_spll", "mout_sclk_spll", "ff_dout_spll2",
20 - devfreq-events : phandles for PPMU devices connected to this DMC.
21 - vdd-supply : phandle for voltage regulator which is connected.
22 - reg : registers of two CDREX controllers.
23 - operating-points-v2 : phandle for OPPs described in v2 definition.
24 - device-handle : phandle of the connected DRAM memory device. For more
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/linux-5.10/Documentation/devicetree/bindings/arm/
Darm,scmi.txt2 ----------------------------------------------------------
13 Required properties:
17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
28 - arm,smc-id : SMC id required when using smc or hvc transports
32 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
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/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c58 hws->ctx
60 hws->regs->reg
64 hws->shifts->field_name, hws->masks->field_name
68 if (dc->res_pool->gsl_groups.gsl_0 == 0) in find_free_gsl_group()
70 if (dc->res_pool->gsl_groups.gsl_1 == 0) in find_free_gsl_group()
72 if (dc->res_pool->gsl_groups.gsl_2 == 0) in find_free_gsl_group()
84 * - immediate flip: find first available GSL group if not already assigned
87 * - vsync flip: disable GSL if used
90 * gsl_0 <=> pipe_ctx->stream_res.gsl_group == 1
91 * Using a magic value like -1 would require tracking all inits/resets
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/linux-5.10/drivers/soc/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 the low-power state for resources related to the remoteproc
26 resource on a RPM-hardened platform must use this database to get
38 This driver populates CPU OPPs tables and makes adjustments to the
43 be called qcom-cpr
105 purpose of exchanging sector-data between the remote filesystem
111 bool "Qualcomm RPM-Hardened (RPMH) Communication"
114 Support for communication with the hardened-RPM blocks in
124 QCOM RPMh Power domain driver to support power-domains with
133 QCOM RPM Power domain driver to support power-domains with
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/linux-5.10/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_resource.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
109 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
110 .dcp = (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
113 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
114 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
117 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
118 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
121 .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),
122 .dcp = (mmDCP3_GRPH_CONTROL - mmGRPH_CONTROL),
125 .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL),
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/linux-5.10/drivers/thermal/
Dcpufreq_cooling.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2012-2018 Linaro Limited.
28 * Cooling state <-> CPUFreq frequency
36 * level 0 --> 1st Max Freq
37 * level 1 --> 2nd Max Freq
42 * struct time_in_idle - Idle time stats
52 * struct cpufreq_cooling_device - data for cooling device with cpufreq
68 * This structure is required for keeping information of each registered
90 * @cpufreq_cdev: cpufreq_cdev for which the property is required
100 for (i = cpufreq_cdev->max_level - 1; i >= 0; i--) { in get_level()
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