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/linux-6.15/drivers/net/xen-netback/
Drx.c3 * Copyright (c) 2002-2005, K A Fraser
38 * Note that any call sequence outside the RX thread calling this function
39 * needs to wake up the RX thread via a call of xenvif_kick_thread()
42 static void xenvif_update_needed_slots(struct xenvif_queue *queue, in xenvif_update_needed_slots() argument
48 needed = DIV_ROUND_UP(skb->len, XEN_PAGE_SIZE); in xenvif_update_needed_slots()
51 if (skb->sw_hash) in xenvif_update_needed_slots()
55 WRITE_ONCE(queue->rx_slots_needed, needed); in xenvif_update_needed_slots()
58 static bool xenvif_rx_ring_slots_available(struct xenvif_queue *queue) in xenvif_rx_ring_slots_available() argument
63 needed = READ_ONCE(queue->rx_slots_needed); in xenvif_rx_ring_slots_available()
68 prod = queue->rx.sring->req_prod; in xenvif_rx_ring_slots_available()
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/linux-6.15/Documentation/devicetree/bindings/net/
Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
15 Processing Engine) and the IXP4xx Queue Manager to process
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
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/linux-6.15/arch/arm/boot/dts/intel/ixp/
Dintel-ixp42x-goramo-multilink.dts1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cells = <1>;
23 #size-cells = <1>;
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/linux-6.15/drivers/net/ethernet/marvell/octeon_ep/
Doctep_rx.c1 // SPDX-License-Identifier: GPL-2.0
17 oq->host_read_idx = 0; in octep_oq_reset_indices()
18 oq->host_refill_idx = 0; in octep_oq_reset_indices()
19 oq->refill_count = 0; in octep_oq_reset_indices()
20 oq->last_pkt_count = 0; in octep_oq_reset_indices()
21 oq->pkts_pending = 0; in octep_oq_reset_indices()
25 * octep_oq_fill_ring_buffers() - fill initial receive buffers for Rx ring.
27 * @oq: Octeon Rx queue data structure.
30 * -1, if failed to allocate a buffer or failed to map for DMA.
34 struct octep_oq_desc_hw *desc_ring = oq->desc_ring; in octep_oq_fill_ring_buffers()
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/linux-6.15/drivers/net/ethernet/meta/fbnic/
Dfbnic_txrx.c1 // SPDX-License-Identifier: GPL-2.0
28 #define FBNIC_XMIT_CB(__skb) ((struct fbnic_xmit_cb *)((__skb)->cb))
32 unsigned long csr_base = (unsigned long)ring->doorbell; in fbnic_ring_csr_base()
34 csr_base &= ~(FBNIC_QUEUE_STRIDE * sizeof(u32) - 1); in fbnic_ring_csr_base()
54 * fbnic_ts40_to_ns() - convert descriptor timestamp to PHC time
72 s = u64_stats_fetch_begin(&fbn->time_seq); in fbnic_ts40_to_ns()
73 offset = READ_ONCE(fbn->time_offset); in fbnic_ts40_to_ns()
74 } while (u64_stats_fetch_retry(&fbn->time_seq, s)); in fbnic_ts40_to_ns()
76 high = READ_ONCE(fbn->time_high); in fbnic_ts40_to_ns()
81 /* Compare bits 32-39 between periodic reads and ts40, in fbnic_ts40_to_ns()
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/linux-6.15/drivers/net/ethernet/marvell/octeon_ep_vf/
Doctep_vf_rx.c1 // SPDX-License-Identifier: GPL-2.0
17 oq->host_read_idx = 0; in octep_vf_oq_reset_indices()
18 oq->host_refill_idx = 0; in octep_vf_oq_reset_indices()
19 oq->refill_count = 0; in octep_vf_oq_reset_indices()
20 oq->last_pkt_count = 0; in octep_vf_oq_reset_indices()
21 oq->pkts_pending = 0; in octep_vf_oq_reset_indices()
25 * octep_vf_oq_fill_ring_buffers() - fill initial receive buffers for Rx ring.
27 * @oq: Octeon Rx queue data structure.
30 * -ENOMEM, if failed to allocate a buffer or failed to map for DMA.
34 struct octep_vf_oq_desc_hw *desc_ring = oq->desc_ring; in octep_vf_oq_fill_ring_buffers()
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/linux-6.15/drivers/net/wireless/intel/iwlwifi/mld/
Drx.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2024-2025 Intel Corporation
11 * enum iwl_mld_internal_rxq_notif_type - RX queue sync notif types
22 * struct iwl_mld_internal_rxq_notif - @iwl_rxq_sync_cmd internal data.
29 * @payload: data to send to RX queues based on the type (may be empty)
39 * struct iwl_mld_rx_queues_sync - RX queues sync data
41 * @waitq: wait queue for RX queues sync completion
43 * @state: bitmask representing the sync state of RX queues
44 * all RX queues bits are set before sending the command, and the
45 * corresponding queue bit cleared upon handling the notification
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Dnotif.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2024-2025 Intel Corporation
11 #include "iwl-trans.h"
15 #include "fw/api/mac-cfg.h"
16 #include "session-protect.h"
17 #include "fw/api/time-event.h"
28 #include "rx.h"
37 #include "ftm-initiator.h"
54 /* Use this for Rx handlers that do not need notification validation */
70 struct iwl_rx_packet *pkt, \
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Dagg.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2024-2025 Intel Corporation
17 &baid_data->entries[reorder_buf->queue * in iwl_mld_reorder_release_frames()
18 baid_data->entries_per_queue]; in iwl_mld_reorder_release_frames()
19 u16 ssn = reorder_buf->head_sn; in iwl_mld_reorder_release_frames()
22 int index = ssn % baid_data->buf_size; in iwl_mld_reorder_release_frames()
28 /* Empty the list. Will have more than one frame for A-MSDU. in iwl_mld_reorder_release_frames()
34 reorder_buf->queue, in iwl_mld_reorder_release_frames()
36 reorder_buf->num_stored--; in iwl_mld_reorder_release_frames()
39 reorder_buf->head_sn = nssn; in iwl_mld_reorder_release_frames()
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Dagg.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
9 #include "fw/api/rx.h"
12 * struct iwl_mld_reorder_buffer - per ra/tid/queue reorder buffer
15 * @queue: queue of this reorder buffer
16 * @valid: true if reordering is valid for this queue
21 int queue; member
26 * struct iwl_mld_reorder_buf_entry - reorder buffer entry per-queue/per-seqno
27 * @frames: list of skbs stored. a list is necessary because in an A-MSDU,
28 * all sub-frames share the same sequence number, so they are stored
41 * struct iwl_mld_baid_data - Block Ack session data
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/linux-6.15/Documentation/devicetree/bindings/firmware/
Dintel,ixp4xx-network-processing-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
24 - items:
25 - const: intel,ixp4xx-network-processing-engine
29 - description: NPE0 (NPE-A) register range
30 - description: NPE1 (NPE-B) register range
31 - description: NPE2 (NPE-C) register range
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/linux-6.15/drivers/net/ethernet/broadcom/
Dbcmsysport.h1 /* SPDX-License-Identifier: GPL-2.0-only */
28 /* HW supports 40-bit addressing hence the */
31 /* Default RX buffer allocation size */
108 /* Level-2 Interrupt controller offsets and defines */
118 /* Level-2 instance 0 interrupt bits */
220 /* There is a 0xC gap between the end of RX and beginning of TX stats and then
221 * between the end of TX stats and the beginning of the RX RUNT
329 #define TDMA_PORT_SIZE DESC_SIZE /* two 32-bits words */
490 /* Internal linked-list RAM size */
496 /* Rx/Tx common counter group.*/
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/linux-6.15/drivers/net/ethernet/intel/ixgbevf/
Ddefines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
36 #define IXGBE_RXDCTL_ENABLE 0x02000000 /* Enable specific Rx Queue */
37 #define IXGBE_TXDCTL_ENABLE 0x02000000 /* Enable specific Tx Queue */
57 #define IXGBE_RXDCTL_ENABLE 0x02000000 /* Enable specific Rx Queue */
96 #define IXGBE_RXD_STAT_PIF 0x80 /* passed in-exact filter */
100 #define IXGBE_RXD_STAT_DYNINT 0x800 /* Pkt caused INT via DYNINT */
131 #define IXGBE_RXDADV_STAT_VP IXGBE_RXD_STAT_VP /* IEEE VLAN Pkt */
132 #define IXGBE_RXDADV_STAT_MASK 0x000FFFFF /* Stat/NEXTP: bit 0-19 */
134 #define IXGBE_RXDADV_STAT_FCSTAT 0x00000030 /* FCoE Pkt Stat */
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/linux-6.15/drivers/net/wireless/intel/iwlwifi/pcie/
Drx.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2003-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 #include "iwl-prph.h"
12 #include "iwl-io.h"
14 #include "iwl-op-mode.h"
15 #include "iwl-context-info-gen3.h"
19 * RX path functions
24 * Rx theory of operation
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/linux-6.15/drivers/tty/ipwireless/
Dhardware.c1 // SPDX-License-Identifier: GPL-2.0
13 * Copyright (C) 2006-2007 Jiri Kosina
60 timing_stats.read_time += (jiffies - start_time); in end_read_timing()
67 timing_stats.write_time += (jiffies - start_time); in end_write_timing()
74 unsigned long since = jiffies - timing_stats.last_report_time; in report_timing()
83 ": %u us elapsed - read %lu bytes in %u us, wrote %lu bytes in %u us\n", in report_timing()
163 #define HW_VERSION_UNKNOWN -1
174 #define IORXR 0x0C /* Rx Fifo Register (Host to Embedded) */
209 unsigned short memreg_rx; /* RX Register (R/W) */
252 /* True if there is RX data ready on the hardware. */
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/linux-6.15/drivers/net/ethernet/huawei/hinic/
Dhinic_rx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/dma-mapping.h>
46 (HINIC_GET_RX_PKT_TYPE(be32_to_cpu((cqe)->offload_type)) == \
50 * hinic_rxq_clean_stats - Clean the statistics of specific queue
51 * @rxq: Logical Rx Queue
55 struct hinic_rxq_stats *rxq_stats = &rxq->rxq_stats; in hinic_rxq_clean_stats()
57 u64_stats_update_begin(&rxq_stats->syncp); in hinic_rxq_clean_stats()
58 rxq_stats->pkts = 0; in hinic_rxq_clean_stats()
59 rxq_stats->bytes = 0; in hinic_rxq_clean_stats()
60 rxq_stats->errors = 0; in hinic_rxq_clean_stats()
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/linux-6.15/drivers/net/ethernet/chelsio/cxgb4vf/
Dsge.c2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
43 #include <linux/dma-mapping.h>
59 * Egress Queue sizes, producer and consumer indices are all in units
61 * concerned, the free list is an Egress Queue (the host produces free
63 * 64-bit PCI DMA addresses.
78 * Max number of Rx buffers we replenish at a time. Again keep this
84 * Period of the Rx queue check timer. This timer is infrequent as it
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/linux-6.15/drivers/net/wireless/marvell/libertas_tf/
Dlibertas_tf.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2003-2006, Marvell International Ltd.
89 * station firmware to store Rx packet information.
205 /** command-related variables */
260 /* 802.11-related definitions */
277 /* Pkt Priority */
279 /* Pkt Trasnit Power control */
289 /* Current Rx packet status */
298 /* Pkt length */
304 /* Rx Packet Rate */
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/linux-6.15/drivers/net/ethernet/qlogic/qed/
Dqed_ll2.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
30 (QED_MAX_NUM_OF_LL2_CONNS_PF - QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF)
62 /* Lock protecting the Rx queue manipulation */
79 /* Lock protecting the Tx queue manipulation */
122 * starts rx & tx (if relevant) queues pair.
126 * @cxt: Pointer to the hw-function [opaque to some].
136 * @cxt: Pointer to the hw-function [opaque to some].
145 * qed_ll2_post_rx_buffer(): Submit buffers to LL2 Rx queue.
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/linux-6.15/drivers/net/ethernet/google/gve/
Dgve.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2015-2024 Google LLC
10 #include <linux/dma-mapping.h>
33 /* 1 for management, 1 for rx, 1 for tx */
36 /* Numbers of gve tx/rx stats in stats report. */
43 /* Numbers of NIC tx/rx stats in stats report. */
49 #define GVE_DATA_SLOT_ADDR_PAGE_MASK (~(PAGE_SIZE - 1))
71 (GVE_ADMINQ_BUFFER_SIZE / sizeof(((struct gve_adminq_queried_flow_rule *)0)->location))
89 /* 2K buffers for DQO-QPL */
95 * allocs and uses a non-qpl page on the receive path of DQO QPL to free
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/linux-6.15/Documentation/networking/
Daf_xdp.rst1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
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/linux-6.15/drivers/net/wireless/intel/iwlwifi/mvm/
Dops.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
12 #include "fw/notif-wait.h"
13 #include "iwl-trans.h"
14 #include "iwl-op-mode.h"
16 #include "iwl-debug.h"
17 #include "iwl-drv.h"
18 #include "iwl-modparams.h"
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/linux-6.15/drivers/net/wireless/intel/iwlegacy/
D4965-mac.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
22 #include <linux/dma-mapping.h>
71 if (!test_bit(S_EXIT_PENDING, &il->status)) in il4965_check_abort_status()
72 queue_work(il->workqueue, &il->tx_flush); in il4965_check_abort_status()
89 spin_lock_irqsave(&rxq->lock, flags); in il4965_rx_queue_reset()
90 INIT_LIST_HEAD(&rxq->rx_free); in il4965_rx_queue_reset()
91 INIT_LIST_HEAD(&rxq->rx_used); in il4965_rx_queue_reset()
92 /* Fill the rx_used queue with _all_ of the Rx buffers */ in il4965_rx_queue_reset()
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Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 #include <linux/dma-mapping.h>
39 return -ETIMEDOUT; in _il_poll_bit()
48 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_set_bit()
50 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_set_bit()
59 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_clear_bit()
61 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_clear_bit()
79 * to/from host DRAM when sleeping/waking for power-saving. in _il_grab_nic_access()
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/linux-6.15/drivers/net/ethernet/broadcom/genet/
Dbcmgenet.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2014-2025 Broadcom
24 /* total number of Buffer Descriptors, same for Rx/Tx */
49 u32 rx_csum; /* partial rx checksum */
55 /* Rx status bits */
79 /* Rx/Tx common counter group */
82 u32 cnt_127; /* RO Rx/Tx 127 bytes packet */
83 u32 cnt_255; /* RO Rx/Tx 65-255 bytes packet */
84 u32 cnt_511; /* RO Rx/Tx 256-511 bytes packet */
85 u32 cnt_1023; /* RO Rx/Tx 512-1023 bytes packet */
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