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/linux/drivers/media/platform/allegro-dvt/
H A Dallegro-core.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/xlnx-vcu.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-event.h>
29 #include <media/v4l2-ioctl.h>
30 #include <media/v4l2-mem2mem.h>
31 #include <media/videobuf2-dma-contig.h>
32 #include <media/videobuf2-v4l2.h>
34 #include "allegro-mail.h"
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/linux/Documentation/ABI/testing/
H A Dsysfs-ptp41 Write integer to re-configure it.
93 and the channel number. The function and channel
103 "1" means that the PPS is supported, while "0" means
110 This write-only file enables or disables external
112 channel index followed by a "1" into the file.
113 To disable external timestamps, write the channel
121 the form of three integers: channel index, seconds,
128 This write-only file enables or disables periodic
130 integers into the file: channel index, start time
139 This write-only file enables or disables delivery of
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/linux/drivers/gpu/drm/
H A Ddrm_mipi_dsi.c4 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
40 #include <linux/media-bus-format.h>
63 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
75 if (err != -ENODEV) in mipi_dsi_uevent()
79 dsi->name); in mipi_dsi_uevent()
96 .name = "mipi-dsi",
104 * of_find_mipi_dsi_device_by_node() - find the MIPI DSI device matching a
125 of_node_put(dev->of_node); in mipi_dsi_dev_release()
139 return ERR_PTR(-ENOMEM); in mipi_dsi_device_alloc()
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/linux/tools/testing/selftests/ptp/
H A Dtestptp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock support - User space test program
35 #define CLOCK_INVALID -1
113 return t->sec * NSEC_PER_SEC + t->nsec; in pctns()
120 " -c query the ptp clock's capabilities\n" in usage()
121 " -d name device to open\n" in usage()
122 " -e val read 'val' external time stamp events\n" in usage()
123 " -E val enable rising (1), falling (2), or both (3) edges\n" in usage()
124 " -f val adjust the ptp clock frequency by 'val' ppb\n" in usage()
125 " -F chan Enable single channel mask and keep device open for debugfs verification.\n" in usage()
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/linux/drivers/staging/sm750fb/
H A Dsm750_hw.c1 // SPDX-License-Identifier: GPL-2.0
34 sm750_dev->vidreg_start = pci_resource_start(pdev, 1); in hw_sm750_map()
35 sm750_dev->vidreg_size = SZ_2M; in hw_sm750_map()
37 pr_info("mmio phyAddr = %lx\n", sm750_dev->vidreg_start); in hw_sm750_map()
52 sm750_dev->pvReg = in hw_sm750_map()
53 ioremap(sm750_dev->vidreg_start, sm750_dev->vidreg_size); in hw_sm750_map()
54 if (!sm750_dev->pvReg) { in hw_sm750_map()
56 ret = -EFAULT; in hw_sm750_map()
59 pr_info("mmio virtual addr = %p\n", sm750_dev->pvReg); in hw_sm750_map()
61 sm750_dev->accel.dprBase = sm750_dev->pvReg + DE_BASE_ADDR_TYPE1; in hw_sm750_map()
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_lvds.c2 * Copyright © 2006-2007 Intel Corporation
110 wakeref = intel_display_power_get_if_enabled(display, encoder->power_domain); in intel_lvds_get_hw_state()
114 ret = intel_lvds_port_enabled(display, lvds_encoder->reg, pipe); in intel_lvds_get_hw_state()
116 intel_display_power_put(display, encoder->power_domain, wakeref); in intel_lvds_get_hw_state()
128 crtc_state->output_types |= BIT(INTEL_OUTPUT_LVDS); in intel_lvds_get_config()
130 tmp = intel_de_read(display, lvds_encoder->reg); in intel_lvds_get_config()
140 crtc_state->hw.adjusted_mode.flags |= flags; in intel_lvds_get_config()
143 crtc_state->gmch_pfit.lvds_border_bits = in intel_lvds_get_config()
150 crtc_state->gmch_pfit.control |= tmp & PFIT_PANEL_8TO6_DITHER_ENABLE; in intel_lvds_get_config()
153 crtc_state->hw.adjusted_mode.crtc_clock = crtc_state->port_clock; in intel_lvds_get_config()
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H A Dintel_pps.c1 // SPDX-License-Identifier: MIT
35 struct intel_pps *pps = &intel_dp->pps; in pps_name() local
37 if (display->platform.valleyview || display->platform.cherryview) { in pps_name()
38 switch (pps->vlv_pps_pipe) { in pps_name()
42 * to always have a valid PPS when calling this. in pps_name()
44 return "PPS <none>"; in pps_name()
46 return "PPS A"; in pps_name()
48 return "PPS B"; in pps_name()
50 MISSING_CASE(pps->vlv_pps_pipe); in pps_name()
54 switch (pps->pps_idx) { in pps_name()
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/linux/include/linux/
H A Dptp_clock_kernel.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 * struct ptp_clock_request - request PTP clock event
23 * PEROUT: Configure periodic output signal (e.g. PPS)
24 * PPS: trigger internal PPS event for input
25 * into kernel PPS subsystem
47 * struct ptp_system_timestamp - system time corresponding to a PHC timestamp
50 * @clockid: clock-base used for capturing the system timestamps
59 * struct ptp_clock_info - describes a PTP hardware clock
70 * @pps: Indicates whether the clock supports a PPS callback.
171 * parameter chan: the function channel index to use.
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/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_ptp.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * Scaled parts per million is ppm with a 16-bit binary fractional field.
30 addend = adjust_by_scaled_ppm(priv->default_addend, scaled_ppm); in stmmac_adjust_freq()
32 write_lock_irqsave(&priv->ptp_lock, flags); in stmmac_adjust_freq()
33 stmmac_config_addend(priv, priv->ptpaddr, addend); in stmmac_adjust_freq()
34 write_unlock_irqrestore(&priv->ptp_lock, flags); in stmmac_adjust_freq()
58 xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac; in stmmac_adjust_time()
62 delta = -delta; in stmmac_adjust_time()
70 if (priv->est && priv->est->enable) { in stmmac_adjust_time()
72 mutex_lock(&priv->est_lock); in stmmac_adjust_time()
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/linux/Documentation/devicetree/bindings/dpll/
H A Ddpll-device.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dpll/dpll-device.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Digital Phase-Locked Loop (DPLL) Device
10 - Ivan Vecera <ivecera@redhat.com>
13 Digital Phase-Locked Loop (DPLL) device is used for precise clock
16 output pins. Each DPLL channel can either produce pulse-per-clock signal
17 or drive ethernet equipment clock. The type of each channel can be
18 indicated by dpll-types property.
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-gw5907.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
21 stdout-path = &uart2;
24 gpio-keys {
25 compatible = "gpio-keys";
27 user-pb {
33 user-pb1x {
36 interrupt-parent = <&gsc>;
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H A Dimx6qdl-gw5913.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
21 stdout-path = &uart2;
24 gpio-keys {
25 compatible = "gpio-keys";
27 user-pb {
33 user-pb1x {
36 interrupt-parent = <&gsc>;
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H A Dimx6qdl-gw5912.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
22 stdout-path = &uart2;
25 gpio-keys {
26 compatible = "gpio-keys";
28 user-pb {
34 user-pb1x {
37 interrupt-parent = <&gsc>;
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H A Dimx6qdl-gw5910.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
19 stdout-path = &uart2;
27 gpio-keys {
28 compatible = "gpio-keys";
30 user-pb {
36 user-pb1x {
39 interrupt-parent = <&gsc>;
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H A Dimx6qdl-gw51xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
24 gpio-keys {
25 compatible = "gpio-keys";
27 user-pb {
33 user-pb1x {
36 interrupt-parent = <&gsc>;
40 key-erased {
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H A Dimx6qdl-gw553x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
21 stdout-path = &uart2;
24 gpio-keys {
25 compatible = "gpio-keys";
27 user-pb {
33 user-pb1x {
36 interrupt-parent = <&gsc>;
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H A Dimx6qdl-gw53xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
27 compatible = "pwm-backlight";
29 brightness-levels = <0 4 8 16 32 64 128 255>;
30 default-brightness-level = <7>;
33 gpio-keys {
34 compatible = "gpio-keys";
36 user-pb {
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/linux/include/uapi/linux/
H A Dptp_clock.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * PTP 1588 clock support - user space interface
80 * struct ptp_clock_time - represents a time value
84 * included for sub-nanosecond resolution, should the demand for
99 int pps; /* Whether the clock supports a PPS callback. */ member
101 /* Whether the clock supports precise system-device cross timestamps */
110 unsigned int index; /* Which channel to configure. */
131 unsigned int index; /* Which channel to configure. */
159 * ptp_sys_offset_extended - data structure for IOCTL operation
163 * @clockid: clockid of a clock-base used for pre/post timestamps.
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/linux/Documentation/devicetree/bindings/net/
H A Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
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/linux/drivers/gpu/drm/amd/display/dc/dio/dcn30/
H A Ddcn30_dio_stream_encoder.c34 enc1->base.ctx->logger
37 (enc1->regs->reg)
41 enc1->se_shift->field_name, enc1->se_mask->field_name
47 enc1->base.ctx
57 if (info_packet->valid) { in enc3_update_hdmi_info_packet()
58 enc1->base.vpg->funcs->update_generic_info_packet( in enc3_update_hdmi_info_packet()
59 enc1->base.vpg, in enc3_update_hdmi_info_packet()
64 /* enable transmission of packet(s) - in enc3_update_hdmi_info_packet()
77 /* DP_SEC_GSP[x]_LINE_REFERENCE - keep default value REFER_TO_DP_SOF */ in enc3_update_hdmi_info_packet()
206 enc3_update_hdmi_info_packet(enc1, 0, &info_frame->avi); in enc3_stream_encoder_update_hdmi_info_packets()
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/linux/drivers/net/ethernet/sfc/
H A Dptp.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2011-2013 Solarflare Communications Inc.
116 /* 01-1B-19-00-00-00 */
142 #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1)
143 #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1)
145 /* Maximum parts-per-billion adjustment that is acceptable */
160 * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area.
163 * @state: The state of the packet - whether it is ready for processing or
172 * struct efx_ptp_event_rx - A PTP receive event (from MC)
188 * struct efx_ptp_timeset - Synchronisation between host and MC
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/linux/drivers/net/ethernet/sfc/siena/
H A Dptp.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2011-2013 Solarflare Communications Inc.
143 #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1)
144 #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1)
146 /* Maximum parts-per-billion adjustment that is acceptable */
161 * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area.
165 * @state: The state of the packet - whether it is ready for processing or
175 * struct efx_ptp_event_rx - A PTP receive event (from MC)
191 * struct efx_ptp_timeset - Synchronisation between host and MC
207 u32 window; /* Derived: end - start, allowing for wrap */
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/linux/drivers/net/ethernet/synopsys/
H A Ddwc-xlgmac-common.c5 * This program is dual-licensed; you may select either version 2 of
21 #include "dwc-xlgmac.h"
22 #include "dwc-xlgmac-reg.h"
24 static int debug = -1;
34 struct net_device *netdev = pdata->netdev; in xlgmac_read_mac_addr()
37 memcpy(pdata->mac_addr, dev_addr, netdev->addr_len); in xlgmac_read_mac_addr()
42 pdata->tx_osp_mode = DMA_OSP_ENABLE; in xlgmac_default_config()
43 pdata->tx_sf_mode = MTL_TSF_ENABLE; in xlgmac_default_config()
44 pdata->rx_sf_mode = MTL_RSF_DISABLE; in xlgmac_default_config()
45 pdata->pblx8 = DMA_PBL_X8_ENABLE; in xlgmac_default_config()
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/linux/sound/usb/
H A Dcard.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 unsigned int fmt_type; /* USB audio format type (1-3) */
19 unsigned int frame_size; /* samples per frame for non-audio */
40 struct snd_pcm_chmap_elem *chmap; /* (optional) channel map */
69 int opened; /* open refcount; protect with chip->mutex */
109 unsigned int sample_rem; /* remainder from division fs/pps */
111 unsigned int pps; /* packets per second */ member
132 bool lowlatency_playback; /* low-latency playback mode */
133 bool need_setup; /* (re-)need for hw_params? */
134 bool need_prepare; /* (re-)need for prepare? */
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
29 stdout-path = &uart2;
38 compatible = "fixed-clock";
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