Home
last modified time | relevance | path

Searched +full:opp +full:- +full:table (Results 1 – 25 of 163) sorted by relevance

1234567

/linux-5.10/drivers/opp/
Dcpu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Generic OPP helper interface for CPU device
5 * Copyright (C) 2009-2014 Texas Instruments Incorporated.
20 #include "opp.h"
25 * dev_pm_opp_init_cpufreq_table() - create a cpufreq table for a device
27 * @table: Cpufreq table returned back to caller
29 * Generate a cpufreq table for a provided device- this assumes that the
30 * opp table is already initialized and ready for usage.
32 * This function allocates required memory for the cpufreq table. It is
34 * the table as required.
[all …]
Dof.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Generic OPP OF helpers
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
22 #include "opp.h"
25 * Returns opp descriptor node for a device node, caller must
31 /* "operating-points-v2" can be an array for power domain providers */ in _opp_of_get_opp_desc_node()
32 return of_parse_phandle(np, "operating-points-v2", index); in _opp_of_get_opp_desc_node()
35 /* Returns opp descriptor node for a device, caller must do of_node_put() */
38 return _opp_of_get_opp_desc_node(dev->of_node, 0); in dev_pm_opp_of_get_opp_desc_node()
47 np = _opp_of_get_opp_desc_node(dev->of_node, index); in _managed_opp()
[all …]
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Generic OPP Interface
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
22 #include "opp.h"
25 * The root of the list of all opp-tables. All opp_table structures branch off
30 /* Lock to allow exclusive modification to the device and opp lists */
38 list_for_each_entry(opp_dev, &opp_table->dev_list, node) in _find_opp_dev()
39 if (opp_dev->dev == dev) in _find_opp_dev()
51 mutex_lock(&opp_table->lock); in _find_opp_table_unlocked()
53 mutex_unlock(&opp_table->lock); in _find_opp_table_unlocked()
[all …]
Dopp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Generic OPP Interface
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
26 /* Lock to allow exclusive modification to the device and opp lists */
32 * Internal data structure organization with the OPP layer library is as
35 * |- device 1 (represents voltage domain 1)
36 * | |- opp 1 (availability, freq, voltage)
37 * | |- opp 2 ..
39 * | `- opp n ..
40 * |- device 2 (represents the next voltage domain)
[all …]
Dti-opp-supply.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
5 * Dave Gerlach <d-gerlach@ti.com>
7 * TI OPP supply driver that provides override into the regulator control
8 * for generic opp core to handle devices with ABB regulator and/or
25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table
35 * struct ti_opp_supply_data - OMAP specific opp supply data
36 * @vdd_table: Optimized voltage mapping table
49 * struct ti_opp_supply_of_data - device tree match data
50 * @flags: specific type of opp supply
[all …]
/linux-5.10/Documentation/devicetree/bindings/power/
Dqcom,rpmpd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rajendra Nayak <rnayak@codeaurora.org>
19 - qcom,msm8976-rpmpd
20 - qcom,msm8996-rpmpd
21 - qcom,msm8998-rpmpd
22 - qcom,qcs404-rpmpd
23 - qcom,sc7180-rpmhpd
24 - qcom,sdm845-rpmhpd
[all …]
Dpower_domain.txt12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
32 leaky-device@12350000 {
33 compatible = "foo,i-leak-current";
35 power-domains = <&power 0>;
36 power-domain-names = "io";
[all …]
/linux-5.10/Documentation/devicetree/bindings/cpufreq/
Dti-cpufreq.txt1 TI CPUFreq and OPP bindings
6 The ti-cpufreq driver can use revision and an efuse value from the SoC to
7 provide the OPP framework with supported hardware information. This is
8 used to determine which OPPs from the operating-points-v2 table get enabled
9 when it is parsed by the OPP framework.
12 --------------------
14 - operating-points-v2: Phandle to the operating-points-v2 table to use.
16 In 'operating-points-v2' table:
17 - compatible: Should be
18 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
[all …]
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
25 opp-1000000000 {
[all …]
/linux-5.10/Documentation/devicetree/bindings/opp/
Dopp.txt1 Generic OPP (Operating Performance Points) Bindings
2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
10 This document contain multiple versions of OPP binding and only one of them
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
[all …]
Dqcom-nvmem-cpufreq.txt1 Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
5 the CPU frequencies subset and voltage value of each OPP varies based on
8 defines the voltage and frequency value based on the msm-id in SMEM
10 The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
11 to provide the OPP framework with required information (existing HW bitmap).
12 This is used to determine the voltage and frequency value for each OPP of
13 operating-points-v2 table when it is parsed by the OPP framework.
16 --------------------
18 - operating-points-v2: Phandle to the operating-points-v2 table to use.
20 In 'operating-points-v2' table:
[all …]
Dqcom-opp.txt1 Qualcomm OPP bindings to describe OPP nodes
3 The bindings are based on top of the operating-points-v2 bindings
4 described in Documentation/devicetree/bindings/opp/opp.txt
7 * OPP Table Node
10 - compatible: Allow OPPs to express their compatibility. It should be:
11 "operating-points-v2-qcom-level"
13 * OPP Node
16 - qcom,opp-fuse-level: A positive value representing the fuse corner/level
17 associated with this OPP node. Sometimes several corners/levels shares
/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-s922x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12b.dtsi"
10 cpu_opp_table_0: opp-table-0 {
11 compatible = "operating-points-v2";
12 opp-shared;
14 opp-100000000 {
15 opp-hz = /bits/ 64 <100000000>;
16 opp-microvolt = <731000>;
19 opp-250000000 {
20 opp-hz = /bits/ 64 <250000000>;
[all …]
Dmeson-g12b-a311d.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12b.dtsi"
10 cpu_opp_table_0: opp-table-0 {
11 compatible = "operating-points-v2";
12 opp-shared;
14 opp-100000000 {
15 opp-hz = /bits/ 64 <100000000>;
16 opp-microvolt = <731000>;
19 opp-250000000 {
20 opp-hz = /bits/ 64 <250000000>;
[all …]
Dmeson-gx-mali450.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 gpu_opp_table: opp-table {
9 compatible = "operating-points-v2";
11 opp-125000000 {
12 opp-hz = /bits/ 64 <125000000>;
13 opp-microvolt = <950000>;
15 opp-250000000 {
16 opp-hz = /bits/ 64 <250000000>;
17 opp-microvolt = <950000>;
19 opp-285714285 {
[all …]
/linux-5.10/drivers/cpufreq/
Dqcom-cpufreq-hw.c1 // SPDX-License-Identifier: GPL-2.0
45 struct dev_pm_opp *opp; in qcom_cpufreq_set_bw() local
49 dev = get_cpu_device(policy->cpu); in qcom_cpufreq_set_bw()
51 return -ENODEV; in qcom_cpufreq_set_bw()
53 opp = dev_pm_opp_find_freq_exact(dev, freq_hz, true); in qcom_cpufreq_set_bw()
54 if (IS_ERR(opp)) in qcom_cpufreq_set_bw()
55 return PTR_ERR(opp); in qcom_cpufreq_set_bw()
57 ret = dev_pm_opp_set_bw(dev, opp); in qcom_cpufreq_set_bw()
58 dev_pm_opp_put(opp); in qcom_cpufreq_set_bw()
69 /* Skip voltage update if the opp table is not available */ in qcom_cpufreq_update_opp()
[all …]
Dcpufreq-dt.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include "cpufreq-dt.h"
41 NULL, /* Extra space for boost-attr if required */
50 if (cpumask_test_cpu(cpu, priv->cpus)) in cpufreq_dt_find_data()
59 struct private_data *priv = policy->driver_data; in set_target()
60 unsigned long freq = policy->freq_table[index].frequency; in set_target()
62 return dev_pm_opp_set_rate(priv->cpu_dev, freq * 1000); in set_target()
66 * An earlier version of opp-v1 bindings used to name the regulator
67 * "cpu0-supply", we still need to handle that for backwards compatibility.
73 int cpu = dev->id; in find_supply_name()
[all …]
/linux-5.10/arch/arm/boot/dts/
Domap34xx.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/media/omap3-isp.h>
19 /* OMAP343x/OMAP35xx variants OPP1-6 */
20 operating-points-v2 = <&cpu0_opp_table>;
22 clock-latency = <300000>; /* From legacy driver */
23 #cooling-cells = <2>;
27 /* see Documentation/devicetree/bindings/opp/opp.txt */
28 cpu0_opp_table: opp-table {
29 compatible = "operating-points-v2-ti-cpu";
[all …]
Domap36xx.dtsi4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/media/omap3-isp.h>
24 operating-points-v2 = <&cpu0_opp_table>;
26 vbb-supply = <&abb_mpu_iva>;
27 clock-latency = <300000>; /* From omap-cpufreq driver */
28 #cooling-cells = <2>;
32 /* see Documentation/devicetree/bindings/opp/opp.txt */
33 cpu0_opp_table: opp-table {
34 compatible = "operating-points-v2-ti-cpu";
[all …]
/linux-5.10/drivers/devfreq/
Dgovernor_passive.c1 // SPDX-License-Identifier: GPL-2.0-only
19 = (struct devfreq_passive_data *)devfreq->data; in devfreq_passive_get_target_freq()
20 struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent; in devfreq_passive_get_target_freq()
22 struct dev_pm_opp *opp; in devfreq_passive_get_target_freq() local
30 if (p_data->get_target_freq) { in devfreq_passive_get_target_freq()
31 ret = p_data->get_target_freq(devfreq, freq); in devfreq_passive_get_target_freq()
36 * If the parent and passive devfreq device uses the OPP table, in devfreq_passive_get_target_freq()
37 * get the next frequency by using the OPP table. in devfreq_passive_get_target_freq()
41 * - parent devfreq device uses the governors except for passive. in devfreq_passive_get_target_freq()
42 * - passive devfreq device uses the passive governor. in devfreq_passive_get_target_freq()
[all …]
/linux-5.10/Documentation/power/
Dopp.rst2 Operating Performance Points (OPP) Library
5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
10 2. Initial OPP List Registration
11 3. OPP Search Functions
12 4. OPP Availability Control Functions
13 5. OPP Data Retrieval Functions
19 1.1 What is an Operating Performance Point (OPP)?
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
[all …]
/linux-5.10/drivers/thermal/
Ddevfreq_cooling.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014-2015 ARM Limited
9 * - If OPPs are added or removed after devfreq cooling has
30 * struct devfreq_cooling_device - Devfreq cooling device
36 * @power_table: Pointer to table with maximum power draw for each
37 * cooling state. State is the index into the table, and
39 * @freq_table: Pointer to a table with the frequencies sorted in descending
40 * order. You can index the table by cooling device state
71 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_max_state()
73 *state = dfc->freq_table_size - 1; in devfreq_cooling_get_max_state()
[all …]
/linux-5.10/Documentation/devicetree/bindings/power/avs/
Dqcom,cpr.txt4 or other device. Each OPP of a device corresponds to a "corner" that has
10 - compatible:
13 Definition: should be "qcom,qcs404-cpr", "qcom,cpr" for qcs404
15 - reg:
17 Value type: <prop-encoded-array>
20 - interrupts:
22 Value type: <prop-encoded-array>
25 - clocks:
27 Value type: <prop-encoded-array>
30 - clock-names:
[all …]
/linux-5.10/Documentation/devicetree/bindings/devfreq/
Dexynos-bus.txt4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture
9 is able to measure the current load of sub-blocks.
11 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
13 power line. The power line might be shared among one more sub-blocks.
14 So, we can divide into two type of device as the role of each sub-block.
16 - parent bus device
17 - passive bus device
26 VDD_xxx |--- A block (parent)
27 |--- B block (passive)
28 |--- C block (passive)
[all …]
/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
5 cpu_opp_table: cpu-opp-table {
6 compatible = "operating-points-v2";
7 opp-shared;
9 opp-408000000 {
10 opp-hz = /bits/ 64 <408000000>;
11 opp-microvolt = <1000000 1000000 1310000>;
12 clock-latency-ns = <244144>; /* 8 32k periods */
15 opp-648000000 {
[all …]

1234567