| /linux/Documentation/devicetree/bindings/gpu/host1x/ |
| H A D | nvidia,tegra210-nvenc.yaml | 4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
7 title: NVIDIA Tegra NVENC
10 NVENC is the hardware video encoder present on NVIDIA Tegra210
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
25 - nvidia,tegra186-nvenc
26 - nvidia,tegra194-nvenc
36 - const: nvenc
43 - const: nvenc
83 - nvidia,tegra210-nvenc
[all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ |
| H A D | nvenc.c | 6 #include <engine/nvenc.h>
17 struct nvkm_nvenc *nvenc; in nvkm_rm_nvenc_new() local
20 nvenc = kzalloc(sizeof(*nvenc), GFP_KERNEL); in nvkm_rm_nvenc_new()
21 if (!nvenc) in nvkm_rm_nvenc_new()
25 &rm->gpu->nvenc.class, 1, &nvenc->engine); in nvkm_rm_nvenc_new()
27 kfree(nvenc); in nvkm_rm_nvenc_new()
31 rm->device->nvenc[inst] = nvenc; in nvkm_rm_nvenc_new()
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| H A D | engine.c | 62 ret = rm->api->nvenc->alloc(chan, handle, class, inst, &obj->rm); in nvkm_rm_engine_obj_new()
170 if (WARN_ON(inst >= ARRAY_SIZE(device->nvenc))) in nvkm_rm_engine_new()
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| H A D | ad10x.c | 37 .nvenc.class = NVC9B7_VIDEO_ENCODER,
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| H A D | tu1xx.c | 37 .nvenc.class = NVC4B7_VIDEO_ENCODER,
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| H A D | ga1xx.c | 37 .nvenc.class = NVC7B7_VIDEO_ENCODER,
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| H A D | gb20x.c | 41 .nvenc.class = NVCFB7_VIDEO_ENCODER,
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| H A D | gpu.h | 52 } nvenc; member
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| H A D | Kbuild | 8 nvkm-y += nvkm/subdev/gsp/rm/nvenc.o
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| H A D | rm.h | 124 } *ce, *nvdec, *nvenc, *nvjpg, *ofa; member
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ |
| H A D | nvenc.c | 24 #include "nvrm/nvenc.h"
28 struct nvkm_gsp_object *nvenc) in r535_nvenc_alloc() argument
32 args = nvkm_gsp_rm_alloc_get(chan, handle, class, sizeof(*args), nvenc); in r535_nvenc_alloc()
39 return nvkm_gsp_rm_alloc_wr(nvenc, args); in r535_nvenc_alloc()
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| H A D | rm.c | 37 .nvenc = &r535_nvenc,
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| H A D | Kbuild | 23 nvkm-y += nvkm/subdev/gsp/rm/r535/nvenc.o
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| H A D | fifo.c | 406 case RM_ENGINE_TYPE( NVENC0, NVENC, 0); in r535_fifo_xlat_rm_engine_type()
407 case RM_ENGINE_TYPE( NVENC1, NVENC, 1); in r535_fifo_xlat_rm_engine_type()
408 case RM_ENGINE_TYPE( NVENC2, NVENC, 2); in r535_fifo_xlat_rm_engine_type()
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ |
| H A D | Kbuild | 2 nvkm-y += nvkm/engine/nvenc/base.o
3 nvkm-y += nvkm/engine/nvenc/gm107.o
4 nvkm-y += nvkm/engine/nvenc/tu102.o
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| H A D | priv.h | 4 #include <engine/nvenc.h>
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| H A D | gm107.c | 35 gm107_nvenc_nofw(struct nvkm_nvenc *nvenc, int ver, in gm107_nvenc_nofw() argument
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/ |
| H A D | fifo.c | 186 case RM_ENGINE_TYPE( NVENC0, NVENC, 0); in r570_fifo_xlat_rm_engine_type()
187 case RM_ENGINE_TYPE( NVENC1, NVENC, 1); in r570_fifo_xlat_rm_engine_type()
188 case RM_ENGINE_TYPE( NVENC2, NVENC, 2); in r570_fifo_xlat_rm_engine_type()
189 case RM_ENGINE_TYPE( NVENC3, NVENC, 3); in r570_fifo_xlat_rm_engine_type()
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| H A D | rm.c | 66 .nvenc = &r535_nvenc,
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/ |
| H A D | Kbuild | 18 include $(src)/nvkm/engine/nvenc/Kbuild
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
| H A D | priv.h | 45 #include <engine/nvenc.h>
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| /linux/drivers/gpu/host1x/ |
| H A D | dev.c | 151 { /* NVENC */ .base = 0x1af8, .offset = 0x30, .limit = 0x34 },
193 { /* NVENC */ .base = 0x1af8, .offset = 0x30, .limit = 0x34 },
240 { /* NVENC MMIO */ .base = 0x1690, .offset = 0x34, .limit = 0x34 },
241 { /* NVENC ch */ .base = 0x17c0, .offset = 0x30, .limit = 0x30 },
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| H A D | context.c | 50 * Due to an issue with T194 NVENC, only 38 bits can be used. in host1x_memory_context_list_init()
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| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra194.dtsi | 2090 nvenc@154c0000 {
2091 compatible = "nvidia,tegra194-nvenc";
2094 clock-names = "nvenc";
2096 reset-names = "nvenc";
2245 nvenc@15a80000 {
2246 compatible = "nvidia,tegra194-nvenc";
2249 clock-names = "nvenc";
2251 reset-names = "nvenc";
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | base.c | 212 CASE(NVENC ); in nvkm_fifo_info()
|