Searched +full:nand +full:- +full:use +full:- +full:soft +full:- +full:ecc +full:- +full:engine (Results 1 – 9 of 9) sorted by relevance
| /linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | nand-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NAND Chip and NAND Controller Generic Binding
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
14 The NAND controller should be represented with its own DT node, and
15 all NAND chips attached to this controller should be defined as
16 children nodes of the NAND controller. This representation should be
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| D | atmel-nand.txt | 1 Atmel NAND flash controller bindings
3 The NAND flash controller node should be defined under the EBI bus (see
4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
5 One or several NAND devices can be defined under this NAND controller.
6 The NAND controller might be connected to an ECC engine.
8 * NAND controller bindings:
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
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| /linux-5.10/drivers/mtd/nand/ |
| D | ecc.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic Error-Correcting Code (ECC) engine
10 * This file describes the abstraction of any NAND ECC engine. It has been
11 * designed to fit most cases, including parallel NANDs and SPI-NANDs.
13 * There are three main situations where instantiating this ECC engine makes
15 * - external: The ECC engine is outside the NAND pipeline, typically this
16 * is a software ECC engine, or an hardware engine that is
17 * outside the NAND controller pipeline.
18 * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the
19 * controller's side. This is the case of most of the raw NAND
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| /linux-5.10/drivers/mtd/nand/raw/ |
| D | arasan-nand-controller.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Arasan NAND Flash Controller Driver
5 * Copyright (C) 2014 - 2020 Xilinx, Inc.
17 #include <linux/dma-mapping.h>
103 #define ANFC_MAX_PKT_SIZE (SZ_2K - 1)
111 * struct anfc_op - Defines how to execute an operation
136 * struct anand - Defines the NAND chip related information
137 * @node: Used to store NAND chips into a list
138 * @chip: NAND chip information structure
140 * @rb: Ready-busy line
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| D | davinci_nand.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * davinci_nand.c - NAND Flash Driver for DaVinci family chips
8 * Sander Huijsen <Shuijsen@optelecom-nkf.com>
24 #include <linux/platform_data/mtd-davinci.h>
25 #include <linux/platform_data/mtd-davinci-aemif.h>
28 * This is a device driver for the NAND flash controller found on the
33 * The 1-bit ECC hardware is supported, as well as the newer 4-bit ECC
34 * available on chips like the DM355 and OMAP-L137 and needed with the
35 * more error-prone MLC NAND chips.
37 * This driver assumes EM_WAIT connects all the NAND devices' RDY/nBUSY
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| D | nand_base.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * This is the generic MTD driver for NAND flash devices. It should be
5 * capable of working with almost all NAND chips currently available.
8 * http://www.linux-mtd.infradead.org/doc/nand.html
11 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
21 * Check, if mtd->ecctype should be set to MTD_ECC_HW
22 * if we have HW ECC support.
37 #include <linux/mtd/nand.h>
52 int lastpage = (mtd->erasesize / mtd->writesize) - 1; in nand_pairing_dist3_get_info()
59 info->group = 0; in nand_pairing_dist3_get_info()
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| D | s3c2410.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright © 2004-2008 Simtec Electronics
7 * Samsung S3C2410/S3C2440/S3C2412 NAND driver
10 #define pr_fmt(fmt) "nand-s3c2410: " fmt
36 #include <linux/platform_data/mtd-nand-s3c2410.h>
73 /* new oob placement block for use with hardware ecc generation
79 return -ERANGE; in s3c2410_ooblayout_ecc()
81 oobregion->offset = 0; in s3c2410_ooblayout_ecc()
82 oobregion->length = 3; in s3c2410_ooblayout_ecc()
91 return -ERANGE; in s3c2410_ooblayout_free()
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| /linux-5.10/drivers/mtd/nand/raw/gpmi-nand/ |
| D | gpmi-nand.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Freescale GPMI NAND Flash Driver
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
18 #include <linux/dma/mxs-dma.h>
19 #include "gpmi-nand.h"
20 #include "gpmi-regs.h"
21 #include "bch-regs.h"
23 /* Resource names for the GPMI NAND driver. */
24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
52 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
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| /linux-5.10/ |
| D | MAINTAINERS | 9 -------------------------
29 5. Make a patch available to the relevant maintainer in the list. Use
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
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