Searched +full:mmc +full:- +full:hs400 +full:- +full:1 +full:_8v (Results 1 – 25 of 54) sorted by relevance
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/linux-5.10/Documentation/devicetree/bindings/mmc/ |
D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 11 - Piotr Sroka <piotrs@cadence.com> 14 - $ref: mmc-controller.yaml 19 - enum: 20 - socionext,uniphier-sd4hc 21 - const: cdns,sd4hc [all …]
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D | brcm,sdhci-brcmstb.txt | 3 This file documents differences between the core properties in mmc.txt 4 and the properties used by the sdhci-brcmstb driver. 11 - compatible: should be one of the following 12 - "brcm,bcm7425-sdhci" 13 - "brcm,bcm7445-sdhci" 14 - "brcm,bcm7216-sdhci" 16 Refer to clocks/clock-bindings.txt for generic clock consumer properties. 21 sd-uhs-sdr50; 22 sd-uhs-ddr50; 23 sd-uhs-sdr104; [all …]
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D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MMC Controller Generic Binding 10 - Ulf Hansson <ulf.hansson@linaro.org> 13 These properties are common to multiple MMC host controllers. Any host 17 It is possible to assign a fixed index mmcN to an MMC host controller 23 pattern: "^mmc(@.*)?$" 25 "#address-cells": [all …]
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D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: TI AM654 MMC Controller 11 - Ulf Hansson <ulf.hansson@linaro.org> 14 - $ref: mmc-controller.yaml# 19 - ti,am654-sdhci-5.1 20 - ti,j721e-sdhci-8bit [all …]
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D | marvell,xenon-sdhci.txt | 2 This file documents differences between the core mmc properties 3 described by mmc.txt and the properties used by the Xenon implementation. 11 - compatible: should be one of the following 12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC. 13 Must provide a second register area and marvell,pad-type. 14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806. 15 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110. 17 - clocks: 22 - clock-names: 27 - reg: [all …]
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/linux-5.10/arch/arm64/boot/dts/marvell/ |
D | armada-3720-espressobin-emmc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * Romain Perier <romain.perier@free-electrons.com> 11 …* Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schemati… 14 /dts-v1/; 16 #include "armada-3720-espressobin.dtsi" 20 compatible = "globalscale,espressobin-emmc", "globalscale,espressobin", 26 non-removable; 27 bus-width = <8>; 28 mmc-ddr-1_8v; 29 mmc-hs400-1_8v; [all …]
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D | armada-3720-espressobin-v7-emmc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * Romain Perier <romain.perier@free-electrons.com> 11 * Schematic available at http://wiki.espressobin.net/tiki-download_file.php?fileId=200 14 /dts-v1/; 16 #include "armada-3720-espressobin.dtsi" 20 compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7", 33 switch0port1: port@1 { 34 reg = <1>; 36 phy-handle = <&switch0phy0>; 42 phy-handle = <&switch0phy2>; [all …]
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D | armada-3720-uDPU.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) 12 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 15 #include "armada-372x.dtsi" 22 stdout-path = "serial0:115200n8"; 31 pinctrl-names = "default"; 32 compatible = "gpio-leds"; 65 sfp_eth0: sfp-eth0 { 67 i2c-bus = <&i2c0>; [all …]
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D | armada-3720-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F3720-DDR3) 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 14 /dts-v1/; 16 #include <dt-bindings/gpio/gpio.h> 17 #include "armada-372x.dtsi" 20 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3"; 21 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710"; 24 stdout-path = "serial0:115200n8"; 32 exp_usb3_vbus: usb3-vbus { [all …]
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/linux-5.10/arch/arm64/boot/dts/sprd/ |
D | whale2.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/clock/sprd,sc9860-clk.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 compatible = "simple-bus"; 18 #address-cells = <2>; 19 #size-cells = <2>; 67 ap-apb { 68 compatible = "simple-bus"; [all …]
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/linux-5.10/drivers/mmc/core/ |
D | host.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/drivers/mmc/core/host.c 6 * Copyright (C) 2007-2008 Pierre Ossman 9 * MMC host class device management 23 #include <linux/mmc/host.h> 24 #include <linux/mmc/card.h> 25 #include <linux/mmc/slot-gpio.h> 29 #include "slot-gpio.h" 40 wakeup_source_unregister(host->ws); in mmc_host_classdev_release() 41 ida_simple_remove(&mmc_host_ida, host->index); in mmc_host_classdev_release() [all …]
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/linux-5.10/arch/arm64/boot/dts/rockchip/ |
D | rk3399-nanopc-t4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * FriendlyElec NanoPC-T4 board device tree source 11 /dts-v1/; 12 #include "rk3399-nanopi4.dtsi" 15 model = "FriendlyElec NanoPC-T4"; 16 compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399"; 18 vcc12v0_sys: vcc12v0-sys { 19 compatible = "regulator-fixed"; 20 regulator-always-on; 21 regulator-boot-on; [all …]
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/linux-5.10/arch/arm64/boot/dts/qcom/ |
D | sdm630-sony-xperia-nile.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/input/gpio-keys.h> 17 qcom,msm-id = <318 0>; 18 qcom,board-id = <8 1>; 19 qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00>; 21 /* This part enables graphical output via bootloader-enabled display */ 25 #address-cells = <2>; [all …]
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D | qcs404-evb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 17 stdout-path = "serial0"; 20 vph_pwr: vph-pwr-regulator { 21 compatible = "regulator-fixed"; 22 regulator-name = "vph_pwr"; 23 regulator-always-on; 24 regulator-boot-on; [all …]
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D | msm8994-sony-xperia-kitakami.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/gpio-keys.h> 14 qcom,msm-id = <0xcf 0x20001>; 15 qcom,pmic-id = <0x10009 0x1000a 0x00 0x00>; 16 qcom,board-id = <8 0>; 19 /delete-node/ psci; 22 compatible = "gpio-keys"; 23 input-name = "gpio-keys"; 24 #address-cells = <1>; [all …]
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/linux-5.10/arch/arm64/boot/dts/freescale/ |
D | fsl-lx2160a-cex7.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 // Device Tree file for LX2160A-CEx7 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "solidrun,lx2160a-cex7", "fsl,lx2160a"; 19 sb_3v3: regulator-sb3v3 { 20 compatible = "regulator-fixed"; 21 regulator-name = "RT7290"; 22 regulator-min-microvolt = <3300000>; 23 regulator-max-microvolt = <3300000>; [all …]
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D | fsl-lx2160a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; 21 stdout-path = "serial0:115200n8"; 24 sb_3v3: regulator-sb3v3 { 25 compatible = "regulator-fixed"; 26 regulator-name = "MC34717-3.3VSB"; 27 regulator-min-microvolt = <3300000>; 28 regulator-max-microvolt = <3300000>; [all …]
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D | fsl-ls1028a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 12 #include "fsl-ls1028a.dtsi" 16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; 25 stdout-path = "serial0:115200n8"; 33 sys_mclk: clock-mclk { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <25000000>; 39 reg_1p8v: regulator-1p8v { [all …]
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D | fsl-ls1028a-kontron-sl28.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Device Tree file for the Kontron SMARC-sAL28 board. 9 /dts-v1/; 10 #include "fsl-ls1028a.dtsi" 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 16 model = "Kontron SMARC-sAL28"; 29 compatible = "gpio-keys"; 31 power-button { [all …]
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/linux-5.10/arch/arm64/boot/dts/mediatek/ |
D | mt8183-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; 26 stdout-path = "serial0:921600n8"; 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; 34 compatible = "shared-dma-pool"; 36 no-map; 46 pinctrl-names = "default"; [all …]
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D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 19 stdout-path = "serial0:115200n8"; 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <32768>; 31 clock-output-names = "clk32k"; 35 compatible = "regulator-fixed"; 36 regulator-name = "it6505_pp18"; [all …]
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/linux-5.10/arch/arm64/boot/dts/renesas/ |
D | r8a774e1-hihope-rzg2h.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include "hihope-rev4.dtsi" 14 compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1"; 32 <&versaclock5 1>, 35 clock-names = "du.0", "du.1", "du.3", 36 "dclkin.0", "dclkin.1", "dclkin.3"; 40 mmc-hs400-1_8v;
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D | r8a774b1-hihope-rzg2n.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include "hihope-rev4.dtsi" 14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1"; 32 <&versaclock5 1>, 35 clock-names = "du.0", "du.1", "du.3", 36 "dclkin.0", "dclkin.1", "dclkin.3"; 40 mmc-hs400-1_8v;
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D | r8a774b1-hihope-rzg2n-rev2.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include "hihope-rev2.dtsi" 14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1"; 32 <&versaclock5 1>, 35 clock-names = "du.0", "du.1", "du.3", 36 "dclkin.0", "dclkin.1", "dclkin.3"; 40 mmc-hs400-1_8v;
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/linux-5.10/arch/arm/boot/dts/ |
D | exynos5422-odroidxu3-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source 12 #include <dt-bindings/input/input.h> 13 #include "exynos5422-odroid-core.dtsi" 17 compatible = "gpio-keys"; 18 pinctrl-names = "default"; 19 pinctrl-0 = <&power_key>; 32 debounce-interval = <0>; 33 wakeup-source; 38 pinctrl-0 = <&emmc_nrst_pin>; [all …]
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