Searched +full:milbeaut +full:- +full:smp +full:- +full:sram (Results 1 – 4 of 4) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/interrupt-controller/irq.h>3 #include <dt-bindings/input/input.h>4 #include <dt-bindings/gpio/gpio.h>5 #include <dt-bindings/interrupt-controller/arm-gic.h>9 interrupt-parent = <&gic>;10 #address-cells = <1>;11 #size-cells = <1>;14 #address-cells = <1>;15 #size-cells = <0>;[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/sram/sram.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Generic on-chip SRAM10 - Rob Herring <robh@kernel.org>15 Each child of the sram node specifies a region of reserved memory. Each19 Following the generic-names recommended practice, node names should25 pattern: "^sram(@.*)?"30 - mmio-sram[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <linux/irqchip/arm-gic.h>28 return -ENXIO; in m10v_boot_secondary()35 return -EINVAL; in m10v_boot_secondary()51 np = of_find_compatible_node(NULL, NULL, "socionext,milbeaut-smp-sram"); in m10v_smp_init()97 CPU_METHOD_OF_DECLARE(m10v_smp, "socionext,milbeaut-m10v-smp", &m10v_smp_ops);142 if (of_machine_is_compatible("socionext,milbeaut-evb")) in m10v_pm_init()
1 # SPDX-License-Identifier: GPL-2.03 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>21 with updates for 32-bit and 64-bit ARM systems provided in this document.30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in57 On 32-bit ARM v7 or later systems this property is required and matches64 On ARM v8 64-bit systems this property is required and matches the67 * If cpus node's #address-cells property is set to 275 * If cpus node's #address-cells property is set to 1[all …]