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Searched full:lpass_audiocc (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm6115-lpasscc.yaml41 lpass_audiocc: clock-controller@a6a9000 {
H A Dqcom,sc8280xp-lpasscc.yaml52 lpass_audiocc: clock-controller@32a9000 {
H A Dqcom,sc7280-lpasscorecc.yaml144 lpass_audiocc: clock-controller@3300000 {
/linux/Documentation/devicetree/bindings/soundwire/
H A Dqcom,soundwire.yaml263 resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>;
/linux/arch/arm64/boot/dts/qcom/
H A Dqcm6490-idp.dts784 &lpass_audiocc {
H A Dsc7280.dtsi2573 resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>;
2627 resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>;
2647 lpass_audiocc: clock-controller@3300000 { label
2729 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
2730 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
2731 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
2732 <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
H A Dqcs6490-rb3gen2.dts1268 &lpass_audiocc {
H A Dx1e80100.dtsi4163 resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA2_CGCR>;
4213 resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>;
4279 resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
4301 lpass_audiocc: clock-controller@6b6c000 { label
H A Dsc8280xp.dtsi2663 resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>;
2739 resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
2763 lpass_audiocc: clock-controller@32a9000 { label