| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pincfg-node.yaml | 152 and the delay before latching a value to an output
162 this affects the expected delay in ps before latching a value to
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| /linux/Documentation/devicetree/bindings/soc/imx/ |
| H A D | fsl,imx93-src.yaml | 14 all the system reset signals and boot argument latching.
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| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | renesas,rst.yaml | 16 - Latching of the levels on mode pins when PRESET# is negated,
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| /linux/drivers/staging/fbtft/ |
| H A D | fbtft.h | 172 * @gpio.rd: Read latching signal
173 * @gpio.wr: Write latching signal
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| /linux/arch/mips/loongson2ef/common/cs5536/ |
| H A D | cs5536_mfgpt.c | 157 * before latching the timer count to guarantee that although in mfgpt_read()
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| /linux/drivers/clocksource/ |
| H A D | timer-loongson1-pwm.c | 175 * before latching the timer count to guarantee that although in ls1x_clocksource_read()
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| H A D | i8253.c | 45 * before latching the timer count to guarantee that although in i8253_read()
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| /linux/drivers/hwmon/ |
| H A D | sbtsi_temp.c | 41 * latching of the decimal part, so integer part should be read first.
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| /linux/drivers/net/ethernet/sfc/ |
| H A D | io.h | 22 * doorbell register pair, which has its own latching, and
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| /linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | aq100x.c | 114 /* Read (and reset) the latching version of the status */ in aq100x_intr_handler()
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| H A D | ael1002.c | 695 * The GPIO Interrupt register on the AEL2020 is a "Latching High" in ael2020_intr_clear()
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| /linux/drivers/cpufreq/ |
| H A D | sa1110-cpufreq.c | 156 * half speed or use delayed read latching (errata 13). in sdram_calculate_timing()
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| /linux/drivers/net/ethernet/sfc/falcon/ |
| H A D | io.h | 57 * doorbell register pair, which has its own latching, and
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| /linux/drivers/net/ethernet/sfc/siena/ |
| H A D | io.h | 57 * doorbell register pair, which has its own latching, and
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| /linux/drivers/net/pcs/ |
| H A D | pcs-xpcs.c | 990 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
1023 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
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| /linux/drivers/iio/imu/bmi160/ |
| H A D | bmi160_core.c | 608 /* Set the pin to input mode with no latching. */ in bmi160_config_pin()
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| /linux/drivers/net/ethernet/cavium/thunder/ |
| H A D | thunder_bgx.c | 892 /* Clear rcvflt bit (latching high) and read it back */ in bgx_xaui_check_link()
1007 /* Receive link is latching low. Force it high and verify it */ in bgx_poll_for_link()
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| /linux/sound/soc/codecs/ |
| H A D | tas5720.c | 280 * Periodically toggle SDZ (shutdown bit) H->L->H to clear any latching in tas5720_fault_check_work()
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| /linux/drivers/tty/serial/ |
| H A D | sc16is7xx.c | 221 #define SC16IS7XX_IOCONTROL_LATCH_BIT BIT(0) /* Enable input latching */
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| /linux/drivers/platform/x86/intel/pmc/ |
| H A D | core.c | 1165 * For LPM mode latching we set the latch enable bit and selected mode in pmc_core_lpm_latch_mode_write()
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| /linux/drivers/net/ethernet/faraday/ |
| H A D | ftgmac100.c | 1326 * the HW has been latching RX/TX packet interrupts while in ftgmac100_poll()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_color.c | 67 * following the latching of any double buffered registers
1012 * Once PSR exit (and proper register latching) has occurred the in skl_color_commit_noarm()
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| /linux/drivers/scsi/ |
| H A D | NCR5380.c | 1583 * target's REQ by latching the SCSI data into the INPUT DATA register in NCR5380_transfer_dma()
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| /linux/drivers/media/platform/ti/am437x/ |
| H A D | am437x-vpfe.c | 519 /* Disable latching function registers on VSYNC */ in vpfe_ccdc_config_raw()
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| /linux/drivers/gpu/drm/tegra/ |
| H A D | dc.c | 113 * Latching happens mmediately if the display controller is in STOP mode or
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