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/linux/drivers/gpu/drm/display/
H A Ddrm_hdmi_state_helper.c1 // SPDX-License-Identifier: MIT
17 * DOC: hdmi helpers
19 * These functions contain an implementation of the HDMI specification
20 * in the form of KMS helpers.
29 * generated according to the HDMI specification in debugfs.
31 * Compliance can then be tested using ``edid-decode`` from the ``v4l-utils`` project
32 * (https://git.linuxtv.org/v4l-utils.git/). A sample run would look like:
34 * .. code-block:: bash
36 * # edid-decode \
37 * -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio \
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/linux/Documentation/admin-guide/media/
H A Dcec.rst1 .. SPDX-License-Identifier: GPL-2.0
4 HDMI CEC
7 Supported hardware in mainline
10 HDMI Transmitters:
12 - Exynos4
13 - Exynos5
14 - STIH4xx HDMI CEC
15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511)
16 - stm32
17 - Allwinner A10 (sun4i)
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H A Dbuilding.rst1 .. SPDX-License-Identifier: GPL-2.0
8 distribution-specific source file or via the Kernel's main git tree\ [1]_.
12 - you're a braveheart and want to experiment with new stuff;
13 - if you want to report a bug;
14 - if you're developing new patches
20 In this case, you may find some useful information at the
23 https://linuxtv.org/wiki/index.php/How_to_Obtain,_Build_and_Install_V4L-DVB_Device_Drivers
50 Device Drivers --->
51 <M> Remote Controller support --->
52 [ ] HDMI CEC RC integration
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H A Dvivid.rst1 .. SPDX-License-Identifier: GPL-2.0
8 transmitters, touch capture and a software defined radio receiver. In addition a
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
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/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-dv.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _dv-controls:
12 (Digital Visual Interface), HDMI (:ref:`hdmi`) and DisplayPort
15 only exposed on the ``/dev/v4l-subdev*`` device node.
20 hooked up to e.g. HDMI connectors. Even though the subdevice will
23 Identification Data, :ref:`vesaedid`) and HDCP (High-bandwidth Digital
25 device to do the fairly slow EDID/HDCP handling in advance. This allows
28 These pads appear in several of the controls in this section as
33 .. _dv-control-id:
47 read-only control is applicable to DVI-D, HDMI and DisplayPort
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/linux/Documentation/devicetree/bindings/display/
H A Damlogic,meson-dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 - $ref: /schemas/sound/dai-common.yaml#
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
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H A Dbrcm,bcm2711-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM2711 HDMI Controller
10 - Eric Anholt <eric@anholt.net>
15 - brcm,bcm2711-hdmi0
16 - brcm,bcm2711-hdmi1
17 - brcm,bcm2712-hdmi0
18 - brcm,bcm2712-hdmi1
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/linux/drivers/video/fbdev/omap2/omapfb/displays/
H A Dconnector-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HDMI Connector driver
39 struct omap_dss_device *in; member
53 struct omap_dss_device *in = ddata->in; in hdmic_connect() local
55 dev_dbg(ddata->dev, "connect\n"); in hdmic_connect()
60 return in->ops.hdmi->connect(in, dssdev); in hdmic_connect()
66 struct omap_dss_device *in = ddata->in; in hdmic_disconnect() local
68 dev_dbg(ddata->dev, "disconnect\n"); in hdmic_disconnect()
73 in->ops.hdmi->disconnect(in, dssdev); in hdmic_disconnect()
79 struct omap_dss_device *in = ddata->in; in hdmic_enable() local
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H A Dencoder-tpd12s015.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TPD12S015 HDMI ESD protection & level shifter chip driver
21 struct omap_dss_device *in; member
36 struct omap_dss_device *in = ddata->in; in tpd_connect() local
39 r = in->ops.hdmi->connect(in, dssdev); in tpd_connect()
43 dst->src = dssdev; in tpd_connect()
44 dssdev->dst = dst; in tpd_connect()
46 if (ddata->ct_cp_hpd_gpio) { in tpd_connect()
47 gpiod_set_value_cansleep(ddata->ct_cp_hpd_gpio, 1); in tpd_connect()
48 /* DC-DC converter needs at max 300us to get to 90% of 5V */ in tpd_connect()
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/linux/Documentation/userspace-api/media/cec/
H A Dcec-intro.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _cec-intro:
8 HDMI connectors provide a single pin for use by the Consumer Electronics
10 HDMI cable to communicate. The protocol for CEC version 1.4 is defined
11 in supplements 1 (CEC) and 2 (HEAC or HDMI Ethernet and Audio Return
12 Channel) of the HDMI 1.4a (:ref:`hdmi`) specification and the
13 extensions added to CEC version 2.0 are defined in chapter 11 of the
14 HDMI 2.0 (:ref:`hdmi2`) specification.
17 and is based on the ancient AV.link protocol used in old SCART
24 In addition, CEC can be implemented in HDMI receivers, transmitters and
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/linux/Documentation/devicetree/bindings/sound/
H A Dimx-audio-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/imx-audio-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX audio complex with HDMI
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 - fsl,imx-audio-hdmi
16 - fsl,imx-audio-sii902x
22 audio-cpu:
26 hdmi-out:
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/linux/sound/hda/codecs/hdmi/
H A Dintelhdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Intel HDMI codec support
19 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
40 struct hdmi_spec *spec = codec->spec; in intel_haswell_enable_all_pins()
42 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_enable_all_pins()
44 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS) in intel_haswell_enable_all_pins()
48 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_enable_all_pins()
50 if (vendor_param == -1) in intel_haswell_enable_all_pins()
60 struct hdmi_spec *spec = codec->spec; in intel_haswell_fixup_enable_dp12()
62 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_fixup_enable_dp12()
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H A Dtegrahdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Nvidia Tegra HDMI codec support
23 * accessed using vendor-defined verbs. These registers can be used for
24 * interoperability between the HDA and HDMI drivers.
31 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
33 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
34 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
38 * +---------+-------+--------+--------+
40 * +-----------------------------------|
45 * trigger to hdmi.
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/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-qp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd.
6 * Author: Algea Cao <algea.cao@rock-chips.com>
10 #include <linux/hdmi.h>
29 #include <sound/hdmi-codec.h>
31 #include "dw-hdmi-qp.h"
41 * Unless otherwise noted, entries in this table are 100% optimization.
43 * slow so we pre-compute values we expect to see.
46 * the recommended N values specified in the Audio chapter of the HDMI
93 /* For 297 MHz+ HDMI spec have some other rule for setting N */
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/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_hdcp.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.
5 #include "hdmi.h"
21 /* QFPROM Registers for HDMI/HDCP */
49 struct hdmi *hdmi; member
78 static int msm_hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_read() argument
99 rc = i2c_transfer(hdmi->i2c, msgs, 2); in msm_hdmi_ddc_read()
101 retry--; in msm_hdmi_ddc_read()
107 rc = -EIO; in msm_hdmi_ddc_read()
116 static int msm_hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_write() argument
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/linux/sound/soc/meson/
H A Daiu-codec-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <sound/soc-dai.h>
11 #include <dt-bindings/sound/meson-aiu.h>
13 #include "meson-codec-glue.h"
30 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in aiu_codec_ctrl_mux_put_enum()
33 mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]); in aiu_codec_ctrl_mux_put_enum()
34 changed = snd_soc_component_test_bits(component, e->reg, in aiu_codec_ctrl_mux_put_enum()
45 snd_soc_component_update_bits(component, e->reg, in aiu_codec_ctrl_mux_put_enum()
52 snd_soc_component_update_bits(component, e->reg, in aiu_codec_ctrl_mux_put_enum()
68 SOC_DAPM_ENUM_EXT("HDMI Source", aiu_hdmi_ctrl_mux_enum,
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/arm-smccc.h>
10 #include <linux/hdmi.h>
24 #include <sound/hdmi-codec.h>
183 static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black) in mtk_hdmi_hw_vid_black() argument
185 regmap_update_bits(hdmi->regs, VIDEO_SOURCE_SEL, in mtk_hdmi_hw_vid_black()
189 static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable) in mtk_hdmi_hw_make_reg_writable() argument
194 * MT8173 HDMI hardware has an output control bit to enable/disable HDMI in mtk_hdmi_hw_make_reg_writable()
195 * output. This bit can only be controlled in ARM supervisor mode. in mtk_hdmi_hw_make_reg_writable()
196 * The ARM trusted firmware provides an API for the HDMI driver to set in mtk_hdmi_hw_make_reg_writable()
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/linux/sound/soc/codecs/
H A Dhdac_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * hdac_hdmi.c - ASoc HDA-HDMI codec driver for Intel platforms
5 * Copyright (C) 2014-2015 Intel Corp
17 #include <linux/hdmi.h>
107 unsigned char chmap[8]; /* ALSA API channel-map */
140 #define hdev_to_hdmi_priv(_hdev) dev_get_drvdata(&(_hdev)->dev)
143 hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv *hdmi, in hdac_hdmi_get_pcm_from_cvt() argument
148 list_for_each_entry(pcm, &hdmi->pcm_list, head) { in hdac_hdmi_get_pcm_from_cvt()
149 if (pcm->cvt == cvt) in hdac_hdmi_get_pcm_from_cvt()
159 struct hdac_device *hdev = port->pin->hdev; in hdac_hdmi_jack_report()
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/linux/drivers/gpu/drm/sti/
H A Dsti_hdmi.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/hdmi.h>
26 #include <sound/hdmi-codec.h>
96 #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
164 struct sti_hdmi *hdmi; member
182 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) in hdmi_read() argument
184 return readl(hdmi->regs + offset); in hdmi_read()
187 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset) in hdmi_write() argument
189 writel(val, hdmi->regs + offset); in hdmi_write()
193 * HDMI interrupt handler threaded
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/linux/drivers/media/i2c/adv748x/
H A Dadv748x-hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X HDMI receiver and Component Processor (CP)
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-dv-timings.h>
14 #include <media/v4l2-ioctl.h>
16 #include <uapi/linux/v4l2-dv-timings.h>
20 /* -----------------------------------------------------------------------------
21 * HDMI and CP
29 /* V4L2_DV_BT_CEA_720X480I59_94 - 0.5 MHz */
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_hdcp_shim.h1 /* SPDX-License-Identifier: MIT */
24 * and the bus-specific code. What that means is that HDCP over HDMI differs
28 * For completeness, the 2 buses differ in the following ways:
29 * - DP AUX vs. DDC
31 * they are set via DDC for HDMI.
32 * - Receiver register offsets
33 * The offsets of the registers are different for DP vs. HDMI
34 * - Receiver register masks/offsets
35 * For instance, the ready bit for the KSV fifo is in a different
36 * place on DP vs HDMI
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/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap-dss.txt5 -------------------
8 Binding details for each OMAP SoC version are described in respective binding
22 HDMI, MIPI DPI, etc.
25 -----------
28 video ports is described in Documentation/devicetree/bindings/graph.txt,
30 described in the SoC's DSS binding documentation.
36 -------
39 name for each display. If no aliases are defined, a semi-random number is used
43 -------
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dsynopsys,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This document defines device tree properties for the Synopsys DesignWare HDMI
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
18 When referenced from platform device tree bindings the properties defined in
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H A Dite,it6263.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ITE IT6263 LVDS to HDMI converter
10 - Liu Ying <victor.liu@nxp.com>
13 The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) LVDS
14 to HDMI converter. Combined with LVDS receiver and HDMI 1.4a transmitter,
15 the IT6263 supports LVDS input and HDMI 1.4 output by conversion function.
16 The built-in LVDS receiver can support single-link and dual-link LVDS inputs,
17 and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, HDCP
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/linux/drivers/gpu/drm/vc4/
H A Dvc4_hdmi.h7 #include <sound/hdmi-codec.h>
29 /* Filename to expose the registers in debugfs */
32 /* Maximum pixel clock supported by the controller (in Hz) */
42 * The variants don't map the lane in the same order in the
43 * PHY, so this is an array mapping the HDMI channel (index)
53 * two HDMI controllers, and we have a proper irqchip driver for
64 /* Callback to reset the HDMI block */
72 /* Callback to configure the video timings in the HDMI block */
84 /* Callback to enable the RNG in the PHY */
87 /* Callback to disable the RNG in the PHY */
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