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/linux-5.10/Documentation/i2c/muxes/
Di2c-mux-gpio.rst2 Kernel driver i2c-mux-gpio
8 -----------
10 i2c-mux-gpio is an i2c mux driver providing access to I2C bus segments
11 from a master I2C bus and a hardware MUX controlled through GPIO pins.
15 ---------- ---------- Bus segment 1 - - - - -
16 | | SCL/SDA | |-------------- | |
17 | |------------| |
19 | Linux | GPIO 1..N | MUX |--------------- Devices
20 | |------------| | | |
22 | | | |---------------| |
[all …]
/linux-5.10/drivers/i2c/muxes/
Di2c-mux-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C multiplexer using GPIO API
9 #include <linux/i2c-mux.h>
10 #include <linux/platform_data/i2c-mux-gpio.h>
15 #include <linux/gpio/consumer.h>
17 #include "../../gpio/gpiolib.h"
25 static void i2c_mux_gpio_set(const struct gpiomux *mux, unsigned val) in i2c_mux_gpio_set() argument
31 gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); in i2c_mux_gpio_set()
36 struct gpiomux *mux = i2c_mux_priv(muxc); in i2c_mux_gpio_select() local
38 i2c_mux_gpio_set(mux, chan); in i2c_mux_gpio_select()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 tristate "GPIO-based I2C arbitration"
17 a GPIO.
20 will be called i2c-arb-gpio-challenge.
23 tristate "GPIO-based I2C multiplexer"
27 GPIO based I2C multiplexer. This driver provides access to
28 I2C busses connected through a MUX, which is controlled
29 through GPIO pins.
32 will be called i2c-mux-gpio.
41 I2C busses connected through a MUX, which in turn is controlled
[all …]
/linux-5.10/arch/arm64/boot/dts/qcom/
Dmsm8996-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
10 mux {
12 function = "gpio";
17 drive-strength = <2>; /* 2 mA */
18 bias-pull-down; /* pull down */
19 input-enable;
26 mux {
28 function = "gpio";
32 drive-strength = <16>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mux/
Dgpio-mux.txt1 GPIO-based multiplexer controller bindings
3 Define what GPIO pins are used to control a multiplexer. Or several
7 - compatible : "gpio-mux"
8 - mux-gpios : list of gpios used to control the multiplexer, least
10 - #mux-control-cells : <0>
11 * Standard mux-controller bindings as decribed in mux-controller.txt
14 - idle-state : if present, the state the mux will have when idle. The
18 multiplexer GPIO pins, where the first pin is the least significant
23 mux: mux-controller {
24 compatible = "gpio-mux";
[all …]
Dadi,adg792a.txt4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
7 not (one mux controller for each mux).
8 * Standard mux-controller bindings as described in mux-controller.txt
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
[all …]
Dmux-controller.txt4 A multiplexer (or mux) controller will have one, or several, consumer devices
5 that uses the mux controller. Thus, a mux controller can possibly control
7 multiplexer needed by each consumer, but a single mux controller can of course
10 A mux controller provides a number of states to its consumers, and the state
11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
18 Mux controller consumers should specify a list of mux controllers that they
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
[all …]
Dadi,adgs1408.txt1 Bindings for Analog Devices ADGS1408/1409 8:1/Dual 4:1 Mux
4 - compatible : Should be one of
7 * Standard mux-controller bindings as described in mux-controller.txt
10 - gpio-controller : if present, #gpio-cells is required.
11 - #gpio-cells : should be <2>
12 - First cell is the GPO line number, i.e. 0 to 3
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, the state that the mux controller will have
28 * One mux controller.
29 * Mux state set to idle as is (no idle-state declared)
[all …]
/linux-5.10/arch/arm/boot/dts/
Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdc4_gpios: sdc4-gpios {
11 sdcc1_pins: sdcc1-pin-active {
14 drive-strengh = <16>;
15 bias-disable;
20 drive-strengh = <10>;
21 bias-pull-up;
26 drive-strengh = <10>;
27 bias-pull-up;
31 sdcc3_pins: sdcc3-pin-active {
[all …]
Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
[all …]
Dgemini.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/clock/cortina,gemini-clock.h>
8 #include <dt-bindings/reset/cortina,gemini-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 compatible = "simple-bus";
17 interrupt-parent = <&intcon>;
20 compatible = "cortina,gemini-flash", "cfi-flash";
[all …]
/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
[all …]
Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-mux-gpio.txt1 GPIO-based I2C Bus Mux
6 +-----+ +-----+
8 +------------+ +-----+ +-----+
10 | | /--------+--------+
11 | +------+ | +------+ child bus A, on GPIO value set to 0
12 | | I2C |-|--| Mux |
13 | +------+ | +--+---+ child bus B, on GPIO value set to 1
14 | | | \----------+--------+--------+
15 | +------+ | | | | |
16 | | GPIO |-|-----+ +-----+ +-----+ +-----+
[all …]
Di2c-mux-ltc4306.txt5 - compatible: Must contain one of the following.
7 - reg: The I2C address of the device.
11 - Standard I2C mux properties. See i2c-mux.txt in this directory.
12 - I2C child bus nodes. See i2c-mux.txt in this directory.
16 - enable-gpios: Reference to the GPIO connected to the enable input.
17 - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
20 - gpio-controller: Marks the device node as a GPIO Controller.
21 - #gpio-cells: Should be two. The first cell is the pin number and
23 See ../gpio/gpio.txt for more information.
24 - ltc,downstream-accelerators-enable: Enables the rise time accelerators
[all …]
Di2c-mux.txt8 - #address-cells = <1>;
9 This property is required if the i2c-mux child node does not exist.
11 - #size-cells = <0>;
12 This property is required if the i2c-mux child node does not exist.
14 - i2c-mux
16 of both i2c child busses and other child nodes, the 'i2c-mux' subnode
17 can be used for populating the i2c child busses. If an 'i2c-mux'
21 Required properties for the i2c-mux child node:
22 - #address-cells = <1>;
23 - #size-cells = <0>;
[all …]
/linux-5.10/drivers/mux/
Dgpio.c1 // SPDX-License-Identifier: GPL-2.0
3 * GPIO-controlled multiplexer driver
11 #include <linux/gpio/consumer.h>
13 #include <linux/mux/driver.h>
22 static int mux_gpio_set(struct mux_control *mux, int state) in mux_gpio_set() argument
24 struct mux_gpio *mux_gpio = mux_chip_priv(mux->chip); in mux_gpio_set()
29 gpiod_set_array_value_cansleep(mux_gpio->gpios->ndescs, in mux_gpio_set()
30 mux_gpio->gpios->desc, in mux_gpio_set()
31 mux_gpio->gpios->info, values); in mux_gpio_set()
41 { .compatible = "gpio-mux", },
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 mux-core-objs := core.o
7 mux-adg792a-objs := adg792a.o
8 mux-adgs1408-objs := adgs1408.o
9 mux-gpio-objs := gpio.o
10 mux-mmio-objs := mmio.o
12 obj-$(CONFIG_MULTIPLEXER) += mux-core.o
13 obj-$(CONFIG_MUX_ADG792A) += mux-adg792a.o
14 obj-$(CONFIG_MUX_ADGS1408) += mux-adgs1408.o
15 obj-$(CONFIG_MUX_GPIO) += mux-gpio.o
[all …]
/linux-5.10/drivers/pinctrl/
Dpinmux.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
20 #include <linux/radix-tree.h>
33 const struct pinmux_ops *ops = pctldev->desc->pmxops; in pinmux_check_ops()
39 !ops->get_functions_count || in pinmux_check_ops()
40 !ops->get_function_name || in pinmux_check_ops()
41 !ops->get_function_groups || in pinmux_check_ops()
42 !ops->set_mux) { in pinmux_check_ops()
[all …]
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dqcom,msm8974-pinctrl.txt4 - compatible: "qcom,msm8974-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
Dqcom,ipq8064-pinctrl.txt4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
Dqcom,ipq4019-pinctrl.txt7 - compatible: "qcom,ipq4019-pinctrl"
8 - reg: Should be the base address and length of the TLMM block.
9 - interrupts: Should be the parent IRQ of the TLMM block.
10 - interrupt-controller: Marks the device node as an interrupt controller.
11 - #interrupt-cells: Should be two.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells : Should be two.
14 The first cell is the gpio pin number and the
16 - gpio-ranges: see ../gpio/gpio.txt
20 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STM32 GPIO and Pin Mux/Config controller
11 - Alexandre TORGUE <alexandre.torgue@st.com>
14 STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
[all …]
Dpinctrl-vt8500.txt1 VIA VT8500 and Wondermedia WM8xxx-series pinmux/gpio controller
3 These SoCs contain a combined Pinmux/GPIO module. Each pin may operate as
4 either a GPIO in, GPIO out or as an alternate function (I2C, SPI etc).
7 - compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl",
8 "wm8750-pinctrl" or "wm,wm8850-pinctrl"
9 - reg: Should contain the physical address of the module's registers.
10 - interrupt-controller: Marks the device node as an interrupt controller.
11 - #interrupt-cells: Should be two.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells : Should be two. The first cell is the pin number and the
[all …]
/linux-5.10/drivers/gpio/
Dgpio-lp3943.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI/National Semiconductor LP3943 GPIO driver
12 #include <linux/gpio/driver.h>
42 u16 input_mask; /* 1 = GPIO is input direction, 0 = output */
48 struct lp3943 *lp3943 = lp3943_gpio->lp3943; in lp3943_gpio_request()
51 if (test_and_set_bit(offset, &lp3943->pin_used)) in lp3943_gpio_request()
52 return -EBUSY; in lp3943_gpio_request()
60 struct lp3943 *lp3943 = lp3943_gpio->lp3943; in lp3943_gpio_free()
62 clear_bit(offset, &lp3943->pin_used); in lp3943_gpio_free()
68 struct lp3943 *lp3943 = lp3943_gpio->lp3943; in lp3943_gpio_set_mode()
[all …]

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