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/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
27 mpp3 3 gpo, nand(io5), spi(miso)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
[all …]
Dmarvell,armada-370-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6710-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, uart0(rxd)
18 mpp2 2 gpio, i2c0(sck), uart0(txd)
19 mpp3 3 gpio, i2c0(sda), uart0(rxd)
20 mpp4 4 gpio, vdd(cpu-pd)
22 mpp6 6 gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
24 mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
26 mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
[all …]
Dmarvell,armada-375-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6720-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
17 mpp1 1 gpio, dev(ad3), spi0(mosi), spi1(mosi)
18 mpp2 2 gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
19 mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
20 mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso)
21 mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
22 mpp6 6 gpio, dev(ad0), led(p1), audio(lrclk)
[all …]
Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
20 mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt),
22 mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act),
23 uart1(cts), lcd-spi(cs1), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
[all …]
Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
[all …]
Dmarvell,armada-38x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or
8 "marvell,88f6828-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
23 mpp5 5 gpio, ge(mdio), ua1(rxd), ua0(cts)
[all …]
Dmarvell,armada-xp-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
8 "marvell,mv78460-pinctrl"
9 - reg: register specifier of MPP registers
21 mpp0 0 gpio, ge0(txclkout), lcd(d0)
22 mpp1 1 gpio, ge0(txd0), lcd(d1)
23 mpp2 2 gpio, ge0(txd1), lcd(d2)
24 mpp3 3 gpio, ge0(txd2), lcd(d3)
25 mpp4 4 gpio, ge0(txd3), lcd(d4)
26 mpp5 5 gpio, ge0(txctl), lcd(d5)
[all …]
Dmarvell,armada-98dx3236-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
8 - reg: register specifier of MPP registers
15 mpp1 1 gpio, spi0(miso), dev(ad9)
17 mpp3 3 gpio, spi0(cs0), dev(ad11)
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
19 mpp5 5 gpio, pex(rsto), sd0(cmd), dev(bootcs)
21 mpp7 7 gpio, sd0(d0), dev(ale0)
22 mpp8 8 gpio, sd0(d1), dev(ale1)
23 mpp9 9 gpio, sd0(d2), dev(ready0)
[all …]
/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
14 dedicated GPIO lines.
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gatable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gatable
34 - Core clocks
35 - 0 0 APLL
[all …]
Dap80x-system-controller.txt6 registers giving access to numerous features: clocks, pin-muxing and
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the AP80x system controller
18 -------
24 - 0: reference clock of CPU cluster 0
25 - 1: reference clock of CPU cluster 1
26 - 2: fixed PLL at 1200 Mhz
27 - 3: MSS clock, derived from the fixed PLL
31 - compatible: must be one of:
32 * "marvell,ap806-clock"
[all …]
/linux-5.10/drivers/spi/
Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SPI master driver using generic bitbanged GPIO
11 #include <linux/gpio/consumer.h>
26 * platform_device->driver_data ... points to spi_gpio
28 * spi->controller_state ... reserved for bitbang framework code
30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
36 struct gpio_desc *miso; member
41 /*----------------------------------------------------------------------*/
44 * Because the overhead of going through four GPIO procedure calls
48 * - The slow generic way: set up platform_data to hold the GPIO
[all …]
/linux-5.10/drivers/pinctrl/mvebu/
Dpinctrl-armada-cp110.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "pinctrl-mvebu.h"
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
42 MPP_FUNCTION(0, "gpio", NULL),
53 MPP_FUNCTION(0, "gpio", NULL),
64 MPP_FUNCTION(0, "gpio", NULL),
76 MPP_FUNCTION(0, "gpio", NULL),
88 MPP_FUNCTION(0, "gpio", NULL),
[all …]
Dpinctrl-armada-375.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
19 #include "pinctrl-mvebu.h"
23 MPP_FUNCTION(0x0, "gpio", NULL),
29 MPP_FUNCTION(0x0, "gpio", NULL),
35 MPP_FUNCTION(0x0, "gpio", NULL),
43 MPP_FUNCTION(0x0, "gpio", NULL),
49 MPP_FUNCTION(0x6, "spi1", "miso")),
51 MPP_FUNCTION(0x0, "gpio", NULL),
53 MPP_FUNCTION(0x2, "spi0", "miso"),
[all …]
Dpinctrl-armada-370.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
19 #include "pinctrl-mvebu.h"
23 MPP_FUNCTION(0x0, "gpio", NULL),
29 MPP_FUNCTION(0x0, "gpio", NULL),
33 MPP_FUNCTION(0x0, "gpio", NULL),
37 MPP_FUNCTION(0x0, "gpio", NULL),
38 MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
46 MPP_FUNCTION(0x0, "gpio", NULL),
57 MPP_FUNCTION(0x0, "gpio", NULL),
[all …]
Dpinctrl-armada-39x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
30 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
33 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
36 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
39 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
42 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
47 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
52 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
[all …]
Dpinctrl-armada-38x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
30 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
33 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
36 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
39 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
42 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
47 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
52 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
[all …]
Dpinctrl-armada-ap806.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
19 #include "pinctrl-mvebu.h"
23 MPP_FUNCTION(0, "gpio", NULL),
27 MPP_FUNCTION(0, "gpio", NULL),
29 MPP_FUNCTION(3, "spi0", "miso")),
31 MPP_FUNCTION(0, "gpio", NULL),
35 MPP_FUNCTION(0, "gpio", NULL),
39 MPP_FUNCTION(0, "gpio", NULL),
43 MPP_FUNCTION(0, "gpio", NULL),
[all …]
/linux-5.10/Documentation/driver-api/
Dspi.rst7 often in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
8 line, and a "Master In, Slave Out" (MISO) data line. SPI is a full
10 another is shifted in on the MISO line. Those bits are assembled into
12 additional chipselect line is usually active-low (nCS); four signals are
24 hardware, which may be as simple as a set of GPIO pins or as complex as
33 board-specific initialization code. A :c:type:`struct spi_driver
46 .. kernel-doc:: include/linux/spi/spi.h
49 .. kernel-doc:: drivers/spi/spi.c
52 .. kernel-doc:: drivers/spi/spi.c
/linux-5.10/arch/arm/boot/dts/
Dbcm947189acdbmr.dts8 /dts-v1/;
26 compatible = "gpio-leds";
44 gpio-keys {
45 compatible = "gpio-keys";
61 compatible = "spi-gpio";
62 num-chipselects = <1>;
63 gpio-sck = <&chipcommon 21 0>;
64 gpio-miso = <&chipcommon 22 0>;
65 gpio-mosi = <&chipcommon 23 0>;
66 cs-gpios = <&chipcommon 24 0>;
[all …]
Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
[all …]
Dimx28-cfa10056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA-10037 DTS.
10 #include "imx28-cfa10037.dts"
13 model = "Crystalfontz CFA-10056 Board";
19 spi2_pins_cfa10056: spi2-cfa10056@0 {
21 fsl,pinmux-ids = <
27 fsl,drive-strength = <MXS_DRIVE_8mA>;
29 fsl,pull-up = <MXS_PULL_ENABLE>;
32 lcdif_pins_cfa10056: lcdif-10056@0 {
[all …]
Dimx28-cfa10055.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * The CFA-10055 is an expansion board for the CFA-10036 module and
9 * CFA-10037, thus we need to include the CFA-10037 DTS.
11 #include "imx28-cfa10037.dts"
14 model = "Crystalfontz CFA-10055 Board";
20 spi2_pins_cfa10055: spi2-cfa10055@0 {
22 fsl,pinmux-ids = <
28 fsl,drive-strength = <MXS_DRIVE_8mA>;
30 fsl,pull-up = <MXS_PULL_ENABLE>;
33 lcdif_18bit_pins_cfa10055: lcdif-18bit@0 {
[all …]
/linux-5.10/drivers/misc/eeprom/
Ddigsy_mtc_eeprom.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * FIXME: this driver is used on a device-tree probed platform: it
9 * should be defined as a bit-banged SPI device and probed from the device
10 * tree and not like this with static grabbing of a few numbered GPIO
17 #include <linux/gpio.h>
18 #include <linux/gpio/machine.h>
65 GPIO_LOOKUP("gpio@b00", GPIO_EEPROM_CLK,
67 GPIO_LOOKUP("gpio@b00", GPIO_EEPROM_DI,
69 GPIO_LOOKUP("gpio@b00", GPIO_EEPROM_DO,
70 "miso", GPIO_ACTIVE_HIGH),
[all …]
/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-8040-clearfog-gt-8k.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
34 v_3_3: regulator-3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "v_3_3";
[all …]

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