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Searched full:gcc_gpu_gpll0_div_clk_src (Results 1 – 17 of 17) sorted by relevance

/linux-5.10/Documentation/devicetree/bindings/clock/
Dqcom,gpucc.yaml40 - const: gcc_gpu_gpll0_div_clk_src
74 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
77 "gcc_gpu_gpll0_div_clk_src";
/linux-5.10/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 macro
Dqcom,gcc-sdm845.h42 #define GCC_GPU_GPLL0_DIV_CLK_SRC 32 macro
Dqcom,gcc-sm8150.h48 #define GCC_GPU_GPLL0_DIV_CLK_SRC 38 macro
Dqcom,gcc-sm8250.h45 #define GCC_GPU_GPLL0_DIV_CLK_SRC 35 macro
/linux-5.10/drivers/clk/qcom/
Dgpucc-sdm845.c50 "gcc_gpu_gpll0_div_clk_src",
Dgpucc-sc7180.c69 { .fw_name = "gcc_gpu_gpll0_div_clk_src" },
Dgpucc-sm8150.c76 { .fw_name = "gcc_gpu_gpll0_div_clk_src" },
Dgpucc-sm8250.c79 { .fw_name = "gcc_gpu_gpll0_div_clk_src" },
Dgcc-sc7180.c1196 static struct clk_branch gcc_gpu_gpll0_div_clk_src = { variable
1202 .name = "gcc_gpu_gpll0_div_clk_src",
2343 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
Dgcc-sm8250.c1404 static struct clk_branch gcc_gpu_gpll0_div_clk_src = { variable
1410 .name = "gcc_gpu_gpll0_div_clk_src",
3346 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
Dgcc-sdm845.c1468 static struct clk_branch gcc_gpu_gpll0_div_clk_src = { variable
1474 .name = "gcc_gpu_gpll0_div_clk_src",
3349 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
Dgcc-sm8150.c1625 static struct clk_branch gcc_gpu_gpll0_div_clk_src = { variable
1631 .name = "gcc_gpu_gpll0_div_clk_src",
3510 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
/linux-5.10/arch/arm64/boot/dts/qcom/
Dsm8150.dtsi712 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
715 "gcc_gpu_gpll0_div_clk_src";
Dsm8250.dtsi1354 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
1357 "gcc_gpu_gpll0_div_clk_src";
Dsc7180.dtsi2016 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
2019 "gcc_gpu_gpll0_div_clk_src";
Dsdm845.dtsi2823 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
2826 "gcc_gpu_gpll0_div_clk_src";