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/qemu/hw/core/
H A Dresettable.c29 * True if we are currently in reset enter phase.
108 /* Only take action if we really enter reset for the 1st time. */ in resettable_phase_enter()
131 /* execute enter phase for the object if needed */ in resettable_phase_enter()
134 !!rc->phases.enter); in resettable_phase_enter()
135 if (rc->phases.enter) { in resettable_phase_enter()
136 rc->phases.enter(obj, type); in resettable_phase_enter()
213 * Ensure we do not change parent when in enter or exit phase. in resettable_change_parent()
250 ResettableEnterPhase enter, in resettable_class_set_parent_phases() argument
256 if (enter) { in resettable_class_set_parent_phases()
257 rc->phases.enter = enter; in resettable_class_set_parent_phases()
/qemu/include/hw/
H A Dresettable.h63 * for the phases.enter, phases.hold and phases.exit methods, which
67 * for any reset event, in the order 'enter', 'hold', 'exit'.
68 * An object will always move quickly from 'enter' to 'hold'
74 * 'enter' method has been called.
79 * @phases.enter: This phase is called when the object enters reset. It
86 * in the system which is being reset has had its @phases.enter method called.
112 ResettableEnterPhase enter; member
211 * a hold phase method. Calling this during enter or exit phase is an error.
228 * by the given new methods (@enter, @hold and @exit).
233 ResettableEnterPhase enter,
/qemu/docs/devel/
H A Dreset.rst124 1. The **enter** phase is executed when the object enters reset. It resets only
130 group which is being reset has had its *enter* phase executed. At this point
137 count is used to ensure phases are executed only when required. *enter* and
147 during either 'enter' or 'hold' phases. IOMMUs are expected to reset during
164 phase of the reset; they are name ``phases.enter()``, ``phases.hold()`` and
165 ``phases.exit()``. They all take the object as parameter. The *enter* method
181 /* call parent class enter phase */
182 if (myclass->parent_phases.enter) {
183 myclass->parent_phases.enter(obj, type);
233 only override the *enter* phase and leave *hold* and *exit* untouched::
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/qemu/hw/9pfs/
H A Dcoth.h28 * 3. Enter the coroutine in the worker thread.
30 * can enter coroutine while step1 is still running
49 * yield in qemu thread and re-enter back \
57 /* re-enter back to qemu thread */ \
/qemu/tests/qtest/
H A Ddbus-display-test.c321 0x1C, /* qnum enter */ in test_dbus_display_keyboard()
336 g_assert_cmpint(qtest_inb(qts, 0x60), ==, 0x5A); /* scan code 2 enter */ in test_dbus_display_keyboard()
340 0x1C, /* qnum enter */ in test_dbus_display_keyboard()
349 g_assert_cmpint(qtest_inb(qts, 0x60), ==, 0x5A); /* scan code 2 enter */ in test_dbus_display_keyboard()
/qemu/include/hw/xen/interface/arch-x86/
H A Dxen.h122 * The privilege level specifies which modes may enter a trap via a software
125 * Level == 0: Noone may enter
126 * Level == 1: Kernel may enter
127 * Level == 2: Kernel may enter
128 * Level == 3: Everyone may enter
/qemu/tests/vm/
H A Dnetbsd127 self.console_wait_send("Hit enter to continue", "\n")
170 self.console_wait_send("Hit enter to continue", "\n")
175 self.console_wait_send("Hit enter to continue", "\n")
H A Dfreebsd93 self.console_wait("Enter password:")
95 self.console_wait("Enter password again:")
/qemu/rust/qemu-api/src/
H A Dqdev.rs50 const ENTER: Option<fn(&Self, ResetType)> = None; constant
54 /// `ResettablePhasesImpl::ENTER` method called. At this point devices
75 T::ENTER.unwrap()(unsafe { state.as_ref() }, typ); in rust_resettable_enter_fn()
156 if <T as ResettablePhasesImpl>::ENTER.is_some() { in class_init()
157 self.phases.enter = Some(rust_resettable_enter_fn::<T>); in class_init()
/qemu/common-user/host/mips/
H A Dsafe-syscall.inc.S53 * we enter with a0 == &signal_pending
80 * we enter with a0 == &signal_pending
/qemu/tests/unit/
H A Dtest-coroutine.c132 /* Must enter and return from max nesting level */ in test_nesting()
138 * Check that yield/enter transfer control correctly
425 * Check that creation, enter, and return work
440 /* Create, enter, and return from coroutine */ in test_lifecycle()
/qemu/tests/tcg/multiarch/system/
H A Dinterrupt.c3 * passes the cases that require it to exit, but we can make it enter an
/qemu/tests/tcg/aarch64/
H A Dlse2-fault.c13 * We need a shared mapping to enter CF_PARALLEL mode. in main()
/qemu/hw/misc/
H A Dnpcm_gcr.c442 rc->phases.enter = npcm7xx_gcr_enter_reset; in npcm7xx_gcr_class_init()
446 rc->phases.enter = npcm7xx_gcr_enter_reset; in npcm7xx_gcr_class_init()
458 rc->phases.enter = npcm8xx_gcr_enter_reset; in npcm8xx_gcr_class_init()
/qemu/ui/
H A Dinput-barrier.h106 struct barrierEnter enter; member
/qemu/tests/functional/
H A Dtest_arm_realview.py28 self.wait_for_console_pattern('Please press Enter to activate')
H A Dtest_arm_emcraft_sf2.py44 self.wait_for_console_pattern('Enter \'help\' for a list')
/qemu/hw/timer/
H A Dtrace-events112 hpet_ram_read(uint64_t addr) "enter hpet_ram_readl at 0x%" PRIx64
115 hpet_ram_write(uint64_t addr, uint64_t value) "enter hpet_ram_writel at 0x%" PRIx64 " = 0x%" PRIx64
/qemu/tests/qtest/migration/ppc64/
H A Da-b-kernel.S24 * Enter 64-bit mode. Not necessary because the test uses 32-bit
/qemu/block/
H A Dgraph-lock.c201 * enter the write section. in bdrv_graph_co_rdlock()
206 * we will enter this critical section and call aio_wait_kick(). in bdrv_graph_co_rdlock()
/qemu/tests/tcg/multiarch/gdbstub/
H A Dinterrupt.py24 # Enter the loop() function on this thread.
/qemu/docs/system/
H A Dmulti-process.rst34 - QEMU can enter remote process mode by using the "remote" machine
/qemu/common-user/host/riscv/
H A Dsafe-syscall.inc.S31 * we enter with a0 == &signal_pending
/qemu/common-user/host/aarch64/
H A Dsafe-syscall.inc.S30 * we enter with x0 == &signal_pending
/qemu/common-user/host/sparc64/
H A Dsafe-syscall.inc.S41 * we enter with o0 == &signal_pending

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