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/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
35 clock-names:
[all …]
/linux-5.10/include/linux/platform_data/
Dad5449.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Author: Lars-Peter Clausen <lars@metafoo.de>
14 * enum ad5449_sdo_mode - AD5449 SDO pin configuration
17 * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode.
29 * struct ad5449_platform_data - Platform data for the ad5449 DAC driver
31 * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the
/linux-5.10/drivers/clk/qcom/
Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable()
51 /* De-assert active-low PLL reset. */ in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
61 return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL, in clk_pll_enable()
71 regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_disable()
[all …]
Dclk-hfpll.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
12 #include "clk-regmap.h"
13 #include "clk-hfpll.h"
23 struct hfpll_data const *hd = h->d; in __clk_hfpll_init_once()
24 struct regmap *regmap = h->clkr.regmap; in __clk_hfpll_init_once()
26 if (likely(h->init_done)) in __clk_hfpll_init_once()
30 if (hd->config_val) in __clk_hfpll_init_once()
31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
32 regmap_write(regmap, hd->m_reg, 0); in __clk_hfpll_init_once()
[all …]
/linux-5.10/drivers/gpu/drm/msm/hdmi/
Dhdmi_pll_8960.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
27 * configuration into common-clock-framework.
239 msm_writel(data, pll->mmio + reg); in pll_write()
244 return msm_readl(pll->mmio + reg); in pll_read()
249 return platform_get_drvdata(pll->pdev); in pll_get_phy()
266 /* Wait for a short time before de-asserting in hdmi_pll_enable()
269 * to assert and de-assert. in hdmi_pll_enable()
273 /* De-assert PLL S/W reset */ in hdmi_pll_enable()
282 * Wait for a short time before de-asserting to allow the hardware to in hdmi_pll_enable()
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/linux-5.10/drivers/reset/
Dreset-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/reset-controller.h>
46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET); in brcmstb_reset_assert()
57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR); in brcmstb_reset_deassert()
58 /* Maximum reset delay after de-asserting a line and seeing block in brcmstb_reset_deassert()
73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) & in brcmstb_reset_status()
85 struct device *kdev = &pdev->dev; in brcmstb_reset_probe()
91 return -ENOMEM; in brcmstb_reset_probe()
94 priv->base = devm_ioremap_resource(kdev, res); in brcmstb_reset_probe()
95 if (IS_ERR(priv->base)) in brcmstb_reset_probe()
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/linux-5.10/drivers/cpufreq/
Dgx-suspmod.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * (C) 2002 Hiroshi Miura <miura@da-cha.org>
10 * software is provided AS-IS with no warranties.
19 * Suspend Modulation works by asserting and de-asserting the SUSP# pin
20 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
28 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
35 * F_eff = Fgx * ----------------------
43 * on_duration = off_duration * (stock_freq - freq) / freq
46 * on_duration = DURATION - off_duration
48 *---------------------------------------------------------------------------
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/linux-5.10/arch/arm/mach-omap2/
Dprminst44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "prcm-common.h"
23 #include "prm-regbits-44xx.h"
34 * omap_prm_base_init - Populates the prm partitions
75 /* Read-modify-write a register in PRM. Caller must lock */
90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of
97 * -EINVAL upon parameter error.
112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule
118 * IP. These modules may have multiple hard-reset lines that reset
120 * place the submodule into reset. Returns 0 upon success or -EINVAL
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Dprm2xxx_3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments, Inc.
18 #include "prm-regbits-24xx.h"
22 * omap2_prm_is_hardreset_asserted - read the HW reset line state of
31 * -EINVAL if called while running on a non-OMAP2/3 chip.
40 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
48 * IP. These modules may have multiple hard-reset lines that reset
50 * place the submodule into reset. Returns 0 upon success or -EINVAL
64 * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
75 * IP. These modules may have multiple hard-reset lines that reset
[all …]
Dprm33xx.c4 * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
24 #include "prm-regbits-33xx.h"
42 /* Read-modify-write a register in PRM. Caller must lock */
56 * am33xx_prm_is_hardreset_asserted - read the HW reset line state of
65 * -EINVAL upon parameter error.
80 * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule
88 * IP. These modules may have multiple hard-reset lines that reset
90 * place the submodule into reset. Returns 0 upon success or -EINVAL
104 * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and
115 * IP. These modules may have multiple hard-reset lines that reset
[all …]
/linux-5.10/drivers/remoteproc/
Dqcom_q6v5_adsp.c1 // SPDX-License-Identifier: GPL-2.0
108 val = readl(adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
110 writel(val, adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
112 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks); in qcom_adsp_shutdown()
115 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
116 adsp->halt_lpass + LPASS_PWR_ON_REG, &val); in qcom_adsp_shutdown()
120 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
121 adsp->halt_lpass + LPASS_MASTER_IDLE_REG, in qcom_adsp_shutdown()
126 regmap_write(adsp->halt_map, in qcom_adsp_shutdown()
127 adsp->halt_lpass + LPASS_HALTREQ_REG, 1); in qcom_adsp_shutdown()
[all …]
/linux-5.10/drivers/clk/
Dclk-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
7 * Sergej Sawazki <ce3a@gmx.de>
12 #include <linux/clk-provider.h>
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
32 * struct clk_gpio - gpio gated clock
34 * @hw: handle between common and hardware-specific interfaces
[all …]
/linux-5.10/drivers/i2c/
Di2c-smbus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * i2c-smbus.c - SMBus extensions to the I2C protocol
6 * Copyright (C) 2010-2019 Jean Delvare <jdelvare@suse.de>
12 #include <linux/i2c-smbus.h>
38 if (!client || client->addr != data->addr) in smbus_do_alert()
40 if (client->flags & I2C_CLIENT_TEN) in smbus_do_alert()
48 if (client->dev.driver) { in smbus_do_alert()
49 driver = to_i2c_driver(client->dev.driver); in smbus_do_alert()
50 if (driver->alert) in smbus_do_alert()
51 driver->alert(client, data->type, data->data); in smbus_do_alert()
[all …]
/linux-5.10/arch/arm/mach-sunxi/
Dmc_smp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
7 * arch/arm/mach-sunxi/mc_smp.c
9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and
10 * arch/arm/mach-hisi/platmcpm.c
14 #include <linux/arm-cci.h>
19 #include <linux/irqchip/arm-gic.h>
71 /* R_CPUCFG registers, specific to sun8i-a83t */
111 is_compatible = of_device_is_compatible(node, "arm,cortex-a15"); in sunxi_core_is_cortex_a15()
[all …]
/linux-5.10/drivers/clk/tegra/
Dclk.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
30 /* Handlers for SoC-specific reset lines */
116 return -EINVAL; in tegra_clk_rst_assert()
130 return -EINVAL; in tegra_clk_rst_deassert()
195 * All non-boot peripherals will be in reset state on resume. in tegra_clk_periph_resume()
196 * Wait for 5us of reset propagation delay before de-asserting in tegra_clk_periph_resume()
213 return -ENOMEM; in tegra_clk_periph_ctx_init()
257 for (; dup_list->clk_id < clk_max; dup_list++) { in tegra_init_dup_clks()
[all …]
/linux-5.10/drivers/input/touchscreen/
Dauo-pixcir-ts.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for AUO in-cell touchscreens
5 * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
7 * loosely based on auo_touch.c from Dell Streak vendor-kernel
23 #include <linux/input/auo-pixcir-ts.h>
77 * sleep: scan speed 10Hz can be auto-activated, wakeup on 1st touch
127 struct i2c_client *client = ts->client; in auo_pixcir_collect_data()
128 const struct auo_pixcir_ts_platdata *pdata = ts->pdata; in auo_pixcir_collect_data()
137 dev_err(&client->dev, "failed to read coordinate, %d\n", ret); in auo_pixcir_collect_data()
145 dev_err(&client->dev, "could not read touch area, %d\n", ret); in auo_pixcir_collect_data()
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/linux-5.10/Documentation/scsi/
DChangeLog.megaraid1 Release Date : Thu Nov 16 15:32:35 EST 2006 -
9 and re-initialize its internal RAID structure.
14 2. Authors email-id domain name changed from lsil.com to lsi.com.
17 Release Date : Fri May 19 09:31:45 EST 2006 - Seokmann Ju <sju@lsil.com>
23 Root Cause: the driver registered controllers as 64-bit DMA capable
26 identifying 64-bit DMA capable controllers.
28 > -----Original Message-----
31 > To: linux-scsi@vger.kernel.org; Kolli, Neela; Mukker, Atul;
86 issue on 64-bit platform.
93 > -----Original Message-----
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/linux-5.10/drivers/staging/olpc_dcon/
Dolpc_dcon.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright © 2006-2007 Red Hat, Inc.
6 * Copyright © 2006-2007 Advanced Micro Devices, Inc.
8 * Copyright (c) 2010-2011 Andres Salomon <dilinger@queued.net>
26 #include <linux/olpc-ec.h>
48 return i2c_smbus_write_word_data(dcon->client, reg, val); in dcon_write()
53 return i2c_smbus_read_word_data(dcon->client, reg); in dcon_read()
56 /* ===== API functions - these are called by a variety of users ==== */
66 rc = -ENXIO; in dcon_hw_init()
72 rc = pdata->init(dcon); in dcon_hw_init()
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/linux-5.10/LICENSES/dual/
DMPL-1.11 Valid-License-Identifier: MPL-1.1
2 SPDX-URL: https://spdx.org/licenses/MPL-1.1.html
3 Usage-Guide:
4 Do NOT use. The MPL-1.1 is not GPL2 compatible. It may only be used for
5 dual-licensed files where the other license is GPL2 compatible.
11 SPDX-License-Identifier: MPL-1.1
12 License-Text:
17 ---------------
81 appropriate decompression or de-archiving software is widely available
98 The Initial Developer hereby grants You a world-wide, royalty-free,
[all …]
/linux-5.10/drivers/gpu/drm/xlnx/
Dzynqmp_disp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
27 #include <linux/dma-mapping.h>
43 * --------
48 * +------------------------------------------------------------+
49 * +--------+ | +----------------+ +-----------+ |
50 * | DPDMA | --->| | --> | Video | Video +-------------+ |
51 * | 4x vid | | | | | Rendering | -+--> | | | +------+
[all …]
/linux-5.10/arch/powerpc/kvm/
Dbook3s.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Alexander Graf <agraf@suse.de>
7 * Kevin Wolf <mail@kevin-wolf.de>
77 if (is_kvmppc_hv_enabled(vcpu->kvm)) in kvmppc_update_int_pending()
91 if (is_kvmppc_hv_enabled(vcpu->kvm)) in kvmppc_critical_section()
113 vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags); in kvmppc_inject_interrupt()
146 unsigned long old_pending = vcpu->arch.pending_exceptions; in kvmppc_book3s_dequeue_irqprio()
149 &vcpu->arch.pending_exceptions); in kvmppc_book3s_dequeue_irqprio()
151 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, in kvmppc_book3s_dequeue_irqprio()
157 vcpu->stat.queue_intr++; in kvmppc_book3s_queue_irqprio()
[all …]
/linux-5.10/arch/x86/kernel/
Dsmpboot.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * Pentium Pro and Pentium-II/Xeon MP machines.
19 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
32 * Martin J. Bligh : Added support for multi-quad systems
79 #include <asm/intel-family.h>
81 #include <asm/spec-ctrl.h>
270 * topology_is_primary_thread - Check whether CPU is the primary SMT thread
279 * topology_smt_supported - Check whether SMT is supported by the CPUs
287 * topology_phys_to_logical_pkg - Map a physical package id to a logical
289 * Returns logical package id or -1 if not found
[all …]
/linux-5.10/Documentation/admin-guide/media/
Dbttv.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ----------------------
12 ./scripts/config -e PCI
13 ./scripts/config -m I2C
14 ./scripts/config -m INPUT
15 ./scripts/config -m MEDIA_SUPPORT
16 ./scripts/config -e MEDIA_PCI_SUPPORT
17 ./scripts/config -e MEDIA_ANALOG_TV_SUPPORT
18 ./scripts/config -e MEDIA_DIGITAL_TV_SUPPORT
19 ./scripts/config -e MEDIA_RADIO_SUPPORT
[all …]
/linux-5.10/drivers/usb/host/
Dehci-fsl.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2005-2009 MontaVista Software, Inc.
9 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
29 #include "ehci-fsl.h"
32 #define DRV_NAME "ehci-fsl"
40 * fsl_ehci_drv_probe - initialize FSL-based HCDs
56 pr_debug("initializing FSL-SOC USB Controller\n"); in fsl_ehci_drv_probe()
59 pdata = dev_get_platdata(&pdev->dev); in fsl_ehci_drv_probe()
61 dev_err(&pdev->dev, in fsl_ehci_drv_probe()
62 "No platform data for %s.\n", dev_name(&pdev->dev)); in fsl_ehci_drv_probe()
[all …]
/linux-5.10/drivers/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
111 supports spi-mem interface.
181 this code to manage the per-word or per-transfer accesses to the
211 Flash over 1/2/4-bit wide bus. Enable this option if you have a
219 This enables dedicated general purpose SPI/Microwire1-compatible
220 master mode interface (SSI1) for CLPS711X-based CPUs.
[all …]

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