| /linux-3.3/arch/arm/mach-omap2/ |
| D | cpuidle44xx.c | 36 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
38 /* C2- CPU0 OFF + CPU1 OFF + MPU CSWR */
40 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
77 * CPU0 has to stay ON (i.e in C1) until CPU1 is OFF state. in omap4_enter_idle()
115 * VFP and per CPU IRQ context. Only CPU0 state is in omap4_enter_idle()
205 /* C1 - CPU0 ON + CPU1 ON + MPU ON */ in omap4_idle_init()
214 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ in omap4_idle_init()
221 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ in omap4_idle_init()
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| D | omap-mpuss-lowpower.c | 9 * CPU0 and CPU1 LPRM modules.
10 * CPU0, CPU1 and MPUSS each have there own power domain and
13 * The CPU0 and CPU1 can't support Closed switch Retention (CSWR)
22 * CPU0 CPU1 MPUSS
31 * Note: CPU0 is the master core and it is the last CPU to go down
79 * Program the wakeup routine address for the CPU0 and CPU1
351 pr_err("Lookup failed for CPU0 pwrdm\n"); in omap4_mpuss_init()
359 /* Initialise CPU0 power domain state to ON */ in omap4_mpuss_init()
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| D | omap-smp.c | 47 * OMAP44XX EMU/HS devices - CPU0 SMP bit access is enabled in PPA in platform_secondary_init()
48 * init and for CPU1, a secure PPA API provided. CPU0 must be ON in platform_secondary_init()
98 * wake-up. To wakeup CPU1, CPU0 forces the CPU1 clockdomain to in boot_secondary()
103 * 4.3.4.2 Power States of CPU0 and CPU1 in boot_secondary()
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| D | pm44xx.c | 58 * CPU0 and CPU1 power domains need to be in OFF or DORMANT state, in omap4_pm_suspend()
147 * Skip CPU0 and CPU1 power domains. CPU1 is programmed in pwrdms_setup()
148 * through hotplug path and CPU0 explicitly programmed in pwrdms_setup()
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| /linux-3.3/Documentation/cpuidle/ |
| D | sysfs.txt | 28 # ls -lR /sys/devices/system/cpu/cpu0/cpuidle/
29 /sys/devices/system/cpu/cpu0/cpuidle/:
36 /sys/devices/system/cpu/cpu0/cpuidle/state0:
45 /sys/devices/system/cpu/cpu0/cpuidle/state1:
54 /sys/devices/system/cpu/cpu0/cpuidle/state2:
63 /sys/devices/system/cpu/cpu0/cpuidle/state3:
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| /linux-3.3/Documentation/ |
| D | IRQ-affinity.txt | 18 Here is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting
35 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
52 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
56 i.e counters for the CPU0-3 did not change.
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| D | cpu-hotplug.txt | 165 drwxr-xr-x 3 root root 0 Sep 19 07:44 cpu0
199 Q: Why can't i remove CPU0 on some systems?
208 In such cases you will also notice that the online file is missing under cpu0.
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| /linux-3.3/tools/power/cpupower/bench/ |
| D | cpufreq-bench_script.sh | 43 echo $up_threshold >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold
44 echo $sampling_rate >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate
45 up_threshold_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold)
46 sampling_rate_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate)
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| /linux-3.3/Documentation/cpu-freq/ |
| D | cpufreq-stats.txt | 43 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # ls -l
60 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat time_in_state
75 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat total_trans
88 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat trans_table
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| /linux-3.3/arch/sparc/include/asm/ |
| D | mmu_context_64.h | 99 * set cpu0's bits in cpu_vm_mask in switch_mm()
111 * At that point cpu0 continues to use a stale TSB, the one from in switch_mm()
113 * cpu0 to update it's TSB because at that point the cpu_vm_mask in switch_mm()
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| /linux-3.3/arch/powerpc/platforms/embedded6xx/ |
| D | mpc7448_hpc2.c | 97 * TSI108:PB_INT[0] -> CPU0:INT#
98 * TSI108:PB_INT[1] -> CPU0:MCP#
143 /* Configure MPIC outputs to CPU0 */ in mpc7448_hpc2_init_IRQ()
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| D | holly.c | 143 * TSI108:PB_INT[0] -> CPU0:INT#
144 * TSI108:PB_INT[1] -> CPU0:MCP#
189 /* Configure MPIC outputs to CPU0 */ in holly_init_IRQ()
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| /linux-3.3/arch/mips/kernel/ |
| D | smp-bmips.c | 79 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output in bmips_smp_setup()
91 /* route HW interrupt 0 to CPU0, HW interrupt 1 to CPU1 */ in bmips_smp_setup()
120 * IPI IRQ setup - runs on CPU0
133 * Tell the hardware to boot CPUx - runs on CPU0
219 * Runs on CPU0 after all CPUs have been booted
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| D | sync-r4k.c | 4 * All CPUs will have their count registers synchronised to the CPU0 next time
5 * value. This can cause a small timewarp for CPU0. All other CPU's should
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| /linux-3.3/arch/x86/mm/ |
| D | tlb.c | 75 * [cpu0: the cpu that switches]
84 * Now the smp_invalidate_interrupt won't call leave_mm if cpu0
87 * Now cpu0 accepts tlb flushes for the new mm.
92 * cpu active_mm is correct, cpu0 already handles
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| /linux-3.3/arch/mn10300/unit-asb2364/include/unit/ |
| D | timex.h | 71 * Since CPU0 uses the tick timer which is 24-bits, we use timer 4 & 5
73 * CPU0).
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| /linux-3.3/include/xen/interface/hvm/ |
| D | params.h | 31 * How should CPU0 event-channel notifications be delivered?
37 * If val == 0 then CPU0 event-channel notifications are not delivered.
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| /linux-3.3/Documentation/laptops/ |
| D | laptop-mode.txt | 193 or a value listed in /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies.
296 # /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
618 if [ $DO_CPU -eq 1 -a -e /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq ]; then
620 CPU_MAXFREQ=`cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq`
622 echo $CPU_MAXFREQ > /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq
680 if [ $DO_CPU -eq 1 -a -e /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq ]; then
681 …echo `cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq` > /sys/devices/system/cpu/cpu0/cp…
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| /linux-3.3/arch/x86/kernel/cpu/mcheck/ |
| D | winchip.c | 18 printk(KERN_EMERG "CPU0: Machine Check Exception.\n"); in winchip_machine_check()
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| /linux-3.3/tools/power/cpupower/man/ |
| D | cpupower-frequency-set.1 | 10 …ify cpufreq settings without having to type e.g. "/sys/devices/system/cpu/cpu0/cpufreq/scaling_set…
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| /linux-3.3/arch/arm/mach-highbank/ |
| D | hotplug.c | 52 * CPU0 should not be shut down via hotplug. cpu_idle can WFI in platform_cpu_disable()
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| /linux-3.3/drivers/i2c/busses/ |
| D | i2c-nforce2-s4985.c | 28 * CPU0: virtual adapter 1, channel 1
113 /* CPU0: channel 1 enabled */ in nforce2_access_virt1()
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| D | i2c-amd756-s4882.c | 30 * CPU0: virtual adapter 1, channels 1 and 0
118 /* CPU0: channels 1 and 0 enabled */ in amd756_access_virt1()
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| /linux-3.3/arch/sh/kernel/ |
| D | topology.c | 73 * and cpu0. in topology_init()
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| /linux-3.3/drivers/edac/ |
| D | edac_core.h | 126 * cpu/cpu0/.. <L1 and L2 block directory>
274 * cpu/cpu0/...
372 * cpu/cpu0/...
|