Home
last modified time | relevance | path

Searched +full:clock +full:- +full:lanes (Results 1 – 25 of 824) sorted by relevance

12345678910>>...33

/linux/Documentation/devicetree/bindings/media/
H A Dqcom,sm8550-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8550-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Depeng Shao <quic_depengs@quicinc.com>
17 const: qcom,sm8550-camss
22 reg-names:
24 - const: csid0
25 - const: csid1
26 - const: csid2
[all …]
H A Dqcom,sm8250-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
17 const: qcom,sm8250-camss
23 clock-names:
25 - const: cam_ahb_clk
26 - const: cam_hf_axi
27 - const: cam_sf_axi
[all …]
H A Dqcom,sdm670-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm670-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Acayan <mailingradian@gmail.com>
17 const: qcom,sdm670-camss
22 reg-names:
24 - const: csid0
25 - const: csid1
26 - const: csid2
[all …]
H A Dbrcm,bcm2835-unicam.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/brcm,bcm2835-unicam.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
12 description: |-
14 CSI-2 or CCP2 data from image sensors or similar devices.
26 const: brcm,bcm2835-unicam
30 - description: Unicam block.
31 - description: Clock Manager Image (CMI) block.
[all …]
H A Dqcom,sc8280xp-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc8280xp-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
17 const: qcom,sc8280xp-camss
22 clock-names:
24 - const: camnoc_axi
25 - const: cpas_ahb
26 - const: csiphy0
[all …]
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
[all …]
H A Dti,cal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
15 processing capability to connect CSI2 image-sensor modules to the
24 - ti,dra72-cal
26 - ti,dra72-pre-es2-cal
28 - ti,dra76-cal
30 - ti,am654-cal
[all …]
H A Dcdns,csi2rx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence MIPI-CSI2 RX controller
10 - Maxime Ripard <mripard@kernel.org>
13 The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
14 lanes in input, and 4 different pixel streams in output.
19 - enum:
20 - starfive,jh7110-csi2rx
21 - ti,j721e-csi2rx
[all …]
H A Dfsl,imx6-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/fsl,imx6-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI CSI-2 Receiver core in the i.MX SoC
10 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
11 SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
12 combined with a D-PHY core mixed into the same register block. In
13 addition this device consists of an i.MX-specific "CSI2IPU gasket"
16 controller's 32-bit output image bus onto four 16-bit parallel busses
[all …]
H A Drenesas,rzg2l-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15 (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
21 - items:
22 - enum:
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j722s-evm-csi2-quad-tevi-ov5640.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * DT Overlay for 4 x TEVI OV5640 MIPI Camera module on J722S-EVM board.
5 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include "k3-pinctrl.h"
15 cam0_reset_pins_default: cam0-default-reset-pins {
16 pinctrl-single,pins = <
21 cam1_reset_pins_default: cam1-default-reset-pins {
22 pinctrl-single,pins = <
[all …]
H A Dk3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * DT Overlay for 4 x RPi Camera V2.1 on J722S-EVM board.
5 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
7 * Schematics: https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf
10 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "k3-pinctrl.h"
17 cam0_reset_pins_default: cam0-default-reset-pins {
18 pinctrl-single,pins = <
23 cam1_reset_pins_default: cam1-default-reset-pins {
[all …]
H A Dk3-j721e-sk-csi2-dual-imx219.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
4 * on J721E SK, AM68 SK or AM69-SK board.
5 * https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
7 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "k3-pinctrl.h"
17 clk_imx219_fixed: imx219-xclk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779a0-falcon-csi-dsi.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Falcon CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-lanes = <0>;
22 data-lanes = <1 2 3 4>;
23 remote-endpoint = <&max96712_out0>;
33 #address-cells = <1>;
34 #size-cells = <0>;
[all …]
H A Dhihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 #include "aistarvision-mipi-adapter-2.1.dtsi"
18 clock-lanes = <0>;
19 data-lanes = <1 2>;
20 remote-endpoint = <&ov5645_ep>;
32 clock-lanes = <0>;
33 data-lanes = <1 2>;
34 remote-endpoint = <&imx219_ep>;
41 pinctrl-0 = <&i2c3_pins>;
42 pinctrl-names = "default";
[all …]
H A Dwhite-hawk-csi-dsi.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the White Hawk CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
22 clock-lanes = <0>;
23 data-lanes = <1 2 3>;
24 line-orders = <MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC
27 remote-endpoint = <&max96712_out0>;
[all …]
H A Dr8a774c0-ek874-mipi-2.1.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected with aistarvision-mipi-v2-adapter board
9 /dts-v1/;
10 #include "r8a774c0-ek874.dts"
13 #include "aistarvision-mipi-adapter-2.1.dtsi"
16 …model = "Silicon Linux RZ/G2E evaluation kit EK874 (CAT874 + CAT875) with aistarvision-mipi-v2-ada…
17 compatible = "si-linux,cat875", "si-linux,cat874", "renesas,r8a774c0";
38 clock-lanes = <0>;
39 data-lanes = <1 2>;
40 remote-endpoint = <&ov5645_ep>;
[all …]
H A Drz-smarc-cru-csi-ov5645.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 compatible = "regulator-fixed";
12 regulator-name = "camera_vdddo";
13 regulator-min-microvolt = <1800000>;
14 regulator-max-microvolt = <1800000>;
15 regulator-always-on;
19 compatible = "regulator-fixed";
20 regulator-name = "camera_vdda";
21 regulator-min-microvolt = <2800000>;
22 regulator-max-microvolt = <2800000>;
[all …]
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dadi,adv748x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kieran Bingham <kieran.bingham@ideasonboard.com>
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
15 HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB
21 - enum:
22 - adi,adv7481
23 - adi,adv7482
29 The ADV748x has up to twelve 256-byte maps that can be accessed via the
[all …]
H A Dtoshiba,tc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
10 source, the clock input is named "refclk".
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-cadence-torrent.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
26 '#address-cells':
[all …]
/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
[all …]
/linux/drivers/media/i2c/
H A Dccs-pll.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * drivers/media/i2c/ccs-pll.h
17 /* CSI-2 or CCP-2 */
22 /* OP PIX clock is for all lanes in total normally. */
33 /* If set, the pre-PLL divider may have odd values, too. */
36 * If set, the OP PIX clock doesn't have to exactly match with data rate, it may
47 * If set, the OP SYS clock is a dual data rate clock, transferring two bits per
52 * If set, the OP PIX clock is a dual data rate clock, transferring two pixels
58 * struct ccs_pll_branch_fr - CCS PLL configuration (front)
60 * A single branch front-end of the CCS PLL tree.
[all …]
/linux/drivers/gpu/drm/tegra/
H A Ddp.c1 // SPDX-License-Identifier: MIT
3 * Copyright (C) 2013-2019 NVIDIA Corporation
17 caps->enhanced_framing = false; in drm_dp_link_caps_reset()
18 caps->tps3_supported = false; in drm_dp_link_caps_reset()
19 caps->fast_training = false; in drm_dp_link_caps_reset()
20 caps->channel_coding = false; in drm_dp_link_caps_reset()
21 caps->alternate_scrambler_reset = false; in drm_dp_link_caps_reset()
27 dest->enhanced_framing = src->enhanced_framing; in drm_dp_link_caps_copy()
28 dest->tps3_supported = src->tps3_supported; in drm_dp_link_caps_copy()
29 dest->fast_training = src->fast_training; in drm_dp_link_caps_copy()
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-tqma8mpql-mba8mp-ras314-imx219.dtso1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2022-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
7 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/media/video-interfaces.h>
13 #include "imx8mp-pinfunc.h"
20 reg_cam: regulator-cam {
21 compatible = "regulator-fixed";
22 regulator-name = "reg_cam";
[all …]

12345678910>>...33