Searched full:carryless (Results 1 – 6 of 6) sorted by relevance
159 # Generate constants for carryless multiplication based CRC computation.184 # Given 64x64 => 128 bit carryless multiplication instructions, two193 # Each 64x64 => 128 bit carryless multiplication instruction
6 * RISC-V Zbc (scalar carryless multiplication) extension. The includer of this113 * implicitly introduced by each carryless multiplication (shown as in crc_clmul_long()
32 * Use carryless multiply version of crc32c when buffer size is >= 512 to
52 // support VAES (vector AES), VPCLMULQDQ (vector carryless multiplication), and169 // carryless multiplication of two 128-bit input polynomials to get a 256-bit181 // just works, since XOR and carryless multiplication are symmetric with respect193 // multiplication. This is because an M-bit by N-bit carryless multiplication212 // 128-bit carryless multiplication, so we break the 128 x 128 multiplication
11 * processors with instructions to accelerate AES and carryless
713 instructions to accelerate AES and carryless multiplication, e.g.