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Searched +full:cap +full:- +full:sdio +full:- +full:irq (Results 1 – 25 of 79) sorted by relevance

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/linux-5.10/arch/arm/boot/dts/
Dkirkwood-6281.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
28 bus-range = <0x00 0xff>;
[all …]
Dkirkwood-6192.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
21 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
23 #address-cells = <3>;
24 #size-cells = <2>;
25 #interrupt-cells = <1>;
28 bus-range = <0x00 0xff>;
[all …]
Dkirkwood-6282.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
27 #address-cells = <3>;
28 #size-cells = <2>;
29 #interrupt-cells = <1>;
32 bus-range = <0x00 0xff>;
[all …]
Drk3229-xms6.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/input/input.h>
17 dc_12v: dc-12v-regulator {
18 compatible = "regulator-fixed";
19 regulator-name = "dc_12v";
20 regulator-always-on;
21 regulator-boot-on;
22 regulator-min-microvolt = <12000000>;
23 regulator-max-microvolt = <12000000>;
[all …]
Drk3288-rock2-square.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "rk3288-rock2-som.dtsi"
9 compatible = "radxa,rock2-square", "rockchip,rk3288";
12 stdout-path = "serial2:115200n8";
15 adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 1>;
18 io-channel-names = "buttons";
[all …]
Drk3036-kylin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
9 compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
16 leds: gpio-leds {
17 compatible = "gpio-leds";
19 work_led: led-0 {
22 pinctrl-names = "default";
23 pinctrl-0 = <&led_ctl>;
27 sdio_pwrseq: sdio-pwrseq {
28 compatible = "mmc-pwrseq-simple";
[all …]
Drk3288-firefly-reload.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3288-firefly-reload-core.dtsi"
11 model = "Firefly-RK3288-reload";
12 compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 1>;
17 io-channel-names = "buttons";
18 keyup-threshold-microvolt = <1800000>;
[all …]
Darmada-370-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
20 compatible = "marvell,armada-370-xp";
28 #address-cells = <1>;
29 #size-cells = <0>;
31 compatible = "marvell,sheeva-v7";
38 compatible = "arm,cortex-a9-pmu";
39 interrupts-extended = <&mpic 3>;
43 #address-cells = <2>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
[all …]
Dzx-dw-mshc.txt7 by synopsys-dw-mshc.txt and the properties used by the ZTE specific
13 - "zte,zx296718-dw-mshc": for ZX SoCs
18 compatible = "zte,zx296718-dw-mshc";
21 fifo-depth = <32>;
22 data-addr = <0x200>;
23 fifo-watermark-aligned;
24 bus-width = <4>;
25 clock-frequency = <50000000>;
27 clock-names = "biu", "ciu";
28 max-frequency = <50000000>;
[all …]
Dingenic,mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: mmc-controller.yaml#
18 - enum:
19 - ingenic,jz4740-mmc
20 - ingenic,jz4725b-mmc
21 - ingenic,jz4760-mmc
22 - ingenic,jz4780-mmc
[all …]
Dsdhci-milbeaut.txt7 - compatible: "socionext,milbeaut-m10v-sdhci-3.0"
8 - clocks: Must contain an entry for each entry in clock-names. It is a
9 list of phandles and clock-specifier pairs.
10 See ../clocks/clock-bindings.txt for details.
11 - clock-names: Should contain the following two entries:
12 "iface" - clock used for sdhci interface
13 "core" - core clock for sdhci controller
16 - fujitsu,cmd-dat-delay-select: boolean property indicating that this host
21 compatible = "socionext,milbeaut-m10v-sdhci-3.0";
24 voltage-ranges = <3300 3300>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/
Dmarvell-bt-8xxx.txt1 Marvell 8897/8997 (sd8897/sd8997) bluetooth devices (SDIO or USB based)
2 ------
3 The 8997 devices supports multiple interfaces. When used on SDIO interfaces,
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
16 - marvell,cal-data: Calibration data downloaded to the device during
18 This is only applicable to SDIO devices.
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/wireless/
Dmarvell-8xxx.txt1 Marvell 8787/8897/8997 (sd8787/sd8897/sd8997/pcie8997) SDIO/PCIE devices
2 ------
4 This node provides properties for controlling the Marvell SDIO/PCIE wireless device.
5 The node is expected to be specified as a child node to the SDIO/PCIE controller that
10 - compatible : should be one of the following:
19 - marvell,caldata* : A series of properties with marvell,caldata prefix,
21 initialization. This is an array of unsigned 8-bit values.
24 "marvell,caldata-txpwrlimit-2g" (length = 566).
25 "marvell,caldata-txpwrlimit-5g-sub0" (length = 502).
26 "marvell,caldata-txpwrlimit-5g-sub1" (length = 688).
[all …]
/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3328-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
14 stdout-path = "serial2:1500000n8";
17 dc_12v: dc-12v {
18 compatible = "regulator-fixed";
19 regulator-name = "dc_12v";
20 regulator-always-on;
21 regulator-boot-on;
22 regulator-min-microvolt = <12000000>;
[all …]
Drk3318-a95x-z2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
9 compatible = "zkmagic,a95x-z2", "rockchip,rk3318";
12 stdout-path = "serial2:1500000n8";
15 adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
[all …]
Drk3399-sapphire-excavator.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3399-sapphire.dtsi"
10 model = "Excavator-RK3399 Board";
11 compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
13 adc-keys {
14 compatible = "adc-keys";
15 io-channels = <&saradc 1>;
16 io-channel-names = "buttons";
17 keyup-threshold-microvolt = <1800000>;
[all …]
Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 emmc_pwrseq: emmc-pwrseq {
24 compatible = "mmc-pwrseq-emmc";
25 pinctrl-0 = <&emmc_reset>;
26 pinctrl-names = "default";
27 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
30 keys: gpio-keys {
[all …]
Drk3399-roc-pc-mezzanine.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
7 /dts-v1/;
8 #include "rk3399-roc-pc.dtsi"
11 model = "Firefly ROC-RK3399-PC Mezzanine Board";
12 compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399";
15 poe_12v: poe-12v {
16 compatible = "regulator-fixed";
17 regulator-name = "poe_12v";
18 regulator-always-on;
[all …]
/linux-5.10/arch/mips/boot/dts/ingenic/
Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
[all …]
Dx1830.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
[all …]
Dx1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/x1000-cgu.h>
4 #include <dt-bindings/dma/x1000-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
[all …]
Djz4725b.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
[all …]
Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
[all …]
/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
26 stdout-path = "serial0:921600n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 compatible = "shared-dma-pool";
36 no-map;
46 pinctrl-names = "default";
[all …]

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