Searched +full:bits +full:- +full:per +full:- +full:pixel (Results 1 – 25 of 436) sorted by relevance
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/linux-6.8/drivers/staging/media/atomisp/include/linux/ |
D | atomisp_platform.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 21 #include <asm/intel-family.h> 25 #include <media/v4l2-subdev.h> 50 ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY,/* 8 bits per subpixel (legacy) */ 51 ATOMISP_INPUT_FORMAT_YUV420_8, /* 8 bits per subpixel */ 52 ATOMISP_INPUT_FORMAT_YUV420_10,/* 10 bits per subpixel */ 53 ATOMISP_INPUT_FORMAT_YUV420_16,/* 16 bits per subpixel */ 54 ATOMISP_INPUT_FORMAT_YUV422_8, /* UYVY..UVYV, 8 bits per subpixel */ 55 ATOMISP_INPUT_FORMAT_YUV422_10,/* UYVY..UVYV, 10 bits per subpixel */ 56 ATOMISP_INPUT_FORMAT_YUV422_16,/* UYVY..UVYV, 16 bits per subpixel */ [all …]
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/linux-6.8/Documentation/fb/ |
D | api.rst | 9 --------------- 12 with frame buffer devices. In-kernel APIs between device drivers and the frame 22 --------------- 36 - FB_CAP_FOURCC 44 -------------------- 46 Pixels are stored in memory in hardware-dependent formats. Applications need 47 to be aware of the pixel storage format in order to write image data to the 58 - FB_TYPE_PACKED_PIXELS 60 Macropixels are stored contiguously in a single plane. If the number of bits 61 per macropixel is not a multiple of 8, whether macropixels are padded to the [all …]
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D | sa1100fb.rst | 8 This is a driver for a graphic framebuffer for the SA-1100 LCD 19 controller. The bits per pixel (bpp) value should be 4, 8, 12, or 20 16. LCCR values are display-specific and should be computed as 21 documented in the SA-1100 Developer's Manual, Section 11.7. Dual-panel 34 bpp:<value> Configure for <value> bits per pixel
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/linux-6.8/Documentation/userspace-api/media/v4l/ |
D | fourcc.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 Guidelines for Video4Linux pixel format 4CCs 8 the pixel format, compression and colour space. The interpretation of the 14 --------- 18 - B: raw bayer, uncompressed 19 - b: raw bayer, DPCM compressed 20 - a: A-law compressed 21 - u: u-law compressed 23 2nd character: pixel order 25 - B: BGGR [all …]
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D | pixfmt-cnf4.rst | 1 .. -*- coding: utf-8; mode: rst -*- 3 .. _V4L2-PIX-FMT-CNF4: 9 Depth sensor confidence information as a 4 bits per pixel packed array 15 confidence information in range 0-15 with 0 indicating that the sensor was 20 Bits 0-3 of byte n refer to confidence value of depth pixel 2*n, 21 bits 4-7 to confidence value of depth pixel 2*n+1. 23 **Bit-packed representation.** 25 .. flat-table:: 26 :header-rows: 0 27 :stub-columns: 0 [all …]
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D | pixfmt-packed-yuv.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 3 .. _packed-yuv: 15 - In all the tables that follow, bit 7 is the most significant bit in a byte. 16 - 'Y', 'Cb' and 'Cr' denote bits of the luma, blue chroma (also known as 18 denotes bits of the alpha component (if supported by the format), and 'X' 19 denotes padding bits. 28 The next table lists the packed YUV 4:4:4 formats with less than 8 bits per 30 seen in a 16-bit word, which is then stored in memory in little endian byte 31 order, and on the number of bits for each component. For instance the YUV565 32 format stores a pixel in a 16-bit word [15:0] laid out at as [Y'\ :sub:`4-0` [all …]
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/linux-6.8/Documentation/gpu/amdgpu/display/ |
D | dc-glossary.rst | 7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere, 19 Application-Specific Integrated Circuit 28 Bits Per Colour/Component 31 Bits Per Pixel 34 * PCLK: Pixel Clock 41 * PPLL: Pixel PLL 49 Cathode Ray Tube Controller - commonly called "Controller" - Generates 50 raw stream of pixels, clocked at pixel clock 95 Display Stream Compression (Reduce the amount of bits to represent pixel 96 count while at the same pixel clock) [all …]
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/linux-6.8/Documentation/devicetree/bindings/display/ |
D | cirrus,clps711x-fb.txt | 4 - compatible: Shall contain "cirrus,ep7209-fb". 5 - reg : Physical base address and length of the controller's registers + 7 - clocks : phandle + clock specifier pair of the FB reference clock. 8 - display : phandle to a display node as described in 9 Documentation/devicetree/bindings/display/panel/display-timing.txt. 11 - bits-per-pixel: Bits per pixel. 12 - ac-prescale : LCD AC bias frequency. This frequency is the required 14 - cmap-invert : Invert the color levels (Optional). 17 - lcd-supply: Regulator for LCD supply voltage. 21 compatible = "cirrus,ep7312-fb", "cirrus,ep7209-fb"; [all …]
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D | wm,wm8505-fb.txt | 2 ----------------------------------------------------- 5 - compatible : "wm,wm8505-fb" 6 - reg : Should contain 1 register ranges(address and length) 7 - bits-per-pixel : bit depth of framebuffer (16 or 32) 10 - display-timings: see display-timing.txt for information 15 compatible = "wm,wm8505-fb"; 17 bits-per-pixel = <16>; 19 display-timings { 20 native-mode = <&timing0>; 22 clock-frequency = <0>; /* unused but required */ [all …]
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D | via,vt8500-fb.txt | 2 ----------------------------------------------------- 5 - compatible : "via,vt8500-fb" 6 - reg : Should contain 1 register ranges(address and length) 7 - interrupts : framebuffer controller interrupt 8 - bits-per-pixel : bit depth of framebuffer (16 or 32) 11 - display-timings: see display-timing.txt for information 16 compatible = "via,vt8500-fb"; 19 bits-per-pixel = <16>; 21 display-timings { 22 native-mode = <&timing0>; [all …]
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D | atmel,lcdc.txt | 2 ----------------------------------------------------- 5 - compatible : 6 "atmel,at91sam9261-lcdc" , 7 "atmel,at91sam9263-lcdc" , 8 "atmel,at91sam9g10-lcdc" , 9 "atmel,at91sam9g45-lcdc" , 10 "atmel,at91sam9g45es-lcdc" , 11 "atmel,at91sam9rl-lcdc" , 12 - reg : Should contain 1 register ranges(address and length). 15 - interrupts : framebuffer controller interrupt [all …]
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/linux-6.8/drivers/media/platform/ti/omap3isp/ |
D | ispvideo.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * TI OMAP3 ISP - Generic video node 7 * Copyright (C) 2009-2010 Nokia Corporation 16 #include <linux/v4l2-mediabus.h> 17 #include <media/media-entity.h> 18 #include <media/v4l2-dev.h> 19 #include <media/v4l2-fh.h> 20 #include <media/videobuf2-v4l2.h> 31 * struct isp_format_info - ISP media bus format information 34 * bits. Identical to @code if the format is 10 bits wide or less. [all …]
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/linux-6.8/include/drm/display/ |
D | drm_dsc.h | 1 /* SPDX-License-Identifier: MIT 48 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters 64 * Bits/group offset to apply to target for this group 70 * struct drm_dsc_config - Parameters required to configure DSC 78 * Bits per component for previous reconstructed line buffer 82 * @bits_per_component: Bits per component to code (8/10/12) 87 * Flag to indicate if RGB - YCoCg conversion is needed 92 * @slice_count: Number fo slices per line used by the DSC encoder 117 * Offset to bits/group used by RC to determine QP adjustment 122 * Offset to bits/group used by RC to determine QP adjustment [all …]
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/linux-6.8/drivers/media/i2c/ |
D | ccs-pll.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * drivers/media/i2c/ccs-pll.h 15 #include <linux/bits.h> 17 /* CSI-2 or CCP-2 */ 37 * struct ccs_pll_branch_fr - CCS PLL configuration (front) 39 * A single branch front-end of the CCS PLL tree. 41 * @pre_pll_clk_div: Pre-PLL clock divisor 54 * struct ccs_pll_branch_bk - CCS PLL configuration (back) 56 * A single branch back-end of the CCS PLL tree. 59 * @pix_clk_div: Pixel clock divider [all …]
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/linux-6.8/drivers/staging/media/omap4iss/ |
D | iss_video.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * TI OMAP4 ISS V4L2 Driver - Generic video node 13 #include <linux/v4l2-mediabus.h> 14 #include <media/media-entity.h> 15 #include <media/v4l2-dev.h> 16 #include <media/v4l2-fh.h> 17 #include <media/videobuf2-v4l2.h> 18 #include <media/videobuf2-dma-contig.h> 28 * struct iss_format_info - ISS media bus format information 31 * bits. Identical to @code if the format is 10 bits wide or less. [all …]
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/linux-6.8/include/uapi/drm/ |
D | drm_fourcc.h | 36 * In the DRM subsystem, framebuffer pixel formats are described using the 39 * further describe the buffer's format - for example tiling or compression. 42 * ---------------- 56 * vendor-namespaced, and as such the relationship between a fourcc code and a 58 * may preserve meaning - such as number of planes - from the fourcc code, 64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel 76 * - Kernel and user-space drivers: for drivers it's important that modifiers 80 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users 93 * ----------------------- 95 * Because this is the authoritative source for pixel formats and modifiers [all …]
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/linux-6.8/Documentation/devicetree/bindings/display/bridge/ |
D | fsl,imx8qxp-pixel-link.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8qm/qxp Display Pixel Link 10 - Liu Ying <victor.liu@nxp.com> 13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard 14 asynchronous linkage between pixel sources(display controller or 15 camera module) and pixel consumers(imaging or displays). 16 It consists of two distinct functions, a pixel transfer function and a [all …]
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/linux-6.8/Documentation/userspace-api/ |
D | dma-buf-alloc-exchange.rst | 1 .. SPDX-License-Identifier: GPL-2.0 2 .. Copyright 2021-2023 Collabora Ltd. 5 Exchanging pixel buffers 9 support for sharing pixel-buffer allocations between processes, devices, and 12 approach this sharing for two-dimensional image data. 25 Conceptually a two-dimensional array of pixels. The pixels may be stored 26 in one or more memory buffers. Has width and height in pixels, pixel 30 A span along a single y-axis value, e.g. from co-ordinates (0,100) to 37 A span along a single x-axis value, e.g. from co-ordinates (100,0) to 41 A piece of memory for storing (parts of) pixel data. Has stride and size [all …]
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/linux-6.8/drivers/staging/media/atomisp/pci/camera/pipe/interface/ |
D | ia_css_pipe_util.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 22 /* @brief Get Input format bits per pixel based on stream configuration of this 26 * @return bits per pixel for the underlying stream
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/linux-6.8/drivers/video/fbdev/ |
D | pxa3xx-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 * LCD Controller Registers and Bits Definitions 72 #define LCCR0_DPD (1 << 9) /* Double Pixel Data (monochrome) */ 73 #define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome display */ 74 #define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome display */ 90 #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ 91 #define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) argument 94 #define LCCR1_HorSnchWdth(Tpix) (((Tpix) - 1) << FShft (LCCR1_HSW)) 96 #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait - 1 */ 97 #define LCCR1_EndLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_ELW)) [all …]
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/linux-6.8/include/uapi/linux/ |
D | media-bus-format.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 17 * is reserved, MEDIA_BUS_FMT_FIXED shall be used by host-client pairs, where 18 * the data format is fixed. Additionally, "2X8" means that one pixel is 19 * transferred in two 8-bit samples, "BE" or "LE" specify in which order those 21 * bits are transferred first, "BE" means that the most significant bits are 22 * transferred first, and "PADHI" and "PADLO" define which bits - low or high, 23 * in the incomplete high byte, are filled with padding bits. 25 * The bus formats are grouped by type, bus_width, bits per component, samples 26 * per pixel and order of subsamples. Numerical values are sorted using generic 32 * new pixel codes. [all …]
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/linux-6.8/drivers/staging/media/atomisp/pci/ |
D | ia_css_input_port.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 46 /** Compressed bits per pixel (only when compression is enabled) */ 48 /** Uncompressed bits per pixel (only when compression is enabled) */ 54 enum mipi_port_id port; /** Physical CSI-2 port */ 55 unsigned int num_lanes; /** Number of lanes used (4-lane port only) */
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/linux-6.8/drivers/gpu/drm/i915/gvt/ |
D | fb_decoder.h | 2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 108 u32 tiled; /* tiling mode: linear, X-tiled, Y tiled, etc */ 109 u8 bpp; /* bits per pixel */ 123 u8 tiled; /* X-tiled */ 124 u8 bpp; /* bits per pixel */ 141 u8 bpp; /* bits per pixel */
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/linux-6.8/drivers/gpu/drm/tilcdc/ |
D | tilcdc_drv.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 29 /* Defaulting to pixel clock defined on AM335x */ 54 * Pixel Clock will be restricted to some value as 59 * Max allowable width is limited on a per device basis 64 /* Supported pixel formats */ 90 /* Sub-module for display. Since we don't know at compile time what panels 126 /* AC Bias Pin Transitions per Interrupt */ 132 /* Bits per pixel */ 141 /* Invert pixel clock */ 150 /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
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/linux-6.8/drivers/media/platform/nxp/imx-jpeg/ |
D | mxc-jpeg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Copyright 2018-2019 NXP 8 #include <media/v4l2-ctrls.h> 9 #include <media/v4l2-device.h> 10 #include <media/v4l2-fh.h> 15 #define MXC_JPEG_NAME "mxc-jpeg" 42 * struct mxc_jpeg_fmt - driver's internal color format data 47 * @depth: number of bits per pixel 54 * @is_rgb: is an RGB pixel format 140 * struct mxc_jpeg_sof_comp - JPEG Start Of Frame component fields [all …]
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