| /linux/Documentation/hwmon/ |
| H A D | lm90.rst | 12 Datasheet: Publicly available at the TI website 22 Datasheet: Publicly available at the TI website 32 Datasheet: Publicly available at the TI website 42 Datasheet: Publicly available at the TI website 52 Datasheet: Publicly available at the TI website 62 Datasheet: Publicly available at the DigiKey website 72 Datasheet: Publicly available at the DigiKey website 82 Datasheet: Publicly available at the Analog Devices website 93 Datasheet: Publicly available at the DigiKey website 103 Datasheet: Publicly available at the ON Semiconductor website [all …]
|
| H A D | isl68137.rst | 14 Publicly available at the Renesas website 25 Publicly available (after August 2020 launch) at the Renesas website 35 Publicly available (after August 2020 launch) at the Renesas website 45 Publicly available (after August 2020 launch) at the Renesas website 55 Publicly available (after August 2020 launch) at the Renesas website 65 Publicly available (after August 2020 launch) at the Renesas website 75 Publicly available (after August 2020 launch) at the Renesas website 85 Publicly available (after August 2020 launch) at the Renesas website 95 Publicly available (after August 2020 launch) at the Renesas website 105 Publicly available (after August 2020 launch) at the Renesas website [all …]
|
| H A D | it87.rst | 12 Datasheet: Not publicly available 26 Datasheet: Not publicly available 34 Datasheet: Once publicly available at the ITE website, but no longer 42 Datasheet: Once publicly available at the ITE website, but no longer 50 Datasheet: Once publicly available at the ITE website, but no longer 58 Datasheet: Once publicly available at the ITE website, but no longer 66 Datasheet: Not publicly available 74 Datasheet: Not publicly available 82 Datasheet: Not publicly available 90 Datasheet: Not publicly available [all …]
|
| H A D | f71882fg.rst | 28 Datasheet: Available from the Fintek website 36 Datasheet: Available from the Fintek website 44 Datasheet: Available from the Fintek website 60 Datasheet: Available from the Fintek website 68 Datasheet: Available from the Fintek website 76 Datasheet: Should become available on the Fintek website soon 84 Datasheet: Should become available on the Fintek website soon 113 Datasheet: Available from the Fintek website 172 chips, and some modes may only be available in RPM / PWM mode. 178 available on the F71858FG / F8000 if the fan channel is in RPM mode. [all …]
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-intel_pmt-features | 11 attributes describing the available telemetry, monitoring, or 31 - Lists available capabilities for this feature. 120 telemetry Available: No 121 watcher Available: Yes 122 crashlog Available: No 123 streaming Available: No 124 threashold Available: No 125 window Available: No 126 config Available: Yes 127 tracing Available: No [all …]
|
| H A D | debugfs-hisi-hpre | 5 Only available for PF. 12 Only available for PF. 21 Only available for PF. 28 Only available for PF. 44 Only available for PF. 50 Available for PF and VF in host. VF in guest currently only 58 Only available for PF. 67 Only available for PF. 74 Available for both PF and VF, and take no other effect on HPRE. 80 Available for both PF and VF, and take no other effect on HPRE. [all …]
|
| H A D | debugfs-hisi-zip | 5 Only available for PF. 11 Only available for PF. 20 Only available for PF. 27 Only available for PF. 43 Available for PF and VF in host. VF in guest currently only 51 Only available for PF. 60 Only available for PF. 67 Available for both PF and VF, and take no other effect on ZIP. 73 Available for both PF and VF, and take no other effect on ZIP. 79 Available for both PF and VF, and take no other effect on ZIP. [all …]
|
| H A D | debugfs-hisi-sec | 7 Only available for PF, and take no other effect on SEC. 15 Only available for PF. 31 Available for PF and VF in host. VF in guest currently only 39 Only available for PF. 47 Only available for PF, and take no other effect on SEC. 54 Available for both PF and VF, and take no other effect on SEC. 60 Available for both PF and VF, and take no other effect on SEC. 66 Available for both PF and VF, and take no other effect on SEC. 72 Available for both PF and VF, and take no other effect on SEC. 78 Available for both PF and VF, and take no other effect on SEC. [all …]
|
| H A D | debugfs-driver-genwqe | 10 Only available for PF. 16 Only available for PF. 22 Only available for PF. 28 Only available for PF. 35 Only available for PF. 41 Only available for PF. 47 Only available for PF. 53 Only available for PF. 73 The timeout depends on the max number of available cards 79 Only available for PF. [all …]
|
| /linux/tools/perf/pmu-events/arch/x86/elkhartlake/ |
| H A D | memory.json | 16 …n": "Counts the number of misaligned load uops that are 4K page splits. Available PDIST counters: … 26 …": "Counts the number of misaligned store uops that are 4K page splits. Available PDIST counters: … 37 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 48 …iption": "Counts all code reads that were not supplied by the L3 cache. Available PDIST counters: … 59 …iption": "Counts all code reads that were not supplied by the L3 cache. Available PDIST counters: … 70 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 81 …acks from L1 cache and L2 cache that were not supplied by the L3 cache. Available PDIST counters: … 92 …acks from L1 cache and L2 cache that were not supplied by the L3 cache. Available PDIST counters: … 103 …fetches and L1 instruction cache prefetches that were supplied by DRAM. Available PDIST counters: … 114 …L1 instruction cache prefetches that were not supplied by the L3 cache. Available PDIST counters: … [all …]
|
| H A D | cache.json | 164 …"PublicDescription": "Counts the number of load uops retired that hit in DRAM. Available PDIST cou… 175 …s required and modified data was forwarded from another core or module. Available PDIST counters: … 186 … "Counts the number of load uops retired that hit in the L1 data cache. Available PDIST counters: … 197 …"Counts the number of load uops retired that miss in the L1 data cache. Available PDIST counters: … 208 …ion": "Counts the number of load uops retired that hit in the L2 cache. Available PDIST counters: … 219 …on": "Counts the number of load uops retired that miss in the L2 cache. Available PDIST counters: … 230 …ion": "Counts the number of load uops retired that hit in the L3 cache. Available PDIST counters: … 241 … a load AND a store will be counted as 1, not 2 (e.g. ADD [mem], CONST) Available PDIST counters: … 252 … "PublicDescription": "Counts the total number of load uops retired. Available PDIST counters: 0", 263 … "PublicDescription": "Counts the total number of store uops retired. Available PDIST counters: 0", [all …]
|
| /linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | memory.json | 16 …n": "Counts the number of misaligned load uops that are 4K page splits. Available PDIST counters: … 26 …": "Counts the number of misaligned store uops that are 4K page splits. Available PDIST counters: … 37 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 48 …iption": "Counts all code reads that were not supplied by the L3 cache. Available PDIST counters: … 59 …iption": "Counts all code reads that were not supplied by the L3 cache. Available PDIST counters: … 70 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 81 …acks from L1 cache and L2 cache that were not supplied by the L3 cache. Available PDIST counters: … 92 …acks from L1 cache and L2 cache that were not supplied by the L3 cache. Available PDIST counters: … 103 …fetches and L1 instruction cache prefetches that were supplied by DRAM. Available PDIST counters: … 114 …L1 instruction cache prefetches that were not supplied by the L3 cache. Available PDIST counters: … [all …]
|
| H A D | cache.json | 164 …"PublicDescription": "Counts the number of load uops retired that hit in DRAM. Available PDIST cou… 175 …s required and modified data was forwarded from another core or module. Available PDIST counters: … 186 … "Counts the number of load uops retired that hit in the L1 data cache. Available PDIST counters: … 197 …"Counts the number of load uops retired that miss in the L1 data cache. Available PDIST counters: … 208 …ion": "Counts the number of load uops retired that hit in the L2 cache. Available PDIST counters: … 219 …on": "Counts the number of load uops retired that miss in the L2 cache. Available PDIST counters: … 230 …ion": "Counts the number of load uops retired that hit in the L3 cache. Available PDIST counters: … 241 … a load AND a store will be counted as 1, not 2 (e.g. ADD [mem], CONST) Available PDIST counters: … 252 … "PublicDescription": "Counts the total number of load uops retired. Available PDIST counters: 0", 263 … "PublicDescription": "Counts the total number of store uops retired. Available PDIST counters: 0", [all …]
|
| /linux/Documentation/arch/powerpc/ |
| H A D | elf_hwcaps.rst | 13 Some hardware or software features are only available on some CPU 15 discovery mechanism available to userspace code. The kernel exposes the 50 whether this class is available to be used, but the specifics depend on the 51 ISA version. For example, if the VSX facility is available, the VSX 84 Vector (aka Altivec, VMX) facility is available. 87 Floating point facility is available. 102 Signal Processing Engine facility is available. 105 Embedded Floating Point single precision operations are available. 108 Embedded Floating Point double precision operations are available. 111 The timebase facility (mftb instruction) is not available. [all …]
|
| /linux/tools/testing/selftests/ |
| H A D | run_kselftest.sh | 7 # Fallback to readlink if realpath is not available 18 available="" 20 available="$(cat "$TESTS")" 35 -l | --list List the available collection:test entries 70 echo "$available" 96 found="$(echo "$available" | grep "^$collection:")" 104 # Replace available test list with explicitly selected tests. 108 found="$(echo "$available" | grep "^${test}$")" 115 available="$(echo "$valid" | sed -e 's/ /\n/g')" 117 # Remove tests to be skipped from available list [all …]
|
| /linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/ |
| H A D | commonring.c | 70 u16 available; in brcmf_commonring_write_available() local 75 available = commonring->depth - commonring->w_ptr + in brcmf_commonring_write_available() 78 available = commonring->r_ptr - commonring->w_ptr; in brcmf_commonring_write_available() 80 if (available > 1) { in brcmf_commonring_write_available() 83 if (available > commonring->depth / 8) { in brcmf_commonring_write_available() 111 u16 available; in brcmf_commonring_reserve_for_write() local 116 available = commonring->depth - commonring->w_ptr + in brcmf_commonring_reserve_for_write() 119 available = commonring->r_ptr - commonring->w_ptr; in brcmf_commonring_reserve_for_write() 121 if (available > 1) { in brcmf_commonring_reserve_for_write() 147 u16 available; in brcmf_commonring_reserve_for_write_multiple() local [all …]
|
| /linux/tools/include/uapi/linux/ |
| H A D | kvm.h | 328 /* Available with KVM_CAP_INTERNAL_ERROR_DATA: */ 715 * Check if a kvm extension is available. Argument is extension number, 1059 * Available with KVM_CAP_IRQFD_RESAMPLE 1108 /* Available with KVM_CAP_ONE_REG */ 1169 * Device control API, available with KVM_CAP_DEVICE_CTRL 1290 /* Available with KVM_CAP_PIT_STATE2 */ 1293 /* Available with KVM_CAP_PPC_GET_PVINFO */ 1295 /* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with 1299 /* Available with KVM_CAP_SIGNAL_MSI */ 1301 /* Available with KVM_CAP_PPC_GET_SMMU_INFO */ [all …]
|
| /linux/include/uapi/linux/ |
| H A D | kvm.h | 329 /* Available with KVM_CAP_INTERNAL_ERROR_DATA: */ 716 * Check if a kvm extension is available. Argument is extension number, 1060 * Available with KVM_CAP_IRQFD_RESAMPLE 1109 /* Available with KVM_CAP_ONE_REG */ 1170 * Device control API, available with KVM_CAP_DEVICE_CTRL 1291 /* Available with KVM_CAP_PIT_STATE2 */ 1294 /* Available with KVM_CAP_PPC_GET_PVINFO */ 1296 /* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with 1300 /* Available with KVM_CAP_SIGNAL_MSI */ 1302 /* Available with KVM_CAP_PPC_GET_SMMU_INFO */ [all …]
|
| /linux/arch/sparc/include/asm/ |
| H A D | elf_64.h | 77 #define AV_SPARC_V8PLUS 0x00000800 /* v9 insn available to 32bit */ 79 #define AV_SPARC_VIS 0x00002000 /* VIS insns available */ 80 #define AV_SPARC_VIS2 0x00004000 /* VIS2 insns available */ 81 #define AV_SPARC_ASI_BLK_INIT 0x00008000 /* block init ASIs available */ 83 #define AV_SPARC_VIS3 0x00020000 /* VIS3 insns available */ 84 #define AV_SPARC_HPC 0x00040000 /* HPC insns available */ 85 #define AV_SPARC_RANDOM 0x00080000 /* 'random' insn available */ 86 #define AV_SPARC_TRANS 0x00100000 /* transaction insns available */ 90 0x00800000 /* cache sparing ASIs available */ 91 #define AV_SPARC_PAUSE 0x01000000 /* PAUSE available */ [all …]
|
| /linux/drivers/pci/hotplug/ |
| H A D | cpqphp_nvram.c | 188 u32 available; in load_HRT() local 196 available = 1024; in load_HRT() 199 temp_dword = available; in load_HRT() 226 u32 available; in store_HRT() local 236 available = 1024; in store_HRT() 254 rc = add_byte(&pFill, 1 + ctrl->push_flag, &usedbytes, &available); in store_HRT() 259 rc = add_byte(&pFill, 1, &usedbytes, &available); in store_HRT() 269 rc = add_byte(&pFill, ctrl->bus, &usedbytes, &available); in store_HRT() 274 rc = add_byte(&pFill, PCI_SLOT(ctrl->pci_dev->devfn), &usedbytes, &available); in store_HRT() 279 rc = add_byte(&pFill, PCI_FUNC(ctrl->pci_dev->devfn), &usedbytes, &available); in store_HRT() [all …]
|
| /linux/tools/perf/pmu-events/arch/x86/clearwaterforest/ |
| H A D | cache.json | 25 "PublicDescription": "Counts the number of load ops retired. Available PDIST counters: 0,1", 34 … "PublicDescription": "Counts the number of store ops retired. Available PDIST counters: 0,1", 45 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … 56 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … 67 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … 78 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … 89 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … 100 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … 111 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … 122 …efined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: … [all …]
|
| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | cache.json | 323 …SW prefetch instructions of PREFETCHNTA or PREFETCHT0/1/2 or PREFETCHW. Available PDIST counters: … 333 "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0", 343 …"PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST c… 353 …"PublicDescription": "Counts retired load instructions with locked access. Available PDIST counter… 366 …ounts retired load instructions that split across a cacheline boundary. Available PDIST counters: … 379 …unts retired store instructions that split across a cacheline boundary. Available PDIST counters: … 392 …retired load instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: … 405 …ber of retired store instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: … 418 …ired load instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: … 428 …red store instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: … [all …]
|
| /linux/fs/ubifs/ |
| H A D | budget.c | 109 * as not available); 178 * The index head is not available for the in-the-gaps method, so add an in ubifs_calc_min_idx_lebs() 188 * ubifs_calc_available - calculate available FS space. 192 * This function calculates and returns amount of FS space available for use. 197 long long available; in ubifs_calc_available() local 199 available = c->main_bytes - c->lst.total_used; in ubifs_calc_available() 202 * Now 'available' contains theoretically available flash space in ubifs_calc_available() 220 available -= (long long)subtract_lebs * c->leb_size; in ubifs_calc_available() 222 /* Subtract the dead space which is not available for use */ in ubifs_calc_available() 223 available -= c->lst.total_dead; in ubifs_calc_available() [all …]
|
| /linux/tools/perf/pmu-events/arch/x86/pantherlake/ |
| H A D | cache.json | 401 …ts Instructions with at least one architecturally visible load retired. Available PDIST counters: … 412 "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0,1", 422 …"PublicDescription": "Counts all retired software prefetch instructions. Available PDIST counters:… 433 …"PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST c… 444 …"PublicDescription": "Counts retired load instructions with locked access. Available PDIST counter… 455 …ounts retired load instructions that split across a cacheline boundary. Available PDIST counters: … 466 …unts retired store instructions that split across a cacheline boundary. Available PDIST counters: … 477 …r of retired instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: … 488 …retired load instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: … 499 …ber of retired store instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: … [all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | cache.json | 377 …SW prefetch instructions of PREFETCHNTA or PREFETCHT0/1/2 or PREFETCHW. Available PDIST counters: … 387 "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0", 397 …"PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST c… 407 …"PublicDescription": "Counts retired load instructions with locked access. Available PDIST counter… 417 …ounts retired load instructions that split across a cacheline boundary. Available PDIST counters: … 427 …unts retired store instructions that split across a cacheline boundary. Available PDIST counters: … 437 …ired load instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: … 447 …red store instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: … 466 …oad instructions whose data sources were HitM responses from shared L3. Available PDIST counters: … 476 …a sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: … [all …]
|