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/linux/Documentation/driver-api/nvdimm/
H A Dnvdimm.rst2 LIBNVDIMM: Non-Volatile Devices
5 libnvdimm - kernel / libndctl - userspace helper library
17 LIBNVDIMM PMEM
18 PMEM-REGIONs, Atomic Sectors, and DAX
49 PMEM:
50 A system-physical-address range where writes are persistent. A
51 block device composed of PMEM is capable of DAX. A PMEM address range
55 DIMM Physical Address, is a DIMM-relative offset. With one DIMM in
56 the system there would be a 1:1 system-physical-address:DPA association.
59 system-physical-address.
[all …]
/linux/drivers/nvdimm/
H A Dnd_virtio.c1 // SPDX-License-Identifier: GPL-2.0
3 * virtio_pmem.c: Virtio pmem Driver
15 struct virtio_pmem *vpmem = vq->vdev->priv; in virtio_pmem_host_ack()
20 spin_lock_irqsave(&vpmem->pmem_lock, flags); in virtio_pmem_host_ack()
22 req_data->done = true; in virtio_pmem_host_ack()
23 wake_up(&req_data->host_acked); in virtio_pmem_host_ack()
25 if (!list_empty(&vpmem->req_list)) { in virtio_pmem_host_ack()
26 req_buf = list_first_entry(&vpmem->req_list, in virtio_pmem_host_ack()
28 req_buf->wq_buf_avail = true; in virtio_pmem_host_ack()
29 wake_up(&req_buf->wq_buf); in virtio_pmem_host_ack()
[all …]
H A Dnamespace_devs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
12 #include "nd-core.h"
13 #include "pmem.h"
27 struct nd_region *nd_region = to_nd_region(dev->parent); in namespace_pmem_release()
29 if (nspm->id >= 0) in namespace_pmem_release()
30 ida_free(&nd_region->ns_ida, nspm->id); in namespace_pmem_release()
31 kfree(nspm->alt_name); in namespace_pmem_release()
32 kfree(nspm->uuid); in namespace_pmem_release()
46 uuid2 = nspm->uuid; in is_uuid_busy()
[all …]
H A Dbadrange.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include "nd-core.h"
21 INIT_LIST_HEAD(&badrange->list); in badrange_init()
22 spin_lock_init(&badrange->lock); in badrange_init()
29 lockdep_assert_held(&badrange->lock); in append_badrange_entry()
30 bre->start = addr; in append_badrange_entry()
31 bre->length = length; in append_badrange_entry()
32 list_add_tail(&bre->list, &badrange->list); in append_badrange_entry()
42 return -ENOMEM; in alloc_and_append_badrange_entry()
52 spin_unlock(&badrange->lock); in add_badrange()
[all …]
/linux/drivers/cxl/core/
H A Dpmem.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * DOC: cxl pmem
13 * The core CXL PMEM infrastructure supports persistent memory
17 * CXL window. That root-level bridge corresponds to a LIBNVDIMM 'bus'
30 ida_free(&cxl_nvdimm_bridge_ida, cxl_nvb->id); in cxl_nvdimm_bridge_release()
47 if (dev_WARN_ONCE(dev, dev->type != &cxl_nvdimm_bridge_type, in to_cxl_nvdimm_bridge()
55 * cxl_find_nvdimm_bridge() - find a bridge device relative to a port
56 * @port: any descendant port of an nvdimm-bridge associated
57 * root-cxl-port
67 dev = device_find_child(&cxl_root->port.dev, in cxl_find_nvdimm_bridge()
[all …]
H A Dhdm.c1 // SPDX-License-Identifier: GPL-2.0-only
31 put_device(&cxld->dev); in add_hdm_decoder()
32 dev_err(&port->dev, "Failed to add decoder\n"); in add_hdm_decoder()
36 rc = cxl_decoder_autoremove(&port->dev, cxld); in add_hdm_decoder()
40 dev_dbg(port->uport_dev, "%s added to %s\n", in add_hdm_decoder()
41 dev_name(&cxld->dev), dev_name(&port->dev)); in add_hdm_decoder()
48 * single ported host-bridges need not publish a decoder capability when a
59 struct cxl_hdm *cxlhdm = dev_get_drvdata(&port->dev); in devm_cxl_add_passthrough_decoder()
65 cxlhdm->interleave_mask = ~0U; in devm_cxl_add_passthrough_decoder()
66 cxlhdm->iw_cap_mask = ~0UL; in devm_cxl_add_passthrough_decoder()
[all …]
H A Dregion.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/memory-tiers.h>
50 if (cxlr->coord[level].attrib == 0) \
51 return -ENOENT; \
53 return sysfs_emit(buf, "%u\n", cxlr->coord[level].attrib); \
94 cxlr->coord[level].read_latency == 0) \
98 cxlr->coord[level].write_latency == 0) \
102 cxlr->coord[level].read_bandwidth == 0) \
106 cxlr->coord[level].write_bandwidth == 0) \
109 return a->mode; \
[all …]
/linux/drivers/firmware/
H A Dstratix10-svc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017-2018, Intel Corporation
19 #include <linux/firmware/intel/stratix10-smc.h>
20 #include <linux/firmware/intel/stratix10-svc-client.h>
24 * SVC_NUM_DATA_IN_FIFO - number of struct stratix10_svc_data in the FIFO
26 * SVC_NUM_CHANNEL - number of channel supported by service layer driver
28 * FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS - claim back the submitted buffer(s)
30 * when all bit-stream data had be send.
32 * FPGA_CONFIG_STATUS_TIMEOUT_SEC - poll the FPGA configuration status,
43 #define STRATIX10_RSU "stratix10-rsu"
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/linux/arch/powerpc/include/asm/
H A Dmmu_context.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 struct mm_iommu_table_group_mem_t **pmem);
30 struct mm_iommu_table_group_mem_t **pmem);
83 VM_WARN_ON(mm->context.extended_id[index]); in alloc_extended_context()
84 mm->context.extended_id[index] = context_id; in alloc_extended_context()
92 context_id = get_user_context(&mm->context, ea); in need_extra_context()
110 return -ENOMEM; in alloc_extended_context()
122 atomic_inc(&mm->context.active_cpus); in inc_mm_active_cpus()
127 VM_WARN_ON_ONCE(atomic_read(&mm->context.active_cpus) <= 0); in dec_mm_active_cpus()
128 atomic_dec(&mm->context.active_cpus); in dec_mm_active_cpus()
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/linux/drivers/dax/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 tristate "PMEM DAX: direct access to persistent memory"
26 libnvdimm sub-system.
40 device-dax instances for these memory ranges, and that also
42 driver to override the reservation and add them to kernel
52 CXL RAM regions are either mapped by platform-firmware
53 and published in the initial system-memory map as "System RAM", mapped
54 by platform-firmware as "Soft Reserved", or dynamically provisioned
55 after boot by the CXL driver. In the latter two cases a device-dax
56 instance is created to access that unmapped-by-default address range.
[all …]
/linux/Documentation/filesystems/
H A Ddax.rst6 ----------
12 For block devices that are memory-like, the page cache pages would be
19 -----
30 ------------------------------
32 When mounting the filesystem, use the ``-o dax`` option on the command line or
33 add 'dax' to the options in ``/etc/fstab``. This works to enable `DAX` on all files
34 within the filesystem. It is equivalent to the ``-o dax=always`` behavior below.
38 ----------------------------
41 -------
43 1. There exists an in-kernel file access mode flag `S_DAX` that corresponds to
[all …]
/linux/tools/perf/util/
H A Dmem-events.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "mem-events.h"
14 #include "mem-info.h"
26 E("ldlat-loads", "%s/mem-loads,ldlat=%u/P", "mem-loads", true, 0),
27 E("ldlat-stores", "%s/mem-stores/P", "mem-stores", false, 0),
39 return &pmu->mem_events[i]; in perf_pmu__mem_events_ptr()
45 if (pmu->mem_events) in perf_pmus__scan_mem()
54 * The current perf mem doesn't support per-PMU configuration. in perf_mem_events_find_pmu()
68 * perf_pmu__mem_events_num_mem_pmus - Get the number of mem PMUs since the given pmu
89 e = &pmu->mem_events[i]; in perf_pmu__mem_events_name()
[all …]
/linux/drivers/pci/
H A Dprobe.c1 // SPDX-License-Identifier: GPL-2.0
53 if (r->domain_nr == domain_nr) in get_pci_domain_busn_res()
54 return &r->res; in get_pci_domain_busn_res()
60 r->domain_nr = domain_nr; in get_pci_domain_busn_res()
61 r->res.start = 0; in get_pci_domain_busn_res()
62 r->res.end = 0xff; in get_pci_domain_busn_res()
63 r->res.flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED; in get_pci_domain_busn_res()
65 list_add_tail(&r->list, &pci_domain_busn_res_list); in get_pci_domain_busn_res()
67 return &r->res; in get_pci_domain_busn_res()
94 put_device(pci_bus->bridge); in release_pcibus_dev()
[all …]
/linux/drivers/message/fusion/
H A Dmptctl.c7 * Copyright (c) 1999-2008 LSI Corporation
8 * (mailto:DL-MPTFusionLinux@lsi.com)
11 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
25 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
44 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
46 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
69 #define COPYRIGHT "Copyright (c) 1999-2008 LSI Corporation"
74 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
84 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
92 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
[all …]
/linux/mm/
H A Dmemory-tiers.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/memory-tiers.h>
56 * folio_use_access_time - check if a folio reuses cpupid for page access time
79 * Node 0 & 1 are CPU + DRAM nodes, node 2 & 3 are PMEM nodes.
88 * memory_tiers0 = 0-1
89 * memory_tiers1 = 2-3
98 * Node 0 & 1 are CPU + DRAM nodes, node 2 is memory-only DRAM node.
106 * memory_tiers0 = 0-2
114 * Node 0 is CPU + DRAM nodes, Node 1 is HBM node, node 2 is PMEM node.
153 list_for_each_entry(memtype, &memtier->memory_types, tier_sibling) in get_memtier_nodemask()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 # add proper SWAP support to them, in which case this can be remove.
33 compress them into a dynamically allocated RAM-based memory pool.
160 zsmalloc is a slab-based memory allocator designed to store
175 int "Maximum number of physical pages per-zspage"
252 specifically-sized allocations with user-controlled contents
256 user-controlled allocations. This may very slightly increase
258 of extra pages since the bulk of user-controlled allocations
259 are relatively long-lived.
274 Try running: slabinfo -DA
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/linux/arch/powerpc/perf/
H A Disa207-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "isa207-common.h"
11 PMU_FORMAT_ATTR(event, "config:0-49");
12 PMU_FORMAT_ATTR(pmcxsel, "config:0-7");
15 PMU_FORMAT_ATTR(unit, "config:12-15");
16 PMU_FORMAT_ATTR(pmc, "config:16-19");
17 PMU_FORMAT_ATTR(cache_sel, "config:20-23");
18 PMU_FORMAT_ATTR(sample_mode, "config:24-28");
19 PMU_FORMAT_ATTR(thresh_sel, "config:29-31");
20 PMU_FORMAT_ATTR(thresh_stop, "config:32-35");
[all …]
/linux/arch/x86/events/intel/
H A Dds.c1 // SPDX-License-Identifier: GPL-2.0
117 static void __init __intel_pmu_pebs_data_source_skl(bool pmem, u64 *data_source) in __intel_pmu_pebs_data_source_skl() argument
119 u64 pmem_or_l4 = pmem ? LEVEL(PMEM) : LEVEL(L4); in __intel_pmu_pebs_data_source_skl()
128 void __init intel_pmu_pebs_data_source_skl(bool pmem) in intel_pmu_pebs_data_source_skl() argument
130 __intel_pmu_pebs_data_source_skl(pmem, pebs_data_source); in intel_pmu_pebs_data_source_skl()
215 OP_LH | LEVEL(MSC) | P(SNOOP, NONE), /* 0x10: Memory-side Cache Hit */
275 if (event->hw.flags & PERF_X86_EVENT_PEBS_ST_HSW) in precise_datala_hsw()
277 else if (event->hw.flags & PERF_X86_EVENT_PEBS_LD_HSW) in precise_datala_hsw()
288 if (event->hw.flags & PERF_X86_EVENT_PEBS_ST_HSW) { in precise_datala_hsw()
314 /* Retrieve the latency data for e-core of ADL */
[all …]
/linux/include/uapi/linux/
H A Dperf_event.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
6 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
7 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
13 * For licencing details see kernel-base/COPYING
23 * User-space ABI bits:
37 PERF_TYPE_MAX, /* non-ABI */
78 PERF_COUNT_HW_MAX, /* non-ABI */
84 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
97 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
[all …]
/linux/tools/include/uapi/linux/
H A Dperf_event.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
6 * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
7 * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
13 * For licencing details see kernel-base/COPYING
23 * User-space ABI bits:
37 PERF_TYPE_MAX, /* non-ABI */
78 PERF_COUNT_HW_MAX, /* non-ABI */
84 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
97 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
[all …]
/linux/drivers/acpi/nfit/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
24 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
27 #include <linux/io-64-nonatomic-hi-lo.h>
42 static int default_dsm_family = -1;
53 MODULE_PARM_DESC(force_labels, "Opt-in to labels despite missing methods");
91 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; in to_acpi_dev()
97 if (!nd_desc->provider_name in to_acpi_dev()
98 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) in to_acpi_dev()
101 return to_acpi_device(acpi_desc->dev); in to_acpi_dev()
[all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Dspr-metrics.json4 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
11 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
18 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
234 …iss (read memory access) addressed to Intel(R) Optane(TM) Persistent Memory(PMEM) in nano seconds",
288 …MB/sec) caused by directory updates; includes DDR and Intel(R) Optane(TM) Persistent Memory(PMEM)",
312 …"BriefDescription": "Uops delivered from legacy decode pipeline (Micro-instruction Translation Eng…
324 … "BriefDescription": "Intel(R) Optane(TM) Persistent Memory(PMEM) memory read bandwidth (MB/sec)",
330 "BriefDescription": "Intel(R) Optane(TM) Persistent Memory(PMEM) memory bandwidth (MB/sec)",
336 … "BriefDescription": "Intel(R) Optane(TM) Persistent Memory(PMEM) memory write bandwidth (MB/sec)",
[all …]
H A Duncore-memory.json3 "BriefDescription": "Cycles - at UCLK",
228 "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
238 "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
248 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
258 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
348 "BriefDescription": "Multi-socket cacheline Directory update from A to I",
358 "BriefDescription": "Multi-socket cacheline Directory update from A to S",
368 "BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
377 "BriefDescription": "Multi-socket cacheline Directory Updates",
390 "BriefDescription": "Multi-socket cacheline Directory Updates",
[all …]
/linux/arch/powerpc/platforms/powernv/
H A Dopal.c1 // SPDX-License-Identifier: GPL-2.0-or-later
33 #include <asm/imc-pmu.h>
80 /* Do the actual re-init, This will clobber all FPRs, VRs, etc... in opal_configure_cores()
106 if (cur_cpu_spec->cpu_restore) in opal_configure_cores()
107 cur_cpu_spec->cpu_restore(); in opal_configure_cores()
119 basep = of_get_flat_dt_prop(node, "opal-base-address", &basesz); in early_init_dt_scan_opal()
120 entryp = of_get_flat_dt_prop(node, "opal-entry-address", &entrysz); in early_init_dt_scan_opal()
121 sizep = of_get_flat_dt_prop(node, "opal-runtime-size", &runtimesz); in early_init_dt_scan_opal()
137 if (of_flat_dt_is_compatible(node, "ibm,opal-v3")) { in early_init_dt_scan_opal()
156 prop = of_get_flat_dt_prop(node, "mcheck-recoverable-ranges", &psize); in early_init_dt_scan_recoverable_ranges()
[all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A Dicx-metrics.json4 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
11 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
18 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
204 …iss (read memory access) addressed to Intel(R) Optane(TM) Persistent Memory(PMEM) in nano seconds",
258 …MB/sec) caused by directory updates; includes DDR and Intel(R) Optane(TM) Persistent Memory(PMEM)",
282 …"BriefDescription": "Uops delivered from legacy decode pipeline (Micro-instruction Translation Eng…
294 … "BriefDescription": "Intel(R) Optane(TM) Persistent Memory(PMEM) memory read bandwidth (MB/sec)",
300 "BriefDescription": "Intel(R) Optane(TM) Persistent Memory(PMEM) memory bandwidth (MB/sec)",
306 … "BriefDescription": "Intel(R) Optane(TM) Persistent Memory(PMEM) memory write bandwidth (MB/sec)",
[all …]

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