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/linux/Documentation/driver-api/md/
H A Draid5-cache.rst7 caches data to the RAID disks. The cache can be in write-through (supported
8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
9 3.4) has a new option '--write-journal' to create array with cache. Please
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
25 This mode mainly fixes the 'write hol
[all...]
/linux/tools/testing/selftests/net/
H A Dproc_net_pktgen.c127 len = write(self->thr_fd, thr_cmd_add_loopback_0, sizeof(thr_cmd_add_loopback_0)); in FIXTURE_SETUP()
141 len = write(self->thr_fd, thr_cmd_rm_loopback_0, sizeof(thr_cmd_rm_loopback_0)); in FIXTURE_TEARDOWN()
155 len = write(self->ctrl_fd, wrong_ctrl_cmd, i); in TEST_F()
164 len = write(self->ctrl_fd, ctrl_cmd_stop, sizeof(ctrl_cmd_stop)); in TEST_F()
167 len = write(self->ctrl_fd, ctrl_cmd_stop, sizeof(ctrl_cmd_stop) - 1); in TEST_F()
170 len = write(self->ctrl_fd, ctrl_cmd_start, sizeof(ctrl_cmd_start)); in TEST_F()
173 len = write(self->ctrl_fd, ctrl_cmd_start, sizeof(ctrl_cmd_start) - 1); in TEST_F()
176 len = write(self->ctrl_fd, ctrl_cmd_reset, sizeof(ctrl_cmd_reset)); in TEST_F()
179 len = write(self->ctrl_fd, ctrl_cmd_reset, sizeof(ctrl_cmd_reset) - 1); in TEST_F()
187 len = write(sel in TEST_F()
[all...]
/linux/include/dt-bindings/memory/
H A Dtegra234-mc.h182 /* MSS internal memqual MIU7 write clients */
186 /* MSS internal memqual MIU8 write clients */
190 /* MSS internal memqual MIU9 write clients */
194 /* MSS internal memqual MIU10 write clients */
198 /* MSS internal memqual MIU11 write clients */
202 /* MSS internal memqual MIU12 write clients */
206 /* MSS internal memqual MIU13 write clients */
230 /* PCIE6 write clients */
243 /* PCIE7 write clients */
247 /* High-definition audio (HDA) write client
[all...]
H A Dtegra194-mc.h149 /* MSS internal memqual MIU7 write clients */
161 /* High-definition audio (HDA) write clients */
165 /* SATA write clients */
171 /* ISP Write client for Crossbar A */
173 /* ISP Write client Crossbar B */
177 /* XUSB_HOST write clients */
181 /* XUSB_DEV write clients */
189 /* sdmmca memory write client */
191 /* sdmmc memory write client */
193 /* sdmmcd memory write clien
[all...]
H A Dnvidia,tegra264.h65 /* VIC Write client */
67 /* VI R5 Write client */
73 /* Audio processor(APE) Write client */
77 /* Audio DMA Write client */
83 /* VI Falcon Write client */
87 /* Write client of RCE */
89 /* PCIE0/MSI Write clients */
93 /* PCIE1/RPX4 Write clients */
97 /* PCIE2/DMX4 Write clients */
101 /* PCIE3/RPX4 Write client
[all...]
/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json7 "PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line."
97 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache",
98 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache."
104 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Intervention",
105 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache with intervention."
111 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Chip HP Hit",
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using chip level horizontal persistence, Chip-HP hit."
118 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Drawer HP Hit",
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using drawer level horizontal persistence, Drawer-HP hit."
125 "BriefDescription": "Directory Write Leve
[all...]
/linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/
H A Dmetrics.json11 "BriefDescription": "bytes of all masters write to ddr",
13 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@",
27 "BriefDescription": "bytes of a53 core write to ddr",
29 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@",
43 "BriefDescription": "bytes of supermix(m7) write to ddr",
45 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x000f\\,axi_id\\=0x0020@",
59 "BriefDescription": "bytes of gpu 3d write to ddr",
61 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0070@",
75 "BriefDescription": "bytes of gpu 2d write to ddr",
77 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mas
[all...]
/linux/kernel/
H A Dsysctl.c42 * enum sysctl_writes_mode - supported sysctl write modes
44 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value
52 * sent to the write syscall. If dealing with strings respect the file
57 * These write modes control how current file position affects the behavior of
58 * updating sysctl values through the proc interface on each write.
76 static int _proc_do_string(char *data, int maxlen, int write, in _proc_do_string() argument
87 if (write) { in _proc_do_string()
175 * @write: %TRUE if this is a write to the sysctl file
189 int proc_dostring(const struct ctl_table *table, int write, in proc_dostring() argument
359 do_proc_dointvec_conv(bool * negp,unsigned long * lvalp,int * valp,int write,void * data) do_proc_dointvec_conv() argument
386 do_proc_douintvec_conv(unsigned long * lvalp,unsigned int * valp,int write,void * data) do_proc_douintvec_conv() argument
402 __do_proc_dointvec(void * tbl_data,const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos,int (* conv)(bool * negp,unsigned long * lvalp,int * valp,int write,void * data),void * data) __do_proc_dointvec() argument
474 do_proc_dointvec(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos,int (* conv)(bool * negp,unsigned long * lvalp,int * valp,int write,void * data),void * data) do_proc_dointvec() argument
490 do_proc_douintvec_w(unsigned int * tbl_data,const struct ctl_table * table,void * buffer,size_t * lenp,loff_t * ppos,int (* conv)(unsigned long * lvalp,unsigned int * valp,int write,void * data),void * data) do_proc_douintvec_w() argument
545 do_proc_douintvec_r(unsigned int * tbl_data,void * buffer,size_t * lenp,loff_t * ppos,int (* conv)(unsigned long * lvalp,unsigned int * valp,int write,void * data),void * data) do_proc_douintvec_r() argument
573 __do_proc_douintvec(void * tbl_data,const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos,int (* conv)(unsigned long * lvalp,unsigned int * valp,int write,void * data),void * data) __do_proc_douintvec() argument
608 do_proc_douintvec(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos,int (* conv)(unsigned long * lvalp,unsigned int * valp,int write,void * data),void * data) do_proc_douintvec() argument
635 proc_dobool(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dobool() argument
672 proc_dointvec(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec() argument
691 proc_douintvec(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_douintvec() argument
714 do_proc_dointvec_minmax_conv(bool * negp,unsigned long * lvalp,int * valp,int write,void * data) do_proc_dointvec_minmax_conv() argument
754 proc_dointvec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_minmax() argument
781 do_proc_douintvec_minmax_conv(unsigned long * lvalp,unsigned int * valp,int write,void * data) do_proc_douintvec_minmax_conv() argument
823 proc_douintvec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_douintvec_minmax() argument
851 proc_dou8vec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dou8vec_minmax() argument
888 __do_proc_doulongvec_minmax(void * data,const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos,unsigned long convmul,unsigned long convdiv) __do_proc_doulongvec_minmax() argument
961 do_proc_doulongvec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos,unsigned long convmul,unsigned long convdiv) do_proc_doulongvec_minmax() argument
985 proc_doulongvec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_doulongvec_minmax() argument
1008 proc_doulongvec_ms_jiffies_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_doulongvec_ms_jiffies_minmax() argument
1018 do_proc_dointvec_jiffies_conv(bool * negp,unsigned long * lvalp,int * valp,int write,void * data) do_proc_dointvec_jiffies_conv() argument
1044 do_proc_dointvec_userhz_jiffies_conv(bool * negp,unsigned long * lvalp,int * valp,int write,void * data) do_proc_dointvec_userhz_jiffies_conv() argument
1067 do_proc_dointvec_ms_jiffies_conv(bool * negp,unsigned long * lvalp,int * valp,int write,void * data) do_proc_dointvec_ms_jiffies_conv() argument
1091 do_proc_dointvec_ms_jiffies_minmax_conv(bool * negp,unsigned long * lvalp,int * valp,int write,void * data) do_proc_dointvec_ms_jiffies_minmax_conv() argument
1129 proc_dointvec_jiffies(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_jiffies() argument
1136 proc_dointvec_ms_jiffies_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_ms_jiffies_minmax() argument
1162 proc_dointvec_userhz_jiffies(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_userhz_jiffies() argument
1184 proc_dointvec_ms_jiffies(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_ms_jiffies() argument
1208 proc_do_large_bitmap(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_do_large_bitmap() argument
1340 proc_dostring(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dostring() argument
1346 proc_dobool(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dobool() argument
1352 proc_dointvec(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec() argument
1358 proc_douintvec(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_douintvec() argument
1364 proc_dointvec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_minmax() argument
1370 proc_douintvec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_douintvec_minmax() argument
1376 proc_dou8vec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dou8vec_minmax() argument
1382 proc_dointvec_jiffies(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_jiffies() argument
1388 proc_dointvec_ms_jiffies_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_ms_jiffies_minmax() argument
1394 proc_dointvec_userhz_jiffies(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_userhz_jiffies() argument
1400 proc_dointvec_ms_jiffies(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_dointvec_ms_jiffies() argument
1406 proc_doulongvec_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_doulongvec_minmax() argument
1412 proc_doulongvec_ms_jiffies_minmax(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_doulongvec_ms_jiffies_minmax() argument
1418 proc_do_large_bitmap(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_do_large_bitmap() argument
1427 proc_do_static_key(const struct ctl_table * table,int write,void * buffer,size_t * lenp,loff_t * ppos) proc_do_static_key() argument
[all...]
/linux/drivers/gpu/drm/ci/xfails/
H A Dmsm-sm8350-hdk-skips.txt24 # [ 200.895243] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=PERMISSION source=CP (0,0,0,1)
25 # [ 200.906885] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
26 # [ 200.917625] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
27 # [ 200.928353] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
28 # [ 200.939084] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
29 # [ 200.949815] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
31 # [ 200.960467] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
32 # [ 200.960500] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
33 # [ 200.995966] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE type=UNKNOWN source=CP (0,0,0,1)
34 # [ 201.006702] *** gpu fault: ttbr0=00000001160d6000 iova=0001000000001000 dir=WRITE typ
[all...]
/linux/tools/perf/pmu-events/arch/s390/cf_z17/
H A Dextended.json7 "PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line."
97 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache",
98 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache."
104 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Intervention",
105 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache with intervention."
111 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Chip HP Hit",
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using chip level horizontal persistence, Chip-HP hit."
118 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Drawer HP Hit",
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the requestors Level-2 cache after using drawer level horizontal persistence, Drawer-HP hit."
125 "BriefDescription": "Directory Write Leve
[all...]
/linux/tools/perf/pmu-events/arch/arm64/
H A Drecommended.json9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
24 "BriefDescription": "L1D cache refill, write"
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
42 "BriefDescription": "L1D cache Write-Back, victim"
45 "PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency",
48 "BriefDescription": "L1D cache Write-Back, cleaning and coherency"
63 "PublicDescription": "Attributable Level 1 data TLB refill, write",
66 "BriefDescription": "L1D tlb refill, write"
[all...]
/linux/tools/testing/selftests/kvm/x86/
H A Dhyperv_features.c27 bool write; member
49 if (msr->write) in guest_msr()
52 if (!vector && (!msr->write || !is_write_only_msr(msr->idx))) in guest_msr()
58 msr->write ? "WR" : "RD", msr->idx, vector); in guest_msr()
62 msr->write ? "WR" : "RD", msr->idx, vector); in guest_msr()
67 if (msr->write) in guest_msr()
169 msr->write = false; in guest_test_msrs_access()
174 msr->write = false; in guest_test_msrs_access()
184 msr->write = true; in guest_test_msrs_access()
190 msr->write in guest_test_msrs_access()
[all...]
/linux/include/trace/events/
H A Dmmap_lock.h16 TP_PROTO(struct mm_struct *mm, bool write),
18 TP_ARGS(mm, write),
23 __field(bool, write)
29 __entry->write = write;
33 "mm=%p memcg_id=%llu write=%s",
35 __entry->write ? "true" : "false"
41 TP_PROTO(struct mm_struct *mm, bool write), \
42 TP_ARGS(mm, write))
49 TP_PROTO(struct mm_struct *mm, bool write, boo
[all...]
/linux/Documentation/ABI/testing/
H A Dsysfs-class-bdi32 (read-write)
38 total write-back cache that relates to its current average
42 percentage of the write-back cache to a particular device.
45 (read-write)
52 total write-back cache that relates to its current average
56 of the write-back cache to a particular device. The value is
60 (read-write)
67 given percentage of the write-back cache. This is useful in
69 most of the write-back cache. For example in case of an NFS
73 (read-write)
[all...]
/linux/drivers/net/ethernet/aquantia/atlantic/macsec/
H A Dmacsec_api.h57 /*! Pack the fields of rec, and write the packed data into the
59 * rec - [IN] The bitfield values to write to the table row.
60 * table_index - The table row to write(max 23).
75 /*! Pack the fields of rec, and write the packed data into the
77 * rec - [IN] The bitfield values to write to the table row.
78 * table_index - The table row to write (max 47).
93 /*! Pack the fields of rec, and write the packed data into the
95 * rec - [IN] The bitfield values to write to the table row.
96 * table_index - The table row to write (max 31).
111 /*! Pack the fields of rec, and write th
[all...]
/linux/drivers/staging/gpib/hp_82341/
H A Dhp_82341.h40 XILINX_DATA_REG = 0x2, // before initialization, write only
108 MONITOR_CLEAR_HOLDOFF_BIT = 0x2, // write only
109 MONITOR_PPOLL_BIT = 0x4, // write clear
110 MONITOR_SRQ_BIT = 0x8, // write clear
111 MONITOR_IFC_BIT = 0x10, // write clear
112 MONITOR_REN_BIT = 0x20, // write clear
113 MONITOR_END_BIT = 0x40, // write clear
114 MONITOR_DAV_BIT = 0x80 // write clear
126 TI_INTERRUPT_EVENT_BIT = 0x1, //write clear
128 POINTERS_EQUAL_EVENT_BIT = 0x4, //write clea
[all...]
/linux/arch/loongarch/kernel/
H A Dunaligned.c252 bool sign, write; in emulate_load_store_insn() local
266 write = false; in emulate_load_store_insn()
271 write = false; in emulate_load_store_insn()
276 write = true; in emulate_load_store_insn()
281 write = false; in emulate_load_store_insn()
286 write = false; in emulate_load_store_insn()
291 write = true; in emulate_load_store_insn()
296 write = false; in emulate_load_store_insn()
301 write = true; in emulate_load_store_insn()
307 write in emulate_load_store_insn()
[all...]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dbus.json21 "PublicDescription": "This event counts write transactions from measured CMG to CMG0, if measured CMG is not CMG0.",
24 "BriefDescription": "This event counts write transactions from measured CMG to CMG0, if measured CMG is not CMG0."
27 "PublicDescription": "This event counts write transactions from measured CMG to CMG1, if measured CMG is not CMG1.",
30 "BriefDescription": "This event counts write transactions from measured CMG to CMG1, if measured CMG is not CMG1."
33 "PublicDescription": "This event counts write transactions from measured CMG to CMG2, if measured CMG is not CMG2.",
36 "BriefDescription": "This event counts write transactions from measured CMG to CMG2, if measured CMG is not CMG2."
39 "PublicDescription": "This event counts write transactions from measured CMG to CMG3, if measured CMG is not CMG3.",
42 "BriefDescription": "This event counts write transactions from measured CMG to CMG3, if measured CMG is not CMG3."
45 "PublicDescription": "This event counts write transactions from measured CMG to tofu controller.",
48 "BriefDescription": "This event counts write transaction
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/linux/Documentation/wmi/devices/
H A Dmsi-wmi-platform.rst26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16];
33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32];
43 [WmiMethodId(1), Implemented, read, write, Description("Return the contents of a package")]
46 [WmiMethodId(2), Implemented, read, write, Description("Set the contents of a package")]
49 [WmiMethodId(3), Implemented, read, write, Description("Return the contents of a package")]
52 [WmiMethodId(4), Implemented, read, write, Description("Set the contents of a package")]
55 [WmiMethodId(5), Implemented, read, write, Description("Return the contents of a package")]
58 [WmiMethodId(6), Implemented, read, write, Description("Set the contents of a package")]
61 [WmiMethodId(7), Implemented, read, write, Description("Return the contents of a package")]
64 [WmiMethodId(8), Implemented, read, write, Descriptio
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/linux/arch/mips/kernel/
H A Dcps-vec-ns16550.S32 * _mips_cps_putc() - write a character to the UART
33 * @a0: ASCII character to write
45 * _mips_cps_puts() - write a string to the UART
49 * Write a null-terminated ASCII string to the UART.
65 * _mips_cps_putx4 - write a 4b hex value to the UART
66 * @a0: the 4b value to write to the UART
69 * Write a single hexadecimal character to the UART.
82 * _mips_cps_putx8 - write an 8b hex value to the UART
83 * @a0: the 8b value to write to the UART
86 * Write a
[all...]
/linux/Documentation/filesystems/
H A Dzonefs.rst12 device support (e.g. f2fs), zonefs does not hide the sequential write
14 write zones of the device must be written sequentially starting from the end
38 conventional zones. Any read or write access can be executed, similarly to a
41 sequentially. Each sequential zone has a write pointer maintained by the
42 device that keeps track of the mandatory start LBA position of the next write
43 to the device. As a result of this write constraint, LBAs in a sequential zone
53 to, for instance, reduce internal write amplification due to garbage collection.
73 information. File sizes come from the device zone type and write pointer
80 state to make it read-only, preventing any data write.
94 For sequential write zone
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/linux/Documentation/filesystems/ext4/
H A Datomic_writes.rst10 Atomic (untorn) block writes ensure that either the entire write is committed
17 EXT4's supports atomic write operations with a single filesystem block since
18 v6.13. In this the atomic write unit minimum and maximum sizes are both set
20 e.g. doing atomic write of 16KB with 16KB filesystem blocksize on 64KB
25 using a feature known as bigalloc. The atomic write unit's minimum and
27 based on the underlying device’s supported atomic write unit limits.
44 NOTE: EXT4 does not support software or COW based atomic write, which means
56 following constraints. The minimum atomic write size is the larger of the fs
57 block size and the minimum hardware atomic write unit; and the maximum atomic
58 write siz
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/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json7 "PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line."
42 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache."
63 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache."
112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention."
119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention."
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-4 cache."
133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention."
140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention."
147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache."
154 "PublicDescription": "A directory write t
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A Dcache.json114 "PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the core is in write streaming mode and is not allocating writes into the L2 cache",
117 "BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the core is in write streaming mode and is not allocating writes into the L2 cache"
120 "PublicDescription": "L1 data cache entering write streaming mode. This event counts for each entry into write streaming mode",
123 "BriefDescription": "L1 data cache entering write streaming mode. This event counts for each entry into write streaming mode"
126 "PublicDescription": "L1 data cache write streaming mode. This event counts for each cycle where the core is in write streamin
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/linux/arch/parisc/kernel/
H A Dperf_asm.S556 ;* arg1 = 64-bit value to write
586 ; RDR 0 write sequence
588 sync ; RDR 0 write sequence
598 ; RDR 1 write sequence
610 ; RDR 2 write sequence
622 ; RDR 3 write sequence
634 ; RDR 4 write sequence
646 ; RDR 5 write sequence
658 ; RDR 6 write sequence
670 ; RDR 7 write sequenc
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