V1 (full) in projects: linux-6.15 - OpenGrok search results

Searched full:v1 (Results 1 – 25 of 3860) sorted by relevance

/linux/tools/perf/pmu-events/arch/arm64/
H A D	mapfile.csv	`15 0x00000000410fd020,v1,arm/cortex-a34,core 16 0x00000000410fd030,v1,arm/cortex-a53,core 17 0x00000000420f1000,v1,arm/cortex-a53,core 18 0x00000000410fd040,v1,arm/cortex-a35,core 19 0x00000000410fd050,v1,arm/cortex-a55,core 20 0x00000000410fd060,v1,arm/cortex-a65-e1,core 21 0x00000000410fd4a0,v1,arm/cortex-a65-e1,core 22 0x00000000410fd070,v1,arm/cortex-a57-a72,core 23 0x00000000410fd080,v1,arm/cortex-a57-a72,core 24 0x00000000410fd090,v1,ar [all...]`
/linux/Documentation/driver-api/media/drivers/ccs/
H A D	ccs-regs.asc	`13 # v1.1 defined in version 1.1 103 analog_linear_gain_min 0x0094 16 v1.1 104 analog_linear_gain_max 0x0096 16 v1.1 105 analog_linear_gain_step_size 0x0098 16 v1.1 106 analog_exponential_gain_min 0x009a 16 v1.1 107 analog_exponential_gain_max 0x009c 16 v1.1 108 analog_exponential_gain_step_size 0x009e 16 v1.1 158 emb_data_ctrl 0x0122 v1.1 176 analog_linear_gain_global 0x0206 16 v1.1 177 analog_exponential_gain_global 0x0208 16 v1 [all...]`
/linux/arch/s390/include/asm/
H A D	fpu-insn.h	139 static __always_inline void fpu_vab(u8 v1, u8 v2, u8 v3) in fpu_vab() argument 141 asm volatile("VAB %[v1],%[v2],%[v3]" in fpu_vab() 143 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vab() 147 static __always_inline void fpu_vcksm(u8 v1, u8 v2, u8 v3) in fpu_vcksm() argument 149 asm volatile("VCKSM %[v1],%[v2],%[v3]" in fpu_vcksm() 151 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vcksm() 155 static __always_inline void fpu_vesravb(u8 v1, u8 v2, u8 v3) in fpu_vesravb() argument 157 asm volatile("VESRAVB %[v1], in fpu_vesravb() 163 fpu_vgfmag(u8 v1,u8 v2,u8 v3,u8 v4) fpu_vgfmag() argument 171 fpu_vgfmg(u8 v1,u8 v2,u8 v3) fpu_vgfmg() argument 181 fpu_vl(u8 v1,const void * vxr) fpu_vl() argument 193 fpu_vl(u8 v1,const void * vxr) fpu_vl() argument 236 fpu_vll(u8 v1,u32 index,const void * vxr) fpu_vll() argument 252 fpu_vll(u8 v1,u32 index,const void * vxr) fpu_vll() argument 310 fpu_vlr(u8 v1,u8 v2) fpu_vlr() argument 326 fpu_vn(u8 v1,u8 v2,u8 v3) fpu_vn() argument 334 fpu_vperm(u8 v1,u8 v2,u8 v3,u8 v4) fpu_vperm() argument 342 fpu_vrepib(u8 v1,s16 i2) fpu_vrepib() argument 350 fpu_vsrlb(u8 v1,u8 v2,u8 v3) fpu_vsrlb() argument 360 fpu_vst(u8 v1,const void * vxr) fpu_vst() argument 371 fpu_vst(u8 v1,const void * vxr) fpu_vst() argument 386 fpu_vstl(u8 v1,u32 index,const void * vxr) fpu_vstl() argument 400 fpu_vstl(u8 v1,u32 index,const void * vxr) fpu_vstl() argument 454 fpu_vupllf(u8 v1,u8 v2) fpu_vupllf() argument 462 fpu_vx(u8 v1,u8 v2,u8 v3) fpu_vx() argument [all...]
H A D	fpu-insn-asm.h	`97 .ifc \vxr,%v1 198 * @v1: Vector register designated operand whose MSB is stored in 211 * Note: In most vector instruction formats [1] V1, V2, V3, and V4 directly 212 * correspond to @v1, @v2, @v3, and @v4. But there are exceptions, such as but 219 .macro RXB rxb v1 v2=0 v3=0 v4=0 221 .if \v1 & 0x10 238 * @v1: First vector register designated operand (for RXB) 243 * Note: For @v1, @v2, @v3, and @v4 also refer to the RXB macro 246 .macro MRXB m v1 v2=0 v3=0 v4=0 248 RXB rxb, \v1, \v [all...]`
/linux/net/ceph/
H A D	messenger_v1.c	112 BUG_ON(con->v1.out_skip); in con_out_kvec_reset() 114 con->v1.out_kvec_left = 0; in con_out_kvec_reset() 115 con->v1.out_kvec_bytes = 0; in con_out_kvec_reset() 116 con->v1.out_kvec_cur = &con->v1.out_kvec[0]; in con_out_kvec_reset() 122 int index = con->v1.out_kvec_left; in con_out_kvec_add() 124 BUG_ON(con->v1.out_skip); in con_out_kvec_add() 125 BUG_ON(index >= ARRAY_SIZE(con->v1.out_kvec)); in con_out_kvec_add() 127 con->v1.out_kvec[index].iov_len = size; in con_out_kvec_add() 128 con->v1 in con_out_kvec_add() [all...]
/linux/arch/powerpc/lib/
H A D	xor_vmx.c	`44 #define XOR(V1, V2) \ argument 46 V1##_0 = vec_xor(V1##_0, V2##_0); \ 47 V1##_1 = vec_xor(V1##_1, V2##_1); \ 48 V1##_2 = vec_xor(V1##_2, V2##_2); \ 49 V1##_3 = vec_xor(V1##_3, V2##_3); \ 56 DEFINE(v1); in __xor_altivec_2() [all...]`
/linux/tools/perf/pmu-events/arch/x86/
H A D	mapfile.csv	`2 GenuineIntel-6-(97\|9A\|B7\|BA\|BF),v1.31,alderlake,core 3 GenuineIntel-6-BE,v1.31,alderlaken,core 4 GenuineIntel-6-C[56],v1.09,arrowlake,core 9 GenuineIntel-6-55-[56789ABCDEF],v1.25,cascadelakex,core 10 GenuineIntel-6-DD,v1.00,clearwaterforest,core 11 GenuineIntel-6-9[6C],v1.05,elkhartlake,core 12 GenuineIntel-6-CF,v1.14,emeraldrapids,core 14 GenuineIntel-6-7A,v1.01,goldmontplus,core 15 GenuineIntel-6-B6,v1.09,grandridge,core 16 GenuineIntel-6-A[DE],v1 [all...]`
/linux/arch/loongarch/lib/
H A D	xor_template.c	`17 unsigned long * __restrict v1, 24 LD_INOUT_LINE(v1) 26 ST_LINE(v1) 27 : : [v1] "r"(v1), [v2] "r"(v2) : "memory" 30 v1 += LINE_WIDTH / sizeof(unsigned long); 36 unsigned long * __restrict v1, 44 LD_INOUT_LINE(v1) 47 ST_LINE(v1) 48 : : [v1] " [all...]`
/linux/tools/testing/selftests/powerpc/math/
H A D	vmx_asm.S	`9 # Should be safe from C, only touches r4, r5 and v0,v1,v2 16 vcmpequd. v1,v0,v20 17 vmr v2,v1 21 vcmpequd. v1,v0,v21 22 vand v2,v2,v1 26 vcmpequd. v1,v0,v22 27 vand v2,v2,v1 31 vcmpequd. v1,v0,v23 32 vand v2,v2,v1 36 vcmpequd. v1,v [all...]`
/linux/include/pcmcia/
H A D	device_id.h	24 #define PCMCIA_DEVICE_PROD_ID1(v1, vh1) { \ argument 26 .prod_id = { (v1), NULL, NULL, NULL }, \ 39 #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ argument 42 .prod_id = { (v1), (v2), NULL, NULL }, \ 45 #define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \ argument 48 .prod_id = { (v1), NULL, (v3), NULL }, \ 51 #define PCMCIA_DEVICE_PROD_ID14(v1, v4, vh1, vh4) { \ argument 54 .prod_id = { (v1), NULL, NULL, (v4) }, \ 57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument 61 .prod_id = { (v1), (v 64 PCMCIA_DEVICE_PROD_ID124(v1,v2,v4,vh1,vh2,vh4) global() argument 71 PCMCIA_DEVICE_PROD_ID134(v1,v3,v4,vh1,vh3,vh4) global() argument 78 PCMCIA_DEVICE_PROD_ID1234(v1,v2,v3,v4,vh1,vh2,vh3,vh4) global() argument 86 PCMCIA_DEVICE_MANF_CARD_PROD_ID1(manf,card,v1,vh1) global() argument 115 PCMCIA_MFC_DEVICE_PROD_ID1(mfc,v1,vh1) global() argument 129 PCMCIA_MFC_DEVICE_PROD_ID12(mfc,v1,v2,vh1,vh2) global() argument 137 PCMCIA_MFC_DEVICE_PROD_ID13(mfc,v1,v3,vh1,vh3) global() argument 145 PCMCIA_MFC_DEVICE_PROD_ID123(mfc,v1,v2,v3,vh1,vh2,vh3) global() argument 164 PCMCIA_PFC_DEVICE_PROD_ID1(mfc,v1,vh1) global() argument 178 PCMCIA_PFC_DEVICE_PROD_ID12(mfc,v1,v2,vh1,vh2) global() argument 186 PCMCIA_PFC_DEVICE_PROD_ID13(mfc,v1,v3,vh1,vh3) global() argument 194 PCMCIA_PFC_DEVICE_PROD_ID123(mfc,v1,v2,v3,vh1,vh2,vh3) global() argument 213 PCMCIA_DEVICE_CIS_PROD_ID12(v1,v2,vh1,vh2,_cisfile) global() argument 221 PCMCIA_DEVICE_CIS_PROD_ID123(v1,v2,v3,vh1,vh2,vh3,_cisfile) global() argument 238 PCMCIA_PFC_DEVICE_CIS_PROD_ID12(mfc,v1,v2,vh1,vh2,_cisfile) global() argument 258 PCMCIA_MFC_DEVICE_CIS_PROD_ID12(mfc,v1,v2,vh1,vh2,_cisfile) global() argument [all...]
/linux/arch/powerpc/boot/dts/fsl/
H A D	interlaken-lac-portals.dtsi	39 compatible = "fsl,interlaken-lac-portal-v1.0"; 44 compatible = "fsl,interlaken-lac-portal-v1.0"; 49 compatible = "fsl,interlaken-lac-portal-v1.0"; 54 compatible = "fsl,interlaken-lac-portal-v1.0"; 59 compatible = "fsl,interlaken-lac-portal-v1.0"; 64 compatible = "fsl,interlaken-lac-portal-v1.0"; 69 compatible = "fsl,interlaken-lac-portal-v1.0"; 74 compatible = "fsl,interlaken-lac-portal-v1.0"; 79 compatible = "fsl,interlaken-lac-portal-v1.0"; 84 compatible = "fsl,interlaken-lac-portal-v1 [all...]
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A D	reg_helper.h	67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument 69 FN(reg, f1), v1,\ 72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument 74 FN(reg, f1), v1,\ 78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument 80 FN(reg, f1), v1,\ 85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument 88 FN(reg, f1), v1,\ 94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument 97 FN(reg, f1), v1,\ 104 REG_SET_7(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) global() argument 115 REG_SET_8(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) global() argument 127 REG_SET_9(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) global() argument 140 REG_SET_10(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) global() argument 160 REG_GET_2(reg_name,f1,v1,f2,v2) global() argument 165 REG_GET_3(reg_name,f1,v1,f2,v2,f3,v3) global() argument 171 REG_GET_4(reg_name,f1,v1,f2,v2,f3,v3,f4,v4) global() argument 178 REG_GET_5(reg_name,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) global() argument 186 REG_GET_6(reg_name,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) global() argument 195 REG_GET_7(reg_name,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) global() argument 205 REG_GET_8(reg_name,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) global() argument 234 REG_UPDATE_2(reg,f1,v1,f2,v2) global() argument 239 REG_UPDATE_3(reg,f1,v1,f2,v2,f3,v3) global() argument 245 REG_UPDATE_4(reg,f1,v1,f2,v2,f3,v3,f4,v4) global() argument 252 REG_UPDATE_5(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) global() argument 260 REG_UPDATE_6(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) global() argument 269 REG_UPDATE_7(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) global() argument 279 REG_UPDATE_8(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) global() argument 290 REG_UPDATE_9(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) global() argument 302 REG_UPDATE_10(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) global() argument 315 REG_UPDATE_14(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14) global() argument 333 REG_UPDATE_19(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) global() argument 356 REG_UPDATE_20(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) global() argument 382 REG_UPDATE_SEQ_2(reg,f1,v1,f2,v2) global() argument 386 REG_UPDATE_SEQ_3(reg,f1,v1,f2,v2,f3,v3) global() argument 452 IX_REG_SET_2(index_reg_name,data_reg_name,index,init_value,f1,v1,f2,v2) global() argument 476 IX_REG_UPDATE_2(index_reg_name,data_reg_name,index,f1,v1,f2,v2) global() argument 511 IX_REG_SET_SYNC(index,init_value,f1,v1) global() argument 515 IX_REG_SET_2_SYNC(index,init_value,f1,v1,f2,v2) global() argument [all...]
/linux/tools/arch/x86/lib/
H A D	x86-opcode-map.txt	29 # (v1): this opcode only supports 128bit VEX. 354 # Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming 356 10: vmovups Vps,Wps \| vmovupd Vpd,Wpd (66) \| vmovss Vx,Hx,Wss (F3),(v1) \| vmovsd Vx,Hx,Wsd (F2),(v1) 357 11: vmovups Wps,Vps \| vmovupd Wpd,Vpd (66) \| vmovss Wss,Hx,Vss (F3),(v1) \| vmovsd Wsd,Hx,Vsd (F2),(v1) 358 12: vmovlps Vq,Hq,Mq (v1) \| vmovhlps Vq,Hq,Uq (v1) \| vmovlpd Vq,Hq,Mq (66),(v1) \| vmovsldup Vx,Wx (F3) \| vmovddup Vx,Wx (F2) 359 13: vmovlps Mq,Vq (v1) \| vmovlp [all...]
/linux/drivers/char/mwave/
H A D	mwavedd.h	79 #define PRINTK_2(f,s,v1) \ argument 81 printk(s,v1); \ 84 #define PRINTK_3(f,s,v1,v2) \ argument 86 printk(s,v1,v2); \ 89 #define PRINTK_4(f,s,v1,v2,v3) \ argument 91 printk(s,v1,v2,v3); \ 94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument 96 printk(s,v1,v2,v3,v4); \ 99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument 101 printk(s,v1,v 104 PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) global() argument 109 PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) global() argument 116 PRINTK_2(f,s,v1) global() argument 117 PRINTK_3(f,s,v1,v2) global() argument 118 PRINTK_4(f,s,v1,v2,v3) global() argument 119 PRINTK_5(f,s,v1,v2,v3,v4) global() argument 120 PRINTK_6(f,s,v1,v2,v3,v4,v5) global() argument 121 PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) global() argument 122 PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) global() argument [all...]
/linux/arch/arm64/lib/
H A D	xor-neon.c	19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local 25 v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); in xor_arm64_neon_2() 31 vst1q_u64(dp1 + 2, v1); in xor_arm64_neon_2() 48 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local 54 v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); in xor_arm64_neon_3() 60 v1 = veorq_u64(v1, vld1q_u64(dp3 + 2)); in xor_arm64_neon_3() 66 vst1q_u64(dp1 + 2, v1); in xor_arm64_neon_3() 86 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local 92 v1 in xor_arm64_neon_4() 133 register uint64x2_t v0, v1, v2, v3; xor_arm64_neon_5() local 203 register uint64x2_t v0, v1, v2, v3; xor_arm64_eor3_3() local 240 register uint64x2_t v0, v1, v2, v3; xor_arm64_eor3_4() local 286 register uint64x2_t v0, v1, v2, v3; xor_arm64_eor3_5() local [all...]
/linux/arch/arm64/crypto/
H A D	aes-ce-core.S	`14 ld1 {v1.4s}, [x0], #16 18 mov v3.16b, v1.16b 20 0: mov v2.16b, v1.16b 24 2: ld1 {v1.4s}, [x0], #16 29 aese v0.16b, v1.16b 42 ld1 {v1.4s}, [x0], #16 46 mov v3.16b, v1.16b 48 0: mov v2.16b, v1.16b 52 2: ld1 {v1.4s}, [x0], #16 57 aesd v0.16b, v1 [all...]`
H A D	sm4-ce-core.S	`53 ld1 {v1.16b}, [x3]; 59 eor v0.16b, v0.16b, v1.16b; 62 sm4ekey v1.4s, v0.4s, v25.4s; 63 sm4ekey v2.4s, v1.4s, v26.4s; 82 tbl v22.16b, {v1.16b}, v24.16b 124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7); 140 SM4_CRYPT_BLK4(v0, v1, v2, v3); 181 eor v1.16b, v1.16b, v0.16b 182 SM4_CRYPT_BLK(v1) [all...]`
/linux/drivers/hid/
H A D	wacom.h	`24 * v1.8 (vp) - Submit URB only when operating, moved to CVS, 27 * v1.11 (vp) - Add URB ->dev setting for new kernels 28 * v1.11 (jb) - Add support for the 4D Mouse & Lens 29 * v1.12 (de) - Add support for two more inking pen IDs 30 * v1.14 (vp) - Use new USB device id probing scheme. 32 * v1.18 (vp) - Fix mouse wheel direction 34 * v1.20 (fl) - Report tool id for Intuos devices 39 * v1.21 (vp) - Removed protocol descriptions 42 * v1.21.1 (fl) - added Graphire2 support 43 * v1 [all...]`
/linux/arch/riscv/crypto/
H A D	sm4-riscv64-zvksed-zvkb.S	`57 vle32.v v1, (a0) 58 vrev8.v v1, v1 63 vxor.vv v1, v1, v2 71 vsm4k.vi v1, v1, i 72 vse32.v v1, (a1) // Store to rkey_enc. 73 vsse32.v v1, (a2), t0 // Store to rkey_dec. 89 vle32.v v1, (a [all...]`
/linux/lib/
H A D	atomic64_test.c	107 int v1 = 0xdeadbeef; in test_atomic() local 118 TEST(, or, \|=, v1); in test_atomic() 119 TEST(, and, &=, v1); in test_atomic() 120 TEST(, xor, ^=, v1); in test_atomic() 121 TEST(, andnot, &= ~, v1); in test_atomic() 133 FETCH_FAMILY_TEST(, fetch_or, \|=, v1); in test_atomic() 134 FETCH_FAMILY_TEST(, fetch_and, &=, v1); in test_atomic() 135 FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1); in test_atomic() 136 FETCH_FAMILY_TEST(, fetch_xor, ^=, v1); in test_atomic() 141 XCHG_FAMILY_TEST(, v0, v1); in test_atomic() 150 long long v1 = 0xdeadbeefdeafcafeLL; test_atomic64() local [all...]
/linux/Documentation/devicetree/bindings/arm/bcm/
H A D	brcm,bcm4708.yaml	`31 - linksys,ea6300-v1 33 - luxul,xap-1510-v1 35 - netgear,r6250-v1 47 - luxul,xap-1410-v1 48 - luxul,xwr-1200-v1 62 - tplink,archer-c9-v1 76 - luxul,abr-4500-v1 77 - luxul,xap-1610-v1 78 - luxul,xbr-4500-v1 79 - luxul,xwc-2000-v1 [all...]`
/linux/arch/mips/include/asm/
H A D	stackframe.h	`60 mflhxu v1 61 LONG_S v1, PT_LO(sp) 62 mflhxu v1 63 LONG_S v1, PT_HI(sp) 64 mflhxu v1 65 LONG_S v1, PT_ACX(sp) 67 mfhi v1 77 LONG_S v1, PT_HI(sp) 78 mflo v1 85 LONG_S v1, PT_L [all...]`
/linux/tools/testing/selftests/bpf/
H A D	test_xdp_features.sh	`16 ip link add v1 type veth peer name v0 netns ${NS} 18 ip link set v1 up 19 ip addr add $V1_IP4/24 dev v1 20 ip addr add $V1_IP6/64 nodad dev v1 26 ethtool -K v1 gro on 27 ethtool -K v1 tx-checksumming off 34 ip link del v1 2> /dev/null 50 ./xdp_features -f XDP_PASS -D $V1_IP6 -T $V0_IP6 v1 & 58 ./xdp_features -f XDP_DROP -D ::ffff:$V1_IP4 -T ::ffff:$V0_IP4 v1 & 67 ./xdp_features -f XDP_ABORTED -D $V1_IP6 -T $V0_IP6 v1 [all...]`
/linux/arch/arm64/boot/dts/freescale/
H A D	imx8qm-apalis-v1.1-ixora-v1.1.dts	`6 /dts-v1/; 8 #include "imx8qm-apalis-v1.1.dtsi" 9 #include "imx8-apalis-ixora-v1.1.dtsi" 12 model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.1 Carrier Board"; 13 compatible = "toradex,apalis-imx8-v1.1-ixora-v1.1", 14 "toradex,apalis-imx8-v1.1",`
H A D	imx8qm-apalis-v1.1-ixora-v1.2.dts	`6 /dts-v1/; 8 #include "imx8qm-apalis-v1.1.dtsi" 9 #include "imx8-apalis-ixora-v1.2.dtsi" 12 model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board"; 13 compatible = "toradex,apalis-imx8-v1.1-ixora-v1.2", 14 "toradex,apalis-imx8-v1.1",`

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