| /linux/arch/arm/boot/dts/rockchip/ ! |
| H A D | rk3288-veyron-sdmmc.dtsi | 3 * Google Veyron (and derivatives) fragment for sdmmc cards
10 mmc1 = &sdmmc;
19 sdmmc {
21 * We run sdmmc at max speed; bump up drive strength.
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
80 &sdmmc {
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| H A D | rk3288-phycore-rdk.dts | 175 sdmmc {
180 sdmmc_bus4: sdmmc-bus4 {
187 sdmmc_clk: sdmmc-clk {
191 sdmmc_cmd: sdmmc-cmd {
195 sdmmc_pwr: sdmmc-pwr {
223 &sdmmc {
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| H A D | rk3288-veyron-mighty.dts | 20 &sdmmc {
29 sdmmc {
30 sdmmc_wp_pin: sdmmc-wp-pin {
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| H A D | rk3288-evb.dtsi | 170 vcc_sd: regulator-sdmmc {
224 &sdmmc {
339 sdmmc {
344 sdmmc_bus4: sdmmc-bus4 {
351 sdmmc_clk: sdmmc-clk {
355 sdmmc_cmd: sdmmc-cmd {
359 sdmmc_pwr: sdmmc-pwr {
|
| H A D | rk3288-firefly-reload.dts | 110 vcc_sd: regulator-sdmmc {
241 &sdmmc {
346 sdmmc {
351 sdmmc_bus4: sdmmc-bus4 {
358 sdmmc_clk: sdmmc-clk {
362 sdmmc_cmd: sdmmc-cmd {
366 sdmmc_pwr: sdmmc-pwr {
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| H A D | rk3288-miqi.dts | 61 vcc_sd: regulator-sdmmc {
341 sdmmc {
346 sdmmc_bus4: sdmmc-bus4 {
353 sdmmc_clk: sdmmc-clk {
357 sdmmc_cmd: sdmmc-cmd {
361 sdmmc_pwr: sdmmc-pwr {
378 &sdmmc {
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| H A D | rk3288-tinker.dtsi | 97 vcc_sd: regulator-sdmmc {
407 sdmmc {
408 sdmmc_bus4: sdmmc-bus4 {
415 sdmmc_clk: sdmmc-clk {
419 sdmmc_cmd: sdmmc-cmd {
423 sdmmc_pwr: sdmmc-pwr {
455 &sdmmc {
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| H A D | rk3288-veyron-pinky.dts | 107 sdmmc {
108 sdmmc_wp_pin: sdmmc-wp-pin {
127 &sdmmc {
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| H A D | rk3288-firefly.dtsi | 91 vcc_sd: regulator-sdmmc {
440 sdmmc {
445 sdmmc_bus4: sdmmc-bus4 {
452 sdmmc_clk: sdmmc-clk {
456 sdmmc_cmd: sdmmc-cmd {
460 sdmmc_pwr: sdmmc-pwr {
498 &sdmmc {
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| H A D | rk3288-rock2-square.dts | 120 vcc_sd: regulator-sdmmc {
145 &sdmmc {
244 sdmmc {
245 sdmmc_pwr: sdmmc-pwr {
|
| H A D | rk3288-vmarc-som.dtsi | 292 sdmmc {
293 sdmmc_bus4: sdmmc-bus4 {
301 sdmmc_clk: sdmmc-clk {
305 sdmmc_cmd: sdmmc-cmd {
|
| /linux/Documentation/devicetree/bindings/mmc/ ! |
| H A D | nvidia,tegra20-sdhci.yaml | 228 - const: sdmmc-3v3
230 - const: sdmmc-1v8
232 - const: sdmmc-3v3-drv
234 - const: sdmmc-1v8-drv
237 - const: sdmmc-3v3-drv
239 - const: sdmmc-1v8-drv
242 - const: sdmmc-1v8-drv
257 - const: sdmmc-3v3
259 - const: sdmmc-1v8
296 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
[all …]
|
| H A D | synopsys-dw-mshc.yaml | 46 - description: register offset that controls the SDMMC clock phase
50 that contains the SDMMC clock-phase control register. The first value is
52 SDMMC clock phase register, and the 3rd value is the bit shift for the
|
| H A D | wm,wm8505-sdhc.yaml | 37 - description: SDMMC controller interrupt
38 - description: SDMMC controller DMA interrupt
|
| /linux/arch/arm64/boot/dts/rockchip/ ! |
| H A D | rk3368-orion-r68-meta.dts | 16 mmc0 = &sdmmc;
273 sdmmc {
274 sdmmc_clk: sdmmc-clk {
278 sdmmc_cmd: sdmmc-cmd {
282 sdmmc_cd: sdmmc-cd {
286 sdmmc_bus1: sdmmc-bus1 {
290 sdmmc_bus4: sdmmc-bus4 {
310 &sdmmc {
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| H A D | rk3368-lion-haikou.dts | 14 mmc1 = &sdmmc;
71 &sdmmc {
131 sdmmc {
132 sdmmc_cd_pin: sdmmc-cd-pin {
|
| H A D | rk3308-rock-s0.dts | 15 mmc1 = &sdmmc;
78 * HW revision prior to v1.2 must pull GPIO4_D6 low to access sdmmc.
201 sdmmc {
202 sdmmc_2030: sdmmc-2030 {
255 &sdmmc {
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| H A D | rk3399-gru.dtsi | 13 mmc0 = &sdmmc;
473 sdmmc-supply = <&ppvar_sd_card_io>; /* SDMMC0_VDD; 4b */
536 &sdmmc {
545 * configured as SDMMC and not JTAG.
772 sdmmc {
774 * We run sdmmc at max speed; bump up drive strength.
777 sdmmc_bus4: sdmmc-bus4 {
785 sdmmc_clk: sdmmc-clk {
790 sdmmc_cmd: sdmmc-cmd {
804 sdmmc_cd: sdmmc-cd {
[all …]
|
| H A D | rk3399-rock960.dtsi | 14 mmc1 = &sdmmc;
391 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
430 sdmmc {
431 sdmmc_bus1: sdmmc-bus1 {
436 sdmmc_bus4: sdmmc-bus4 {
444 sdmmc_clk: sdmmc-clk {
449 sdmmc_cmd: sdmmc-cmd {
548 &sdmmc {
|
| H A D | rk3576-luckfox-omni3576.dts | 16 mmc1 = &sdmmc;
41 &sdmmc {
|
| H A D | rk3528-radxa-e20c.dts | 23 mmc1 = &sdmmc;
259 sdmmc {
260 sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
295 &sdmmc {
|
| H A D | rk3308-roc-cc.dts | 14 mmc0 = &sdmmc;
81 vcc_sdmmc: vcc-sdmmc {
176 &sdmmc {
|
| H A D | px30-cobra-ltk500hd1829.dts | 14 mmc1 = &sdmmc;
62 &sdmmc {
|
| /linux/Documentation/devicetree/bindings/edac/ ! |
| H A D | altr,socfpga-ecc-manager.yaml | 164 "^sdmmc[a-f]-ecc@[a-f0-9]+$":
172 - const: altr,socfpga-s10-sdmmc-ecc
173 - const: altr,socfpga-sdmmc-ecc
174 - const: altr,socfpga-sdmmc-ecc
316 compatible = "altr,socfpga-s10-sdmmc-ecc",
317 "altr,socfpga-sdmmc-ecc";
|
| /linux/arch/arm/boot/dts/nxp/lpc/ ! |
| H A D | lpc4357-ea4357-devkit.dts | 48 /* vmmc is controlled by sdmmc host internally */
348 sdmmc_pins: sdmmc-pins {
351 function = "sdmmc";
358 function = "sdmmc";
367 function = "sdmmc";
374 function = "sdmmc";
|