Home
last modified time | relevance | path

Searched full:power7 (Results 1 – 25 of 39) sorted by relevance

12

/linux/arch/powerpc/kernel/
H A Dcpu_specs_book3s_64.h214 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
217 .cpu_name = "POWER7 (architected)",
227 .platform = "power7",
301 { /* Power7 */
304 .cpu_name = "POWER7 (raw)",
316 .platform = "power7",
318 { /* Power7+ */
321 .cpu_name = "POWER7+ (raw)",
333 .platform = "power7+",
/linux/Documentation/arch/powerpc/
H A Disa-versions.rst17 Power7 Power ISA v2.06
51 Power7 Yes
71 Power7 Yes
91 Power7 No
H A Dcpu_families.rst91 | POWER7 |
97 | POWER7+ |
/linux/arch/powerpc/perf/
H A Dpower7-pmu.c3 * Performance counter support for POWER7 processors.
16 * Bits in event code for POWER7
31 * Bits in MMCR1 for POWER7
52 * Power7 event codes.
58 #include "power7-events-list.h"
388 #include "power7-events-list.h"
403 #include "power7-events-list.h"
432 .name = "POWER7",
H A DMakefile8 power5+-pmu.o power6-pmu.o power7-pmu.o \
H A Dpower7-events-list.h3 * Performance counter support for POWER7 processors.
/linux/arch/powerpc/lib/
H A Dchecksum_64.S74 * On POWER6 and POWER7 back to back adde instructions take 2 cycles
77 * been shown to hit this on both POWER6 and POWER7.
267 * On POWER6 and POWER7 back to back adde instructions take 2 cycles
270 * been shown to hit this on both POWER6 and POWER7.
/linux/arch/powerpc/kvm/
H A Dbook3s_hv_ras.c20 /* SRR1 bits for machine check on POWER7 */
29 /* DSISR bits for machine check on POWER7 */
36 /* POWER7 SLB flush and reload */
66 * On POWER7, see if we can handle a machine check that occurred inside
H A Dbook3s_hv_rmhandlers.S57 * This is reserved in the LPID allocator. POWER7 only implements 0x3ff, but
540 * POWER7/POWER8 host -> guest partition switch code.
721 /* Skip next section on POWER7 */
1298 8: /* Power7 jumps back in here */
1399 * POWER7/POWER8 guest -> host partition switch code.
2096 * Although not specifically required by the architecture, POWER7
2740 * XXX On POWER7 and POWER8, we just spin here since we don't
H A Dbook3s_64_mmu_hv.c274 /* POWER7 has 10-bit LPIDs, POWER8 has 12-bit LPIDs */ in kvmppc_mmu_hv_init()
282 * switching for POWER7 and POWER8. in kvmppc_mmu_hv_init()
397 /* Storage key permission check for POWER7 */ in kvmppc_mmu_book3s_64_hv_xlate()
2116 vcpu->arch.slb_nr = 32; /* POWER7/POWER8 */ in kvmppc_mmu_book3s_hv_init()
/linux/drivers/char/hw_random/
H A Dpowernv-rng.c71 MODULE_DESCRIPTION("Bare metal HWRNG driver for POWER7+ and above");
H A Dpseries-rng.c5 * Driver for the pseries hardware RNG for POWER7+ and above
H A DKconfig331 Generator hardware found on POWER7+ machines and above
344 in POWER7+ and above machines for PowerNV platform.
/linux/Documentation/devicetree/bindings/tpm/
H A Dibm,vtpm.yaml13 Virtual TPM is used on IBM POWER7+ and POWER8 systems running POWERVM.
/linux/arch/powerpc/xmon/
H A Dppc-opc.c2960 #define POWER7 PPC_OPCODE_POWER7
5057 {"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
5067 {"bpermd", X(31,252), X_MASK, POWER7|PPCA2, 0, {RA, RS, RB}},
5108 {"dcbtt", XRT(31,278,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
5132 {"tlbie", X(31,306), XRA_MASK, POWER7, POWER9|TITAN, {RB, RS}},
5133 {"tlbie", X(31,306), XRTLRA_MASK, PPC, E500|POWER7|TITAN, {RB, LOPT}},
5339 {"mfppr", XSPR(31,339,896), XSPR_MASK, POWER7, 0, {RT}},
5340 {"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER7, 0, {RT}},
5432 {"popcntw", X(31,378), XRB_MASK, POWER7|PPCA2, 0, {RA, RS}},
5442 {"divdeu", XO(31,393,0,0), XO_MASK, POWER7|PPCA
2956 #define POWER7 PPC_OPCODE_POWER7 global() macro
[all...]
H A Dppc.h119 /* Opcode is only supported by Power7 architecture. */
/linux/tools/testing/selftests/powerpc/security/
H A Dentry_flush.c34 // The PMU event we use only works on Power7 or later in entry_flush_test()
H A Drfi_flush.c34 // The PMU event we use only works on Power7 or later in rfi_flush_test()
H A Duaccess_flush.c36 // The PMU event we use only works on Power7 or later in uaccess_flush_test()
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-event_source-devices-hv_24x731 hypervisor on POWER7 and 8 systems. This catalog lists events
/linux/drivers/crypto/nx/
H A Dnx.h13 #define NX_STRING "IBM Power7+ Nest Accelerator Crypto Driver"
/linux/arch/powerpc/platforms/powernv/
H A Drng.c38 .machine power7; \ in rng_whiten()
/linux/Documentation/devicetree/bindings/powerpc/opal/
H A Dpower-mgt.txt49 0x00010000 /* This is a nap state (POWER7,POWER8) */
/linux/arch/powerpc/include/asm/
H A Dkvm_book3s_64.h215 * These functions encode knowledge of the POWER7/8/9 hardware
499 * This works for 4k, 64k and 16M pages on POWER7,
/linux/Documentation/virt/kvm/devices/
H A Dxive.rst17 the legacy interrupt mode, referred as XICS (POWER7/8).

12