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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmediatek,mtk-cirq.yaml14 work outside of MCUSYS which comprises with Cortex-Ax cores, CCI and GIC.
15 The external interrupts (outside MCUSYS) will feed through CIRQ and connect
16 to GIC in MCUSYS. When CIRQ is enabled, it will record the edge-sensitive
18 flush command is executed. With CIRQ, MCUSYS can be completely turned off
/linux/drivers/interconnect/mediatek/
H A Dmt8183.c24 static struct mtk_icc_node mcusys = { variable
25 .name = "mcusys",
106 [MASTER_MCUSYS] = &mcusys,
H A Dmt8195.c24 static struct mtk_icc_node mcusys = { variable
25 .name = "mcusys",
280 [MASTER_MCUSYS] = &mcusys,
/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8186-sys-clock.yaml23 The mcusys provides mux control to select the clock source in AP MCU.
30 - mediatek,mt8186-mcusys
H A Dmediatek,mt8188-sys-clock.yaml23 The mcusys provides mux control to select the clock source in AP MCU.
H A Dmediatek,topckgen.yaml42 - mediatek,mt7988-mcusys
/linux/drivers/clk/mediatek/
H A Dclk-mt8186-mcu.c52 { .compatible = "mediatek,mt8186-mcusys", .data = &mcu_desc },
67 MODULE_DESCRIPTION("MediaTek MT8186 mcusys clocks driver");
H A DKconfig691 tristate "Clock driver for MediaTek MT8186 mcusys"
695 This driver supports MediaTek MT8186 mcusys clocks.
H A Dclk-mt7988-topckgen.c311 { .compatible = "mediatek,mt7988-mcusys", .data = &mcusys_desc },
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7988a.dtsi17 clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
53 clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
65 clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
77 clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
89 clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
280 mcusys: mcusys@100e0000 { label
281 compatible = "mediatek,mt7988-mcusys", "syscon";
H A Dmt8186.dtsi41 clocks = <&mcusys CLK_MCU_ARMPLL_BUS_SEL>,
380 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
404 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
428 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
452 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
476 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
500 clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>,
524 clocks = <&mcusys CLK_MCU_ARMPLL_BL_SEL>,
548 clocks = <&mcusys CLK_MCU_ARMPLL_BL_SEL>,
849 mcusys label
[all...]
/linux/drivers/clocksource/
H A Dtimer-mediatek-cpux.c24 /* cpux mcusys wrapper */
/linux/include/dt-bindings/clock/
H A Dmediatek,mt7988-clk.h134 /* MCUSYS */
H A Dmt8186-clk.h10 /* MCUSYS */