/linux/Documentation/devicetree/bindings/phy/ |
H A D | qcom,qusb2-phy.yaml | 116 qcom,hstx-trim-value: 118 It is a 4 bit value that specifies tuning for HSTX 139 It is a 1 bit value that specifies how long the HSTX 180 qcom,hstx-trim-value: false
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H A D | realtek,usb2phy.yaml | 96 realtek,inverse-hstx-sync-clock: 148 realtek,inverse-hstx-sync-clock: false 172 realtek,inverse-hstx-sync-clock;
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/linux/include/dt-bindings/phy/ |
H A D | phy-qcom-qusb2.h | 9 /* PHY HSTX TRIM bit values (24mA to 15mA) */
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/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | dsi-phy-10nm.yaml | 64 for the HSTX drive. Use supported levels (mV) to offset the drive level
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm850-samsung-w737.dts | 604 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 632 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
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H A D | sdm845-mtp.dts | 733 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 767 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
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H A D | sdm845-db845c.dts | 1072 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 1100 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
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H A D | sdm845-xiaomi-beryllium-common.dtsi | 601 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
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H A D | sdm845-xiaomi-polaris.dts | 660 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
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H A D | sdm845-oneplus-common.dtsi | 787 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
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H A D | sdm845-samsung-starqltechn.dts | 921 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
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H A D | msm8996.dtsi | 760 qusb2p_hstx_trim: hstx-trim@24e { 765 qusb2s_hstx_trim: hstx-trim@24f {
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H A D | qcm2290.dtsi | 790 qusb2_hstx_trim: hstx-trim@25b {
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H A D | sdm630.dtsi | 595 qusb2_hstx_trim: hstx-trim@240 {
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H A D | sdm845.dtsi | 1222 qusb2p_hstx_trim: hstx-trim-primary@1eb { 1227 qusb2s_hstx_trim: hstx-trim-secondary@1eb {
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H A D | msm8998.dtsi | 856 qusb2_hstx_trim: hstx-trim@23a {
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H A D | sm6115.dtsi | 982 qusb2_hstx_trim: hstx-trim@25b {
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H A D | qcs615.dtsi | 510 qusb2_hstx_trim: hstx-trim@1f8 {
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H A D | sc7180.dtsi | 813 qusb2p_hstx_trim: hstx-trim-primary@25b {
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/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-qusb2.c | 1051 dev_dbg(dev, "failed to lookup tune2 hstx trim value\n"); in qusb2_phy_probe() 1072 if (!of_property_read_u32(dev->of_node, "qcom,hstx-trim-value", in qusb2_phy_probe()
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/linux/drivers/phy/realtek/ |
H A D | phy-rtk-usb2.c | 978 if (of_property_read_bool(np, "realtek,inverse-hstx-sync-clock")) in parse_phy_data()
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/linux/drivers/gpu/drm/bridge/cadence/ |
H A D | cdns-dsi-core.c | 890 * HSTX and LPRX timeouts are both expressed in TX byte clk cycles and in cdns_dsi_bridge_atomic_pre_enable()
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/linux/drivers/gpu/drm/vc4/ |
H A D | vc4_dsi.c | 1515 DSI_PORT_BIT(INT_HSTX_TO), "HSTX timeout"); in vc4_dsi_irq_handler()
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