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/linux/Documentation/devicetree/bindings/mmc/
H A Dcdns,sdhci.yaml97 HS200, HS400 and HS400_ES.
104 Value of the delay introduced on the sdclk output for HS200, HS400 and
155 mmc-hs200-1_8v;
H A Dsprd,sdhci-r11.yaml101 mmc-hs200-1_8v;
108 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
H A Dmmc-controller-common.yaml197 mmc-hs200-1_2v:
200 eMMC HS200 mode (1.2V I/O) is supported.
202 mmc-hs200-1_8v:
205 eMMC HS200 mode (1.8V I/O) is supported.
H A Dsdhci-am654.yaml115 ti,otap-del-sel-hs200:
116 description: Output tap delay for eMMC HS200 timing
235 ti,otap-del-sel-hs200 = <0x5>;
H A Damlogic,meson-mx-sdhc.yaml18 It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).
/linux/drivers/mmc/host/
H A Dsdhci-acpi.c483 * read from the HS200 (SDR104) preset register. in amd_select_drive_strength()
499 * switching from HS400->DDR52->HS->HS200->HS400. So the driver mismatch in amd_select_drive_strength()
507 * card's timing to HS200 or HS400. The card will use the default driver in amd_select_drive_strength()
529 * HS->HS200->Perform Tuning->HS->HS400
532 * HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
534 * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
536 * If we have previously performed tuning and switch back to HS200 or
632 * b) The HS200 and HS400 driver strengths don't match. in sdhci_acpi_emmc_amd_probe_slot()
635 * strength of B. As part of initializing HS400, HS200 tuning in sdhci_acpi_emmc_amd_probe_slot()
641 * SDR25 => 25 MHz, SDR50 => 50 MHz. Additionally the HS200 an in sdhci_acpi_emmc_amd_probe_slot()
[all...]
H A Dsdhci-xenon.c195 * Xenon defines different values for HS200 and HS400
286 * HS400/HS200/eMMC HS doesn't have Preset Value register. in xenon_set_ios()
287 * However, sdhci_set_ios will read HS400/HS200 Preset register. in xenon_set_ios()
288 * Disable Preset Value register for HS400/HS200. in xenon_set_ios()
429 /* Disable HS200 on Armada AP806 */ in xenon_probe_params()
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso18 mmc-hs200-1_8v;
H A Dmt7988a-bananapi-bpi-r4-emmc.dtso21 mmc-hs200-1_8v;
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-tinker-s.dts22 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328-nanopi-r2c-plus.dts27 mmc-hs200-1_8v;
H A Drk3328-nanopi-r2s-plus.dts26 mmc-hs200-1_8v;
H A Dpx30-cobra.dtsi124 * For hs200 support, U-Boot would have to set the RK809 DCDC4
126 * devices out in the field, so disable hs200.
127 * mmc-hs200-1_8v;
H A Drk3566-anbernic-rg-arc-d.dts52 mmc-hs200-1_8v;
H A Dpx30-pp1516.dtsi152 * For hs200 support, U-Boot would have to set the RK809 DCDC4
154 * devices out in the field, so disable hs200.
155 * mmc-hs200-1_8v;
H A Drk3368-orion-r68-meta.dts171 mmc-hs200-1_2v;
172 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/renesas/
H A Drzv2-evk-cn15-emmc.dtso46 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/qcom/
H A Dipq9574-rdp418.dts23 mmc-hs200-1_8v;
H A Dipq5332-rdp474.dts28 mmc-hs200-1_8v;
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs-polarberry.dts67 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/freescale/
H A Dtqmls10xxa.dtsi61 mmc-hs200-1_8v;
H A Ds32g274a-rdb2.dts50 * However, this is not enough to enable HS400 or HS200 modes for eMMC.
H A Dfsl-lx2162a-sr-som.dtsi27 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi152 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
163 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h618-longan-module-3h.dtsi27 mmc-hs200-1_8v;

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