/linux/arch/sh/boards/ |
H A D | board-magicpanelr2.c | 98 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); in setup_port_multiplexing() 99 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); in setup_port_multiplexing() 103 /* B7 GPO(RST4); B6 GPO(RST in setup_port_multiplexing() [all...] |
/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | marvell,armada-98dx3236-pinctrl.txt | 14 mpp0 0 gpo, spi0(mosi), dev(ad8) 16 mpp2 2 gpo, spi0(sck), dev(ad10) 20 mpp6 6 gpo, sd0(clk), dev(a2) 26 mpp12 12 gpo, uart1(txd), uart0(rts), dev(ad14) 30 mpp16 16 gpo, dev(oe) 31 mpp17 17 gpo, dev(clkout) 34 mpp20 20 gpo, dev(we0) 35 mpp21 21 gpo, dev(ad0) 36 mpp22 22 gpo, dev(ad1) 37 mpp23 23 gpo, de [all...] |
H A D | marvell,kirkwood-pinctrl.txt | 25 mpp1 1 gpo, nand(io3), spi(mosi) 26 mpp2 2 gpo, nand(io4), spi(sck) 27 mpp3 3 gpo, nand(io5), spi(miso) 29 mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig) 31 mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig) 36 mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig) 39 mpp12 12 gpo, sdio(clk) 45 mpp18 18 gpo, nand(io0) 46 mpp19 19 gpo, nand(io1) 63 mpp1 1 gpo, nan [all...] |
H A D | marvell,armada-370-pinctrl.txt | 17 mpp1 1 gpo, uart0(txd) 21 mpp5 5 gpo, ge0(txclkout), uart1(txd), spi1(sck), audio(mclk) 23 mpp7 7 gpo, ge0(txd1), tdm(dtx), audio(lrclk) 25 mpp9 9 gpo, ge0(txd3), uart1(txd), sd0(clk), audio(spdifo) 38 mpp17 17 gpo, ge(mdc) 41 mpp20 20 gpo, ge0(txd4), ge1(txd0) 42 mpp21 21 gpo, ge0(txd5), ge1(txd1), uart1(txd) 43 mpp22 22 gpo, ge0(txd6), ge1(txd2), uart0(rts) 44 mpp23 23 gpo, ge0(txd7), ge1(txd3), spi1(mosi) 55 mpp34 34 gpo, de [all...] |
/linux/drivers/gpio/ |
H A D | gpio-bd71815.c | 76 /* BD71815 GPIO is actually GPO */ 97 * Sigh. The BD71815 and BD71817 were originally designed to support two GPO 98 * pins. At some point it was noticed the second GPO pin which is the E5 pin 100 * was decided to not promote this second GPO and the pin is marked as GND in 101 * the datasheet. The functionality is still there though! I guess driving a GPO 104 * controlling this second GPO. It is thus possible this is used in some of the 107 * This driver does not by default support configuring this second GPO 109 * "rohm,enable-hidden-gpo". 119 "rohm,enable-hidden-gpo")) in bd71815_init_valid_mask() 149 * to 1 if "rohm,enable-hidden-gpo" i in gpo_bd71815_probe() [all...] |
H A D | gpio-twl6040.c | 89 twl6040gpo_chip.ngpio = 3; /* twl6040 have 3 GPO */ in gpo_twl6040_probe() 91 twl6040gpo_chip.ngpio = 1; /* twl6041 have 1 GPO */ in gpo_twl6040_probe() 105 MODULE_ALIAS("platform:twl6040-gpo"); 109 .name = "twl6040-gpo", 117 MODULE_DESCRIPTION("GPO interface for TWL6040");
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H A D | gpio-vx855.c | 23 * GPO 0...12 General Purpose Output 76 * 14..26 GPO 0..12 91 /* Real GPO bits cannot be put in output direction */ in vx855gpio_direction_input() 116 /* GPO don't have an input bit, we need to read it in vx855gpio_get() 166 /* True GPO don't need to be switched to output mode, in vx855gpio_direction_output() 183 /* The GPO's are push-pull */ in vx855gpio_set_config() 265 "GPO I/O resource busy, probably claimed by ACPI\n"); in vx855gpio_probe()
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H A D | Kconfig | 1215 tristate "PCA9570 4-Bit I2C GPO expander" 1217 Say yes here to enable the GPO driver for the NXP PCA9570 chip. 1248 tristate "TPIC2810 8-Bit I2C GPO expander" 1250 Say yes here to enable the GPO driver for the TI TPIC2810 chip. 1300 Support for GPO(s) on ROHM BD71815 PMIC. There are two GPOs 1460 tristate "TI LP873X GPO" 1463 This driver supports the GPO on TI Lp873x PMICs. 2 GPOs are present 1599 tristate "TI TPS65086 GPO" 1602 This driver supports the GPO on TI TPS65086x PMICs. 1621 GPIO. It's either a GPO whe [all...] |
/linux/drivers/pinctrl/mvebu/ |
H A D | pinctrl-armada-370.c | 25 MPP_FUNCTION(0x0, "gpo", NULL), 39 MPP_FUNCTION(0x0, "gpo", NULL), 51 MPP_FUNCTION(0x0, "gpo", NULL), 62 MPP_FUNCTION(0x0, "gpo", NULL), 116 MPP_FUNCTION(0x0, "gpo", NULL), 127 MPP_FUNCTION(0x0, "gpo", NULL), 131 MPP_FUNCTION(0x0, "gpo", NULL), 136 MPP_FUNCTION(0x0, "gpo", NULL), 141 MPP_FUNCTION(0x0, "gpo", NULL), 191 MPP_FUNCTION(0x0, "gpo", NUL [all...] |
H A D | pinctrl-armada-xp.c | 353 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 361 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 379 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 404 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 419 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 422 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 432 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 435 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 438 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 441 MPP_VAR_FUNCTION(0x0, "gpo", NUL [all...] |
H A D | pinctrl-kirkwood.c | 40 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 44 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 48 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 59 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 70 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 93 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 107 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 0, 1, 0, 0)), 149 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 153 MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 1, 1, 1, 1)), 259 MPP_VAR_FUNCTION(0x0, "gpo", NUL [all...] |
H A D | pinctrl-mvebu.h | 67 * @flags: (private) flags to store gpi/gpo/gpio capabilities 77 * If name is one of "gpi", "gpo", "gpio" gpio capabilities are
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | ti,tlv320adcx140.yaml | 121 1 - GPIO1 is configured as a general-purpose output (GPO) 161 '^ti,gpo-config-[1-4]$': 165 output pins (GPO). These values are pairs, the first value is for the 169 GPO output configuration can be one of the following: 172 1 - GPOX is configured as a general-purpose output (GPO) 177 GPO output drive configuration for the GPO pins can be one of the following: 205 ti,gpo-config-1 = <0 0>; 206 ti,gpo-config-2 = <0 0>;
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H A D | ti,tlv320adc3xxx.yaml | 85 ti,micbias1-gpo: 95 ti,micbias2-gpo: 128 ti,micbias1-gpo: ['ti,micbias1-vg'] 129 ti,micbias2-gpo: ['ti,micbias2-vg']
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/linux/Documentation/devicetree/bindings/iio/addac/ |
H A D | adi,ad74413r.yaml | 97 adi,gpo-comparator: 100 Whether to configure GPO as a comparator or not. 101 When not configured as a comparator, the GPO will be treated as an 162 adi,gpo-comparator;
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | nuvoton,sgpio.yaml | 20 to 64 output pins, and up to 64 input pins, the pin is only for GPI or GPO. 26 nuvoton,output-ngpios GPIO lines is only for GPO. 58 The numbers of GPIO's exposed. GPIO lines are only for GPO.
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H A D | kontron,sl28cpld-gpio.yaml | 18 output-only (kontron,sl28-gpo) and one input-only (kontron,sl28-gpi). 27 - kontron,sl28cpld-gpo
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H A D | delta,tn48m-gpio.yaml | 22 - delta,tn48m-gpo
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/linux/drivers/pinctrl/nuvoton/ |
H A D | pinctrl-npcm8xx.c | 1295 #define GPI BIT(0) /* Not GPO */ 1296 #define GPO BIT(1) /* Not GPI */ macro 1353 NPCM8XX_PINCFG(42, bmcuart0a, MFSEL1, 9, cp1utxd, MFSEL6, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(2, 4) | GPO), 1354 NPCM8XX_PINCFG(43, uart1, MFSEL1, 10, bmcuart1, MFSEL3, 24, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO), 1355 NPCM8XX_PINCFG(44, hsi1b, MFSEL1, 28, nbu1crts, MFSEL6, 15, jtag2, MFSEL4, 0, tp_jtag3, MFSEL7, 13, j2j3, MFSEL5, 2, GPO), 1356 NPCM8XX_PINCFG(45, hsi1c, MFSEL1, 4, jtag2, MFSEL4, 0, j2j3, MFSEL5, 2, tp_jtag3, MFSEL7, 13, none, NONE, 0, GPO), 1357 NPCM8XX_PINCFG(46, hsi1c, MFSEL1, 4, jtag2, MFSEL4, 0, j2j3, MFSEL5, 2, tp_jtag3, MFSEL7, 13, none, NONE, 0, GPO), 1359 NPCM8XX_PINCFG(48, hsi2a, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO), 1360 NPCM8XX_PINCFG(49, hsi2a, MFSEL1, 11, bmcuart0b, MFSEL4, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO), 1361 NPCM8XX_PINCFG(50, hsi2b, MFSEL1, 29, bu6, MFSEL5, 6, tp_uart, MFSEL7, 12, none, NONE, 0, none, NONE, 0, GPO), [all...] |
/linux/arch/arm/boot/dts/marvell/ |
H A D | kirkwood-lsxl.dtsi | 20 marvell,function = "gpo"; 28 marvell,function = "gpo"; 32 marvell,function = "gpo";
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H A D | kirkwood-openblocks_a7.dts | 92 pmx_gpio_header_gpo: pxm-gpio-header-gpo { 94 marvell,function = "gpo";
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | twl6040.txt | 4 vibra and GPO functionality on OMAP4+ platforms. 13 - #gpio-cells = <1>: twl6040 provides GPO lines.
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H A D | rohm,bd71815-pmic.yaml | 74 rohm,enable-hidden-gpo: 76 The BD71815 has undocumented GPO at pin E5. Pin is marked as GND at the 79 second GPO by defining this property. Dont enable this if you are unsure
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/linux/Documentation/devicetree/bindings/media/i2c/ |
H A D | ti,ds90ub913.yaml | 23 First cell is the GPO pin number, second cell is the flags. The GPO pin
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/linux/Documentation/devicetree/bindings/regulator/ |
H A D | ti,tps65219.yaml | 19 Drop-out Regulators (LDOs), 1 GPIO, 1 GPO, and power-button. 22 Drop-out Regulators (LDOs), 1 GPIO, 1 GPO, and power-button.
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