| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,gic-v3.yaml | 75 - GIC Distributor interface (GICD)
132 Address property. Base address of an alias of the GICD region containing
247 reg = <0x2f000000 0x10000>, // GICD
275 reg = <0x2c010000 0x10000>, // GICD
|
| /linux/arch/arm64/boot/dts/intel/ |
| H A D | keembay-soc.dtsi | 57 reg = <0x0 0x20500000 0x0 0x20000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-ap810-ap0.dtsi | 57 reg = <0x3000000 0x10000>, /* GICD */
|
| H A D | armada-37xx.dtsi | 486 reg = <0x1d00000 0x10000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/cavium/ |
| H A D | thunder2-99xx.dtsi | 66 reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
|
| H A D | thunder-88xx.dtsi | 388 reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
|
| /linux/arch/arm64/include/asm/ |
| H A D | acpi.h | 65 #define CPUIDLE_GICD_CTXT BIT(3) /* GICD */
|
| /linux/Documentation/virt/hyperv/ |
| H A D | vpci.rst | 172 (on x86) or the GICD registers are set (on arm64) to specify
207 stores the allocated SPI in the architectural GICD registers,
|
| /linux/arch/arm64/boot/dts/amd/ |
| H A D | elba.dtsi | 146 reg = <0x0 0x800000 0x0 0x200000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7981b.dtsi | 52 reg = <0 0x0c000000 0 0x40000>, /* GICD */
|
| H A D | mt6779.dtsi | 125 reg = <0 0x0c000000 0 0x40000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/broadcom/bcmbca/ |
| H A D | bcm6856.dtsi | 87 reg = <0x1000 0x1000>, /* GICD */
|
| H A D | bcm6858.dtsi | 105 reg = <0x1000 0x1000>, /* GICD */
|
| /linux/drivers/irqchip/ |
| H A D | irq-gic-v3.c | 1305 pr_crit_once("RSS is required but GICD doesn't support it\n"); in gic_cpu_sys_reg_init()
1906 /* Setup GICD alias regions */ in gic_enable_quirk_nvidia_t241()
2273 /* Also skip GICD, GICC, GICH */ in gic_of_setup_kvm_info()
2317 dist_base = gic_of_iomap(node, 0, "GICD", &res); in gic_of_init()
2662 pr_err("Unable to map GICD registers\n"); in gic_acpi_init()
2665 gic_request_region(dist->base_address, ACPI_GICV3_DIST_MEM_SIZE, "GICD"); in gic_acpi_init()
|
| /linux/arch/arm64/boot/dts/cix/ |
| H A D | sky1.dtsi | 293 reg = <0x0 0x0e010000 0 0x10000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hip05.dtsi | 246 reg = <0x0 0x8d000000 0 0x10000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/arm/ |
| H A D | morello.dtsi | 229 reg = <0x0 0x30000000 0x0 0x10000>, /* GICD */
|
| H A D | fvp-base-revc.dts | 229 reg = <0x0 0x2f000000 0 0x10000>, // GICD
|
| /linux/arch/arm64/boot/dts/nuvoton/ |
| H A D | ma35d1.dtsi | 55 reg = <0x0 0x50801000 0 0x1000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | sc9863a.dtsi | 158 reg = <0x0 0x14000000 0 0x20000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra264.dtsi | 277 reg = <0x00 0x46000000 0x0 0x010000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/amazon/ |
| H A D | alpine-v3.dtsi | 325 reg = <0x0 0xf0800000 0 0x10000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos2200.dtsi | 273 reg = <0x0 0x10200000 0x0 0x10000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | ipq5018.dtsi | 324 reg = <0x0b000000 0x1000>, /* GICD */
|
| /linux/arch/arm64/boot/dts/socionext/ |
| H A D | uniphier-ld11.dtsi | 600 reg = <0x5fe00000 0x10000>, /* GICD */
|