Home
last modified time | relevance | path

Searched +full:gen +full:- +full:2 (Results 1 – 25 of 689) sorted by relevance

12345678910>>...28

/linux/tools/lib/bpf/
H A Dgen_loader.c1 // SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
30 * ctx - bpf program context
31 * stack - bpf program stack
32 * blob - bpf_attr-s, strings, insns, map data.
42 (__s16)(-sizeof(struct loader_stack) + offsetof(struct loader_stack, field))
46 static int blob_fd_array_off(struct bpf_gen *gen, int index) in blob_fd_array_off() argument
48 return gen->fd_array + index * sizeof(int); in blob_fd_array_off()
51 static int realloc_insn_buf(struct bpf_gen *gen, __u32 size) in realloc_insn_buf() argument
53 size_t off = gen->insn_cur - gen->insn_start; in realloc_insn_buf()
56 if (gen->error) in realloc_insn_buf()
[all …]
H A Dbpf_gen_internal.h1 /* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */
55 void bpf_gen__init(struct bpf_gen *gen, int log_level, int nr_progs, int nr_maps);
56 int bpf_gen__finish(struct bpf_gen *gen, int nr_progs, int nr_maps);
57 void bpf_gen__free(struct bpf_gen *gen);
58 void bpf_gen__load_btf(struct bpf_gen *gen, const void *raw_data, __u32 raw_size);
59 void bpf_gen__map_create(struct bpf_gen *gen,
63 void bpf_gen__prog_load(struct bpf_gen *gen,
67 void bpf_gen__map_update_elem(struct bpf_gen *gen, int map_idx, void *value, __u32 value_size);
68 void bpf_gen__map_freeze(struct bpf_gen *gen, int map_idx);
69 void bpf_gen__record_attach_target(struct bpf_gen *gen, const char *name, enum bpf_attach_type type…
[all …]
/linux/drivers/net/dsa/sja1105/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 This is the driver for the NXP SJA1105 (5-port) and SJA1110 (10-port)
15 - SJA1105E (Gen. 1, No TT-Ethernet)
16 - SJA1105T (Gen. 1, TT-Ethernet)
17 - SJA1105P (Gen. 2, No SGMII, No TT-Ethernet)
18 - SJA1105Q (Gen. 2, No SGMII, TT-Ethernet)
19 - SJA1105R (Gen. 2, SGMII, No TT-Ethernet)
20 - SJA1105S (Gen. 2, SGMII, TT-Ethernet)
21 - SJA1110A (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 10 ports)
22 - SJA1110B (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 9 ports)
[all …]
/linux/arch/x86/lib/
H A Dretpoline.S1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <asm/asm-offsets.h>
10 #include <asm/nospec-branch.h>
64 #define GEN(reg) THUNK reg macro
65 #include <asm/GEN-for-each-reg.h>
66 #undef GEN
71 #define GEN(reg) __EXPORT_THUNK(__x86_indirect_thunk_ ## reg) macro
72 #include <asm/GEN-for-each-reg.h>
73 #undef GEN
93 #define GEN(reg) CALL_THUNK reg macro
[all …]
/linux/sound/hda/codecs/
H A Danalog.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2005-2007 Takashi Iwai <tiwai@suse.de>
31 struct hda_gen_spec gen; member
53 ((spec)->beep_amp = HDA_COMPOSE_AMP_VAL(nid, 1, idx, dir)) /* mono */
61 struct ad198x_spec *spec = codec->spec; in create_beep_ctls()
64 if (!spec->beep_amp) in create_beep_ctls()
67 for (knew = ad_beep_mixer ; knew->name; knew++) { in create_beep_ctls()
72 return -ENOMEM; in create_beep_ctls()
73 kctl->private_value = spec->beep_amp; in create_beep_ctls()
89 !codec->inv_eapd ? 0x00 : 0x02); in ad198x_power_eapd_write()
[all …]
H A Dvia.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * (C) 2006-2009 VIA Technology, Inc.
8 * (C) 2006-2008 Takashi Iwai <tiwai@suse.de>
13 /* 2006-03-03 Lydia Wang Create the basic patch to support VT1708 codec */
14 /* 2006-03-14 Lydia Wang Modify hard code for some pin widget nid */
15 /* 2006-08-02 Lydia Wang Add support to VT1709 codec */
16 /* 2006-09-08 Lydia Wang Fix internal loopback recording source select bug */
17 /* 2007-09-12 Lydia Wang Add EAPD enable during driver initialization */
18 /* 2007-09-17 Lydia Wang Add VT1708B codec support */
19 /* 2007-11-14 Lydia Wang Add VT1708A codec HP and CD pin connect config */
[all …]
/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_drv.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit DRM driver
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 #include <linux/dma-mapping.h>
32 /* -----------------------------------------------------------------------------
37 .gen = 2,
61 .gen = 2,
84 .gen = 2,
105 .port = 2,
112 .gen = 3,
[all …]
H A Drcar_du_group.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit Channels Pair
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 * The R8A7779 DU is split in per-CRTC resources (scan-out engine, blending
12 * unit, timings generator, ...) and device-global resources (start/stop
19 * modeled as a single device with three CRTCs, two sets of "semi-global"
20 * resources, and a few device-global resources.
23 * counterpart in the DU documentation, that models those semi-global resources.
35 return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg); in rcar_du_group_read()
40 rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data); in rcar_du_group_write()
[all …]
/linux/drivers/gpu/drm/vc4/
H A Dvc4_hvs.c1 // SPDX-License-Identifier: GPL-2.0-only
31 #include <soc/bcm2835/raspberrypi-firmware.h>
206 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_dump_state()
207 struct drm_printer p = drm_info_printer(&hvs->pdev->dev); in vc4_hvs_dump_state()
213 drm_print_regset32(&p, &hvs->regset); in vc4_hvs_dump_state()
219 readl((u32 __iomem *)hvs->dlist + i + 0), in vc4_hvs_dump_state()
220 readl((u32 __iomem *)hvs->dlist + i + 1), in vc4_hvs_dump_state()
221 readl((u32 __iomem *)hvs->dlist + i + 2), in vc4_hvs_dump_state()
222 readl((u32 __iomem *)hvs->dlist + i + 3)); in vc4_hvs_dump_state()
230 struct drm_debugfs_entry *entry = m->private; in vc4_hvs_debugfs_underrun()
[all …]
/linux/drivers/rapidio/switches/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "IDT CPS-xx SRIO switches support"
8 Includes support for IDT CPS-16/12/10/8 serial RapidIO switches.
11 tristate "IDT CPS Gen.2 SRIO switch support"
14 Includes support for ITD CPS Gen.2 serial RapidIO switches.
17 tristate "IDT RXS Gen.3 SRIO switch support"
20 Includes support for ITD RXS Gen.3 serial RapidIO switches.
/linux/arch/x86/events/intel/
H A Duncore_snb.c1 // SPDX-License-Identifier: GPL-2.0
162 #define SNB_UNC_GLOBAL_CTL_CORE_ALL ((1 << 4) - 1)
181 #define NHM_UNC_GLOBAL_CTL_EN_PC_ALL ((1ULL << 8) - 1)
190 #define SKL_UNC_GLOBAL_CTL_CORE_ALL ((1 << 5) - 1)
248 DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");
249 DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
250 DEFINE_UNCORE_FORMAT_ATTR(chmask, chmask, "config:8-11");
253 DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28");
254 DEFINE_UNCORE_FORMAT_ATTR(cmask8, cmask, "config:24-31");
255 DEFINE_UNCORE_FORMAT_ATTR(threshold, threshold, "config:24-29");
[all …]
/linux/tools/bpf/bpftool/Documentation/
H A Dbpftool-gen.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 bpftool-gen
6 -------------------------------------------------------------------------------
7 tool for BPF code-generation
8 -------------------------------------------------------------------------------
17 **bpftool** [*OPTIONS*] **gen** *COMMAND*
19 *OPTIONS* := { |COMMON_OPTIONS| | { **-L** | **--use-loader** } }
23 GEN COMMANDS
26 | **bpftool** **gen object** *OUTPUT_FILE* *INPUT_FILE* [*INPUT_FILE*...]
27 | **bpftool** **gen skeleton** *FILE* [**name** *OBJECT_NAME*]
[all …]
/linux/drivers/net/wireless/realtek/rtw89/
H A Dpci_be.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
24 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_aspm_set_be()
25 struct pci_dev *pdev = rtwpci->pdev; in rtw89_pci_aspm_set_be()
80 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_set_io_rcy_be()
84 if (info->io_rcy_en == MAC_AX_PCIE_ENABLE) { in rtw89_pci_set_io_rcy_be()
85 val32 = info->io_rcy_tmr == MAC_AX_IO_RCY_ANA_TMR_DEF ? in rtw89_pci_set_io_rcy_be()
86 PL0_TMR_ANA_172US : info->io_rcy_tmr; in rtw89_pci_set_io_rcy_be()
98 val32 = info->io_rcy_tmr == MAC_AX_IO_RCY_ANA_TMR_DEF ? in rtw89_pci_set_io_rcy_be()
99 PL0_TMR_MAC_1MS : info->io_rcy_tmr; in rtw89_pci_set_io_rcy_be()
104 val32 = info->io_rcy_tmr == MAC_AX_IO_RCY_ANA_TMR_DEF ? in rtw89_pci_set_io_rcy_be()
[all …]
/linux/drivers/phy/st/
H A Dphy-miphy28lp.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <dt-bindings/phy/phy.h>
31 #define RST_MACRO_SW BIT(2)
35 #define RST_COMP_SW BIT(2)
40 #define HFC_PLL BIT(2)
43 #define TERM_EN_SW BIT(2)
55 #define SSC_EN_SW BIT(2)
61 #define TX_SPDSEL_20DEC 2
63 #define RX_SPDSEL_40DEC (1 << 2)
64 #define RX_SPDSEL_20DEC (2 << 2)
[all …]
/linux/drivers/base/firmware_loader/builtin/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += main.o
4 # Create $(fwdir) from $(CONFIG_EXTRA_FIRMWARE_DIR) -- if it doesn't have a
7 fwdir := $(addprefix $(srctree)/,$(filter-out /%,$(fwdir)))$(filter /%,$(fwdir))
9 firmware := $(addsuffix .gen.o, $(CONFIG_EXTRA_FIRMWARE))
10 obj-y += $(firmware)
12 FWNAME = $(patsubst $(obj)/%.gen.S,%,$@)
13 FWSTR = $(subst $(comma),_,$(subst /,_,$(subst .,_,$(subst -,_,$(FWNAME)))))
15 ASM_ALIGN = $(if $(CONFIG_64BIT),3,2)
33 echo " $(ASM_WORD) _fw_end - _fw_$(FWSTR)_bin"
[all …]
/linux/fs/bcachefs/
H A Dalloc_background_format.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 __u8 gen; member
31 __u8 gen; member
50 __u8 gen; member
57 LE32_BITMASK(BCH_ALLOC_V3_NEED_INC_GEN,struct bch_alloc_v3, flags, 1, 2)
63 __u8 gen; member
69 __u64 io_time[2];
82 BITMASK(BCH_ALLOC_V4_NEED_INC_GEN, struct bch_alloc_v4, flags, 1, 2)
83 BITMASK(BCH_ALLOC_V4_BACKPOINTERS_START,struct bch_alloc_v4, flags, 2, 8)
88 #define KEY_TYPE_BUCKET_GENS_MASK (KEY_TYPE_BUCKET_GENS_NR - 1)
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173-elm-hana.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "mt8173-elm.dtsi"
9 clock-frequency = <200000>;
16 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;
17 status = "fail-needs-probe";
21 * Lenovo 100e Chromebook 2nd Gen (MTK) and Lenovo 300e Chromebook 2nd
22 * Gen (MTK) are using synaptics touchscreen (hid-over-i2c driver) as a
26 compatible = "hid-over-i2c";
28 hid-descr-addr = <0x0020>;
29 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;
[all …]
/linux/drivers/gpu/drm/i915/
H A Di915_pci.c41 __diag_ignore_all("-Woverride-init", "Allow field initialization overrides for device info");
44 #define GEN(x) \ macro
52 [I915_CACHE_L3_LLC] = 2, \
61 [I915_CACHE_WT] = 2, \
66 [I915_CACHE_NONE] = 2, \
72 /* Keep in gen based order, and chronological order within a gen */
81 GEN(2), \
97 GEN(2), \
132 GEN(3), \
195 GEN(4), \
[all …]
/linux/drivers/net/vmxnet3/
H A Dvmxnet3_defs.h4 * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved.
8 * Free Software Foundation; version 2 of the License and no later version.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-drivers@vmware.com
57 VMXNET3_REG_RXPROD2 = 0xA00 /* Rx Producer Index for ring 2 */
64 VMXNET3_REG_LB_RXPROD2 = 0x1800, /* Rx Producer Index for ring 2 */
73 #define VMXNET3_REG_ALIGN 8 /* All registers are 8-byte aligned. */
133 * Little Endian layout of bitfields -
135 * Byte 1 : oco gen 13.len.8
136 * Byte 2 : 5.msscof.0 ext1 dtype
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dsge.c2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
6 * General Public License (GPL) Version 2, available from the file
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
38 #include <linux/dma-mapping.h>
137 * This structure lives at skb->head and must be allocated by callers.
148 * desc = 1 + (flits - 2) / (WR_FLITS - 1).
156 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
159 #elif SGE_NUM_GENBITS == 2
161 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
[all …]
/linux/sound/hda/codecs/cirrus/
H A Dcs420x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Cirrus Logic CS420x HD-audio codec
21 struct hda_gen_spec gen; member
52 /* Vendor-specific processing widget */
65 * 1 = digital immediate, analog zero-cross
66 * 2 = digtail & analog soft-ramp
67 * 3 = digital soft-ramp, analog zero-cross
71 #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
72 /* PGA mode: 0 = differential, 1 = signle-ended */
74 #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
[all …]
/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_drv.c1 // SPDX-License-Identifier: GPL-2.0+
3 * vsp1_drv.c -- R-Car VSP1 Driver
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
21 #include <media/rcar-fcp.h>
22 #include <media/v4l2-subdev.h>
44 /* -----------------------------------------------------------------------------
57 for (i = 0; i < vsp1->info->wpf_count; ++i) { in vsp1_irq_handler()
58 struct vsp1_rwpf *wpf = vsp1->wpf[i]; in vsp1_irq_handler()
66 if ((status & VI6_WPF_IRQ_STA_UND) && wpf->entity.pipe) { in vsp1_irq_handler()
67 wpf->entity.pipe->underrun_count++; in vsp1_irq_handler()
[all …]
/linux/include/uapi/sound/
H A Dscarlett2.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Focusrite Scarlett 2 Protocol Driver for ALSA
4 * (including Scarlett 2nd Gen, 3rd Gen, 4th Gen, Clarett USB, and
37 #define SCARLETT2_SEGMENT_ID_COUNT 2
/linux/Documentation/mm/
H A Dmultigen_lru.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Gen LRU
6 The multi-gen LRU is an alternative LRU implementation that optimizes
14 ----------
20 * Simple self-correcting heuristics
23 implementations. In the multi-gen LRU, each generation represents a
25 (time-based) common frame of reference and therefore help make better
41 choices; thus self-correction is necessary.
43 The benefits of simple self-correcting heuristics are self-evident.
51 -----------
[all …]
/linux/drivers/clk/tegra/
H A Dclk-tegra-super-gen4.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
15 #include "clk-id.h"
36 enum tegra_super_gen gen; member
60 .gen = gen4,
86 .gen = gen5,
106 gen_info->sclk_parents, in tegra_sclk_init()
107 gen_info->num_sclk_parents, in tegra_sclk_init()
128 gen_info->sclk_parents, in tegra_sclk_init()
129 gen_info->num_sclk_parents, in tegra_sclk_init()
[all …]

12345678910>>...28