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/linux/drivers/vdpa/vdpa_user/
H A Diova_domain.c20 static int vduse_iotlb_add_range(struct vduse_iova_domain *domain, in vduse_iotlb_add_range() argument
35 ret = vhost_iotlb_add_range_ctx(domain->iotlb, start, last, in vduse_iotlb_add_range()
45 static void vduse_iotlb_del_range(struct vduse_iova_domain *domain, in vduse_iotlb_del_range() argument
51 while ((map = vhost_iotlb_itree_first(domain->iotlb, start, last))) { in vduse_iotlb_del_range()
55 vhost_iotlb_map_free(domain->iotlb, map); in vduse_iotlb_del_range()
59 int vduse_domain_set_map(struct vduse_iova_domain *domain, in vduse_domain_set_map() argument
67 spin_lock(&domain->iotlb_lock); in vduse_domain_set_map()
68 vduse_iotlb_del_range(domain, start, last); in vduse_domain_set_map()
73 ret = vduse_iotlb_add_range(domain, map->start, map->last, in vduse_domain_set_map()
80 spin_unlock(&domain->iotlb_lock); in vduse_domain_set_map()
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/linux/drivers/scsi/elx/libefc/
H A Defc_domain.c8 * domain_sm Domain State Machine: States
17 struct efc_domain *domain = NULL; in efc_domain_cb() local
22 domain = data; in efc_domain_cb()
24 /* Accept domain callback events from the user driver */ in efc_domain_cb()
34 efc_log_debug(efc, "Domain found: wwn %016llX\n", fcf_wwn); in efc_domain_cb()
36 /* lookup domain, or allocate a new one */ in efc_domain_cb()
37 domain = efc->domain; in efc_domain_cb()
38 if (!domain) { in efc_domain_cb()
39 domain = efc_domain_alloc(efc, fcf_wwn); in efc_domain_cb()
40 if (!domain) { in efc_domain_cb()
[all …]
H A Defc_cmds.c132 nport->indicator, nport->domain->indicator); in efc_nport_alloc_init_vpi()
207 struct efc_domain *domain, u8 *wwpn) in efc_cmd_nport_alloc() argument
227 if (domain) { in efc_cmd_nport_alloc()
237 /* domain NULL and wwpn non-NULL */ in efc_cmd_nport_alloc()
278 nport->domain->indicator, false); in efc_cmd_nport_attach()
317 efc_domain_get_mbox_status(struct efc_domain *domain, u8 *mqe, int status) in efc_domain_get_mbox_status() argument
319 struct efc *efc = domain->efc; in efc_domain_get_mbox_status()
325 domain->indicator, status, in efc_domain_get_mbox_status()
334 efc_domain_free_resources(struct efc_domain *domain, int evt, void *data) in efc_domain_free_resources() argument
336 struct efc *efc = domain->efc; in efc_domain_free_resources()
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/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,imx8-acm.yaml64 - description: power domain of IMX_SC_R_AUDIO_CLK_0
65 - description: power domain of IMX_SC_R_AUDIO_CLK_1
66 - description: power domain of IMX_SC_R_MCLK_OUT_0
67 - description: power domain of IMX_SC_R_MCLK_OUT_1
68 - description: power domain of IMX_SC_R_AUDIO_PLL_0
69 - description: power domain of IMX_SC_R_AUDIO_PLL_1
70 - description: power domain of IMX_SC_R_ASRC_0
71 - description: power domain of IMX_SC_R_ASRC_1
72 - description: power domain of IMX_SC_R_ESAI_0
73 - description: power domain of IMX_SC_R_SAI_0
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/linux/drivers/gpu/drm/xe/
H A Dxe_force_wake.c34 struct xe_force_wake_domain *domain = &fw->domains[id]; in init_domain() local
36 domain->id = id; in init_domain()
37 domain->reg_ctl = reg; in init_domain()
38 domain->reg_ack = ack; in init_domain()
39 domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL); in init_domain()
40 domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL); in init_domain()
96 static void __domain_ctl(struct xe_gt *gt, struct xe_force_wake_domain *domain, bool wake) in __domain_ctl() argument
101 xe_mmio_write32(&gt->mmio, domain->reg_ctl, domain->mask | (wake ? domain->val : 0)); in __domain_ctl()
104 static int __domain_wait(struct xe_gt *gt, struct xe_force_wake_domain *domain, bool wake) in __domain_wait() argument
112 ret = xe_mmio_wait32(&gt->mmio, domain->reg_ack, domain->val, wake ? domain->val : 0, in __domain_wait()
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/linux/drivers/pmdomain/imx/
H A Dimx93-pd.c37 struct imx93_power_domain *domain = to_imx93_pd(genpd); in imx93_pd_on() local
38 void __iomem *addr = domain->addr; in imx93_pd_on()
42 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); in imx93_pd_on()
44 dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name); in imx93_pd_on()
55 dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val); in imx93_pd_on()
64 struct imx93_power_domain *domain = to_imx93_pd(genpd); in imx93_pd_off() local
65 void __iomem *addr = domain->addr; in imx93_pd_off()
77 dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val); in imx93_pd_off()
81 clk_bulk_disable_unprepare(domain->num_clks, domain->clks); in imx93_pd_off()
88 struct imx93_power_domain *domain = platform_get_drvdata(pdev); in imx93_pd_remove() local
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H A Dgpcv2.c318 struct imx_pgc_domain *domain = to_imx_pgc_domain(genpd); in imx_pgc_power_up() local
322 ret = pm_runtime_get_sync(domain->dev); in imx_pgc_power_up()
324 pm_runtime_put_noidle(domain->dev); in imx_pgc_power_up()
328 if (!IS_ERR(domain->regulator)) { in imx_pgc_power_up()
329 ret = regulator_enable(domain->regulator); in imx_pgc_power_up()
331 dev_err(domain->dev, in imx_pgc_power_up()
338 reset_control_assert(domain->reset); in imx_pgc_power_up()
340 /* Enable reset clocks for all devices in the domain */ in imx_pgc_power_up()
341 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); in imx_pgc_power_up()
343 dev_err(domain->dev, "failed to enable reset clocks\n"); in imx_pgc_power_up()
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H A Dgpc.c71 /* Gate off domain when powered down */ in imx6_pm_domain_power_off()
75 /* Request GPC to power down domain */ in imx6_pm_domain_power_off()
103 /* Enable reset clocks for all devices in the domain */ in imx6_pm_domain_power_on()
107 /* Gate off domain when powered down */ in imx6_pm_domain_power_on()
111 /* Request GPC to power up domain */ in imx6_pm_domain_power_on()
119 pr_err("powerup request on domain %s timed out\n", genpd->name); in imx6_pm_domain_power_on()
124 /* Disable reset clocks for all devices in the domain */ in imx6_pm_domain_power_on()
131 static int imx_pgc_get_clocks(struct device *dev, struct imx_pm_domain *domain) in imx_pgc_get_clocks() argument
144 domain->clk[i] = clk; in imx_pgc_get_clocks()
146 domain->num_clks = i; in imx_pgc_get_clocks()
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/linux/include/linux/
H A Dirqdomain.h5 * See Documentation/core-api/irq/irq-domain.rst for the details.
53 * @match: Match an interrupt controller device node to a domain, returns
113 * @name: Name of interrupt domain
119 * @mutex: Domain lock, hierarchical domains use root domain's lock
120 * @root: Pointer to root domain, or containing structure if non-hierarchical
135 * purposes related to the irq domain.
137 * @msi_parent_ops: Pointer to MSI parent domain methods for per device domain init
138 * @exit: Function called when the domain is destroyed
140 * Revmap data, used internally by the irq domain code:
178 /* Irq domain flags */
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/linux/Documentation/devicetree/bindings/power/
H A Dmediatek,power-controller.yaml17 IP cores belonging to a power domain should contain a 'power-domains'
18 property that is a phandle for SCPSYS node representing the domain.
38 '#power-domain-cells':
48 "^power-domain@[0-9a-f]+$":
49 $ref: "#/$defs/power-domain-node"
51 "^power-domain@[0-9a-f]+$":
52 $ref: "#/$defs/power-domain-node"
54 "^power-domain@[0-9a-f]+$":
55 $ref: "#/$defs/power-domain-node"
57 "^power-domain@[0-9a-f]+$":
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/linux/drivers/iommu/intel/
H A Dcache.c42 /* Assign a cache tag with specified type to domain. */
43 int cache_tag_assign(struct dmar_domain *domain, u16 did, struct device *dev, in cache_tag_assign() argument
67 spin_lock_irqsave(&domain->cache_lock, flags); in cache_tag_assign()
68 prev = &domain->cache_tags; in cache_tag_assign()
69 list_for_each_entry(temp, &domain->cache_tags, node) { in cache_tag_assign()
72 spin_unlock_irqrestore(&domain->cache_lock, flags); in cache_tag_assign()
86 spin_unlock_irqrestore(&domain->cache_lock, flags); in cache_tag_assign()
92 /* Unassign a cache tag with specified type from domain. */
93 static void cache_tag_unassign(struct dmar_domain *domain, u16 did, in cache_tag_unassign() argument
102 spin_lock_irqsave(&domain->cache_lock, flags); in cache_tag_unassign()
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H A Dnested.c21 static int intel_nested_attach_dev(struct iommu_domain *domain, in intel_nested_attach_dev() argument
25 struct dmar_domain *dmar_domain = to_dmar_domain(domain); in intel_nested_attach_dev()
38 * Stage-1 domain cannot work alone, it is nested on a s2_domain. in intel_nested_attach_dev()
42 ret = paging_domain_compatible(&dmar_domain->s2_domain->domain, dev); in intel_nested_attach_dev()
44 dev_err_ratelimited(dev, "s2 domain is not compatible\n"); in intel_nested_attach_dev()
50 dev_err_ratelimited(dev, "Failed to attach domain to iommu\n"); in intel_nested_attach_dev()
58 ret = iopf_for_domain_set(domain, dev); in intel_nested_attach_dev()
67 info->domain = dmar_domain; in intel_nested_attach_dev()
75 iopf_for_domain_remove(domain, dev); in intel_nested_attach_dev()
84 static void intel_nested_domain_free(struct iommu_domain *domain) in intel_nested_domain_free() argument
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H A Dsvm.c55 struct dmar_domain *domain = container_of(mn, struct dmar_domain, notifier); in intel_arch_invalidate_secondary_tlbs() local
58 cache_tag_flush_all(domain); in intel_arch_invalidate_secondary_tlbs()
67 cache_tag_flush_range(domain, start, end - 1, 0); in intel_arch_invalidate_secondary_tlbs()
72 struct dmar_domain *domain = container_of(mn, struct dmar_domain, notifier); in intel_mm_release() local
89 spin_lock_irqsave(&domain->lock, flags); in intel_mm_release()
90 list_for_each_entry(dev_pasid, &domain->dev_pasids, link_domain) { in intel_mm_release()
95 spin_unlock_irqrestore(&domain->lock, flags); in intel_mm_release()
101 struct dmar_domain *domain = container_of(mn, struct dmar_domain, notifier); in intel_mm_free_notifier() local
103 kfree(domain->qi_batch); in intel_mm_free_notifier()
104 kfree(domain); in intel_mm_free_notifier()
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/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk-clocks.dtsi59 reg-names = "control", "domain";
60 domain-id = <0>;
69 reg-names = "control", "domain";
70 domain-id = <4>;
79 reg-names = "control", "domain";
80 domain-id = <5>;
89 reg-names = "control", "domain";
90 domain-id = <9>;
99 reg-names = "control", "domain";
100 domain-id = <10>;
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H A Dkeystone-k2l-clocks.dtsi49 reg-names = "control", "domain";
51 domain-id = <0>;
60 reg-names = "control", "domain";
61 domain-id = <4>;
70 reg-names = "control", "domain";
71 domain-id = <9>;
80 reg-names = "control", "domain";
81 domain-id = <10>;
90 reg-names = "control", "domain";
91 domain-id = <11>;
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/linux/Documentation/scheduler/
H A Dsched-stats.rst8 'lb_imbalance_misfit'. The domain field prints the name of the
9 corresponding sched domain from this version onwards.
26 per-domain. Note that domains (and their associated information) will only
29 In version 14 of schedstat, there is at least one level of domain
31 domain. Domains have no particular names in this implementation, but
33 cpus on the machine, while domain0 is the most tightly focused domain,
35 are no architectures which need more than three domain levels. The first
36 field in the domain stats is a bit map indicating which cpus are affected
37 by that domain. Details are available at
85 Domain statistics
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/linux/drivers/pmdomain/xilinx/
H A Dzynqmp-pm-domains.c3 * ZynqMP Generic PM domain support
28 * @gpd: Generic power domain
29 * @node_id: PM node ID corresponding to device inside PM domain
30 * @requested: The PM node mapped to the PM domain has been requested
65 * zynqmp_gpd_power_on() - Power on PM domain
66 * @domain: Generic PM domain
68 * This function is called before devices inside a PM domain are resumed, to
69 * power on PM domain.
73 static int zynqmp_gpd_power_on(struct generic_pm_domain *domain) in zynqmp_gpd_power_on() argument
75 struct zynqmp_pm_domain *pd = to_zynqmp_pm_domain(domain); in zynqmp_gpd_power_on()
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/linux/kernel/irq/
H A Dmsi.c41 * @domid: ID of the domain on which management operations should be done
56 /* The maximum domain size */
62 static int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
145 * @domid: The id of the interrupt domain to which the desriptor is added
186 (dev->msi.domain && in msi_ctrl_valid()
187 !dev->msi.data->__domains[ctrl->domid].domain))) in msi_ctrl_valid()
223 * @domid: Id of the domain to operate on
332 * If @dev::msi::domain is set and is a global MSI domain, copy the in msi_setup_device_data()
333 * pointer into the domain array so all code can operate on domain in msi_setup_device_data()
337 if (dev->msi.domain && !irq_domain_is_msi_parent(dev->msi.domain)) in msi_setup_device_data()
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/linux/drivers/irqchip/
H A Dirq-msi-lib.c10 * msi_lib_init_dev_msi_info - Domain info setup for MSI domains
11 * @dev: The device for which the domain is created for
12 * @domain: The domain providing this callback
13 * @real_parent: The real parent domain of the domain to be initialized
14 * which might be a domain built on top of @domain or
15 * @domain itself
16 * @info: The domain info for the domain to be initialize
19 * parent domain and any intermediates. The topmost parent domain specific
22 * All intermediate domains between the root and the device domain must
26 bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain, in msi_lib_init_dev_msi_info() argument
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/linux/include/linux/sched/
H A Dsd_flags.h13 * SHARED_CHILD: These flags are meant to be set from the base domain upwards.
14 * If a domain has this flag set, all of its children should have it set. This
16 * domain share the same resource), or because they are tied to a scheduling
20 * In those cases it doesn't make sense to have the flag set for a domain but
26 * SHARED_PARENT: These flags are meant to be set from the highest domain
27 * downwards. If a domain has this flag set, all of its parents should have it
29 * certain level (e.g. domain starts spanning CPUs outside of the base CPU's
38 * NEEDS_GROUPS: These flags are only relevant if the domain they are set on has
48 * SHARED_CHILD: Set from the base domain up to cpuset.sched_relax_domain_level.
56 * SHARED_CHILD: Set from the base domain up to the NUMA reclaim level.
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/linux/net/netlabel/
H A Dnetlabel_domainhash.c3 * NetLabel Domain Hash Table
5 * This file manages the domain hash table that NetLabel uses to determine
6 * which network labeling protocol to use for a given domain. The NetLabel
40 /* Domain hash table */
51 * Domain Hash Table Helper Functions
55 * netlbl_domhsh_free_entry - Frees a domain hash table entry
90 kfree(ptr->domain); in netlbl_domhsh_free_entry()
95 * netlbl_domhsh_hash - Hashing function for the domain hash table
96 * @key: the domain name to hash
99 * This is the hashing function for the domain hash table, it returns the
[all …]
/linux/drivers/iommu/
H A Dipmmu-vmsa.c211 static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_read_root() argument
214 return ipmmu_ctx_read(domain->mmu->root, domain->context_id, reg); in ipmmu_ctx_read_root()
217 static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_write_root() argument
220 ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data); in ipmmu_ctx_write_root()
223 static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain, in ipmmu_ctx_write_all() argument
226 if (domain->mmu != domain->mmu->root) in ipmmu_ctx_write_all()
227 ipmmu_ctx_write(domain->mmu, domain->context_id, reg, data); in ipmmu_ctx_write_all()
229 ipmmu_ctx_write(domain->mmu->root, domain->context_id, reg, data); in ipmmu_ctx_write_all()
254 static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain) in ipmmu_tlb_sync() argument
260 false, domain, IMCTR)) in ipmmu_tlb_sync()
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/linux/drivers/dca/
H A Ddca-core.c45 struct dca_domain *domain; in dca_allocate_domain() local
47 domain = kzalloc(sizeof(*domain), GFP_NOWAIT); in dca_allocate_domain()
48 if (!domain) in dca_allocate_domain()
51 INIT_LIST_HEAD(&domain->dca_providers); in dca_allocate_domain()
52 domain->pci_rc = rc; in dca_allocate_domain()
54 return domain; in dca_allocate_domain()
57 static void dca_free_domain(struct dca_domain *domain) in dca_free_domain() argument
59 list_del(&domain->node); in dca_free_domain()
60 kfree(domain); in dca_free_domain()
82 struct dca_domain *domain; in unregister_dca_providers() local
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/linux/Documentation/devicetree/bindings/dvfs/
H A Dperformance-domain.yaml4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
14 CPUs that run in the same performance domain. Performance domains must not
15 be confused with power domains. A performance domain is defined by a set
17 performance domain, there is a single point of control that affects all the
18 devices in the domain, making it impossible to set the performance level of
19 an individual device in the domain independently from other devices in
20 that domain. For example, a set of CPUs that share a voltage domain, and
22 domain.
24 This device tree binding can be used to bind performance domain consumer
25 devices with their performance domains provided by performance domain
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/linux/arch/arm64/boot/dts/apple/
H A Ds8001-pmgr.dtsi12 #power-domain-cells = <0>;
21 #power-domain-cells = <0>;
30 #power-domain-cells = <0>;
39 #power-domain-cells = <0>;
47 #power-domain-cells = <0>;
56 #power-domain-cells = <0>;
65 #power-domain-cells = <0>;
74 #power-domain-cells = <0>;
82 #power-domain-cells = <0>;
90 #power-domain-cells = <0>;
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