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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadf4371.yaml33 Must be "clkin" if the input reference is single ended or "clkin-diff"
35 enum: [clkin, clkin-diff]
66 clock-names = "clkin";
H A Dadi,adf4350.yaml26 description: Clock to provide CLKIN reference clock signal.
29 const: clkin
190 clock-names = "clkin";
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_pll.c46 unsigned long clkin; in hdmi_pll_compute() local
49 clkin = clk_get_rate(pll->pll.clkin); in hdmi_pll_compute()
51 DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds); in hdmi_pll_compute()
56 n = DIV_ROUND_UP(clkin, hw->fint_max); in hdmi_pll_compute()
57 fint = clkin / n; in hdmi_pll_compute()
186 pll->clkin = clk; in dsi_init_pll_data()
H A Dpll.c72 r = clk_prepare_enable(pll->clkin); in dss_pll_enable()
92 clk_disable_unprepare(pll->clkin); in dss_pll_enable()
103 clk_disable_unprepare(pll->clkin); in dss_pll_disable()
146 bool dss_pll_calc(const struct dss_pll *pll, unsigned long clkin, in dss_pll_calc() argument
162 n_start = max(DIV_ROUND_UP(clkin, fint_hw_max), 1ul); in dss_pll_calc()
163 n_stop = min((unsigned)(clkin / fint_hw_min), hw->n_max); in dss_pll_calc()
168 fint = clkin / n; in dss_pll_calc()
H A Dvideo-pll.c154 /* CLKIN */ in dss_video_pll_init()
158 DSSERR("can't get video pll clkin\n"); in dss_video_pll_init()
173 pll->clkin = clk; in dss_video_pll_init()
/linux/drivers/iio/filter/
H A Dadmv8818.c98 struct clk *clkin; member
298 st->cf_hz = clk_get_rate(st->clkin); in admv8818_rfin_band_select()
529 if (!st->clkin) { in admv8818_set_mode()
549 ret = clk_prepare_enable(st->clkin); in admv8818_set_mode()
553 ret = clk_notifier_register(st->clkin, &st->nb); in admv8818_set_mode()
555 clk_disable_unprepare(st->clkin); in admv8818_set_mode()
564 clk_disable_unprepare(st->clkin); in admv8818_set_mode()
566 ret = clk_notifier_unregister(st->clkin, &st->nb); in admv8818_set_mode()
646 clk_notifier_unregister(st->clkin, &st->nb); in admv8818_clk_notifier_unreg()
654 clk_disable_unprepare(st->clkin); in admv8818_clk_disable()
[all...]
/linux/drivers/gpu/drm/omapdrm/dss/
H A Dpll.c127 r = clk_prepare_enable(pll->clkin); in dss_pll_enable()
147 clk_disable_unprepare(pll->clkin); in dss_pll_enable()
158 clk_disable_unprepare(pll->clkin); in dss_pll_disable()
202 * clkdco = clkin / n * m * 2
205 bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, in dss_pll_calc_a() argument
221 n_start = max(DIV_ROUND_UP(clkin, fint_hw_max), 1ul); in dss_pll_calc_a()
222 n_stop = min((unsigned)(clkin / fint_hw_min), hw->n_max); in dss_pll_calc_a()
236 fint = clkin / n; in dss_pll_calc_a()
269 * clkdco = clkin / n * m + clkin /
272 dss_pll_calc_b(const struct dss_pll * pll,unsigned long clkin,unsigned long target_clkout,struct dss_pll_clock_info * cinfo) dss_pll_calc_b() argument
[all...]
H A Dvideo-pll.c158 /* CLKIN */ in dss_video_pll_init()
162 DSSERR("can't get video pll clkin\n"); in dss_video_pll_init()
177 pll->clkin = clk; in dss_video_pll_init()
/linux/drivers/net/phy/
H A Dxilinx_gmii2rgmii.c90 struct clk *clkin; in xgmiitorgmii_probe() local
96 clkin = devm_clk_get_optional_enabled(dev, NULL); in xgmiitorgmii_probe()
97 if (IS_ERR(clkin)) in xgmiitorgmii_probe()
98 return dev_err_probe(dev, PTR_ERR(clkin), in xgmiitorgmii_probe()
/linux/drivers/iio/frequency/
H A Dadf4350.c43 unsigned long clkin; member
134 st->fpfd = (st->clkin * (pdata->ref_doubler_en ? 2 : 1)) / in adf4350_tune_r_cnt()
291 st->clkin = readin; in adf4350_write()
340 st->clkin = clk_get_rate(st->clk); in adf4350_read()
342 val = st->clkin; in adf4350_read()
418 st->clkin = parent_rate; in adf4350_clk_set_rate()
614 if (!pdata->clkin) { in adf4350_probe()
615 clk = devm_clk_get_enabled(&spi->dev, "clkin"); in adf4350_probe()
644 st->clkin = clk_get_rate(clk); in adf4350_probe()
646 st->clkin in adf4350_probe()
[all...]
H A Dadf4371.c579 struct clk *clkin; in adf4371_probe() local
608 clkin = devm_clk_get_enabled(&spi->dev, "clkin"); in adf4371_probe()
609 if (IS_ERR(clkin)) { in adf4371_probe()
610 clkin = devm_clk_get_enabled(&spi->dev, "clkin-diff"); in adf4371_probe()
611 if (IS_ERR(clkin)) in adf4371_probe()
612 return dev_err_probe(&spi->dev, PTR_ERR(clkin), in adf4371_probe()
613 "Failed to get clkin/clkin in adf4371_probe()
[all...]
H A Dadmv1014.c121 struct clk *clkin; member
223 u64 rate = clk_get_rate(st->clkin); in admv1014_update_quad_filters()
625 ret = clk_prepare_enable(st->clkin); in admv1014_init()
629 ret = devm_add_action_or_reset(&spi->dev, admv1014_clk_disable, st->clkin); in admv1014_init()
634 ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb); in admv1014_init()
747 st->clkin = devm_clk_get(&spi->dev, "lo_in"); in admv1014_properties_parse()
748 if (IS_ERR(st->clkin)) in admv1014_properties_parse()
749 return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), in admv1014_properties_parse()
H A Dadmv1013.c95 struct clk *clkin; member
328 u64 rate = clk_get_rate(st->clkin); in admv1013_update_quad_filters()
591 st->clkin = devm_clk_get_enabled(&spi->dev, "lo_in"); in admv1013_probe()
592 if (IS_ERR(st->clkin)) in admv1013_probe()
593 return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), in admv1013_probe()
597 ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb); in admv1013_probe()
/linux/Documentation/devicetree/bindings/regulator/
H A Drenesas,raa215300.yaml46 provided(either xin or clkin).
52 Use clkin, if connected to an external clock signal.
55 - clkin
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dti,ds90ub913.yaml32 Reference clock connected to the CLKIN pin.
36 - const: clkin
91 clock-names = "clkin";
H A Dti,ds90ub953.yaml32 Reference clock connected to the CLKIN pin.
36 - const: clkin
/linux/include/linux/platform_data/
H A Dsi5351.h13 * @SI5351_PLL_SRC_CLKIN: pll source clock is CLKIN input (Si5351C only)
40 * @SI5351_CLKOUT_SRC_CLKIN: clkout N source clock is CLKIN (Si5351C only)
106 * @clk_clkin: clkin input clock
/linux/Documentation/devicetree/bindings/iio/adc/
H A Damlogic,meson-saradc.yaml46 - const: clkin
139 clock-names = "clkin", "core", "adc_clk", "adc_sel";
147 clock-names = "clkin", "core";
/linux/arch/arm/mach-davinci/
H A Dclock.h47 * OMAP-L138 system reference guide recommends a wait for 4 OSCIN/CLKIN
49 * ensures we are good for all > 4MHz OSCIN/CLKIN inputs. Typically the input
/linux/Documentation/devicetree/bindings/rtc/
H A Disil,isl1208.yaml34 Use clkin, if connected to an external clock signal.
37 - clkin
/linux/Documentation/devicetree/bindings/mmc/
H A Damlogic,meson-mx-sdio.yaml42 - const: clkin
88 clock-names = "core", "clkin";
/linux/drivers/media/i2c/
H A Dds90ub913.c70 struct clk *clkin; member
658 __clk_get_name(priv->clkin), 0, 1, 2); in ub913_register_clkout()
683 ref = clk_get_rate(priv->clkin) / 2; in ub913_i2c_master_init()
875 priv->clkin = devm_clk_get(dev, "clkin"); in ub913_probe()
876 if (IS_ERR(priv->clkin)) in ub913_probe()
877 return dev_err_probe(dev, PTR_ERR(priv->clkin), in ub913_probe()
878 "Cannot get CLKIN\n"); in ub913_probe()
/linux/Documentation/devicetree/bindings/clock/
H A Dsilabs,si5351.yaml51 - const: clkin
62 - description: PLL source, XTAL (0) or CLKIN (1, Si5351C only).
107 3 - use CLKIN for this output (Si5351C only)
/linux/drivers/clk/
H A Dclk-si5351.c59 struct clk_hw clkin; member
68 "xtal", "clkin"
241 * Si5351 clkin clock input (Si5351C only)
246 container_of(hw, struct si5351_driver_data, clkin); in si5351_clkin_prepare()
255 container_of(hw, struct si5351_driver_data, clkin); in si5351_clkin_unprepare()
263 * If CLKIN is >40MHz, the input divider must be used.
269 container_of(hw, struct si5351_driver_data, clkin); in si5351_clkin_recalc_rate()
290 dev_dbg(&drvdata->client->dev, "%s - clkin div = %d, rate = %lu\n", in si5351_clkin_recalc_rate()
1463 drvdata->pclkin = devm_clk_get(&client->dev, "clkin"); in si5351_i2c_probe()
1471 * VARIANT_C can have CLKIN instea in si5351_i2c_probe()
[all...]
/linux/drivers/thermal/
H A Dsun8i_thermal.c449 * clkin = 24MHz in sun8i_h3_thermal_init()
453 * x = period * clkin / 4096 / filter_samples - 1 in sun8i_h3_thermal_init()
461 * clkin = 24MHz in sun8i_h3_thermal_init()
463 * x = T_acq * clkin - 1 in sun8i_h3_thermal_init()
505 * clkin = 24MHz in sun50i_h6_thermal_init()
509 * x = period * clkin / 4096 / filter_samples - 1 in sun50i_h6_thermal_init()

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