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/linux/Documentation/devicetree/bindings/mmc/
H A Dbrcm,sdhci-brcmstb.yaml90 reg = <0x84b0000 0x260>, <0x84b0300 0x200>;
96 interrupts = <0x0 0x26 0x4>;
105 reg = <0x84b1000 0x26
[all...]
/linux/Documentation/translations/zh_CN/dev-tools/
H A Dkcsan.rst35 write to 0xffffffffc009a628 of 8 bytes by task 487 on cpu 0:
36 test_kernel_write+0x1d/0x30
37 access_thread+0x89/0xd0
38 kthread+0x23e/0x260
39 ret_from_fork+0x2
[all...]
/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_regs.h12 #define GEN12_KCR_BASE 0x32000
13 #define MTL_KCR_BASE 0x386000
16 #define KCR_INIT(base) _MMIO((base) + 0xf0)
21 /* KCR hwdrm session in play status 0-31 */
22 #define KCR_SIP(base) _MMIO((base) + 0x260)
25 #define KCR_GLOBAL_TERMINATE(base) _MMIO((base) + 0xf8)
/linux/drivers/media/platform/mediatek/mdp3/
H A Dmdp_reg_tdshp.h10 #define MDP_HIST_CFG_00 (0x064)
11 #define MDP_HIST_CFG_01 (0x068)
12 #define MDP_TDSHP_CTRL (0x100)
13 #define MDP_TDSHP_CFG (0x110)
14 #define MDP_TDSHP_INPUT_SIZE (0x120)
15 #define MDP_TDSHP_OUTPUT_OFFSET (0x124)
16 #define MDP_TDSHP_OUTPUT_SIZE (0x128)
17 #define MDP_LUMA_HIST_INIT (0x200)
18 #define MDP_DC_TWO_D_W1_RESULT_INIT (0x260)
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H A Dmdp_reg_rdma.h10 #define MDP_RDMA_EN 0x000
11 #define MDP_RDMA_RESET 0x008
12 #define MDP_RDMA_CON 0x020
13 #define MDP_RDMA_GMCIF_CON 0x028
14 #define MDP_RDMA_SRC_CON 0x030
15 #define MDP_RDMA_MF_BKGD_SIZE_IN_BYTE 0x060
16 #define MDP_RDMA_MF_BKGD_SIZE_IN_PXL 0x068
17 #define MDP_RDMA_MF_SRC_SIZE 0x070
18 #define MDP_RDMA_MF_CLIP_SIZE 0x078
19 #define MDP_RDMA_MF_OFFSET_1 0x08
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-qserdes-txrx-ufs-v6.h9 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_TX 0x28
10 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_RX 0x2c
11 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_TX 0x30
12 #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_RX 0x34
13 #define QSERDES_UFS_V6_TX_LANE_MODE_1 0x7c
14 #define QSERDES_UFS_V6_TX_FR_DCC_CTRL 0x108
16 #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE2 0x08
17 #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE4 0x10
18 #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_SO_GAIN_RATE4 0x24
19 #define QSERDES_UFS_V6_RX_UCDR_SO_SATURATION 0x2
[all...]
H A Dphy-qcom-qmp-qserdes-txrx-ufs-v7.h9 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_TX 0x28
10 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_RX 0x2c
11 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_OFFSET_TX 0x30
12 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_OFFSET_RX 0x34
13 #define QSERDES_UFS_V7_TX_LANE_MODE_1 0x7c
14 #define QSERDES_UFS_V7_TX_FR_DCC_CTRL 0x108
16 #define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_FO_GAIN_RATE4 0x10
17 #define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_SO_GAIN_RATE4 0x24
18 #define QSERDES_UFS_V7_RX_UCDR_SO_SATURATION 0x28
19 #define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_COUNT_HIGH_RATE4 0x5
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/linux/sound/isa/sb/
H A Dsb8.c22 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
25 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */
61 return 0; in snd_sb8_match()
64 return 0; in snd_sb8_match()
68 return 0; in snd_sb8_match()
83 if (err < 0) in snd_sb8_probe()
88 * Block the 0x38 in snd_sb8_probe()
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/linux/drivers/clk/mediatek/
H A Dclk-mt8173-apmixedsys.c17 #define REGOFF_REF2USB 0x8
18 #define REGOFF_HDMI_REF 0x40
52 { .div = 0, .freq = MT8173_PLL_FMAX },
61 PLL(CLK_APMIXED_ARMCA15PLL, "armca15pll", 0x200, 0x20c, 0, PLL_AO,
62 21, 0x204, 24, 0x0, 0x204, 0),
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/linux/sound/isa/gus/
H A Dgusclassic.c27 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
30 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x230,0x240,0x250,0x260 */
34 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29};
35 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */
36 static int channels[SNDRV_CARDS] = {[0
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H A Dgusmax.c25 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
28 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x230,0x240,0x250,0x260 */
32 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29};
33 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */
34 static int channels[SNDRV_CARDS] = {[0
[all...]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8150-mdss.yaml48 "^display-controller@[0-9a-f]+$":
56 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^phy@[0-9a-f]+$":
96 reg = <0x0ae00000 0x1000>;
115 iommus = <&apps_smmu 0x800 0x420>;
123 reg = <0x0ae01000 0x8f00
[all...]
H A Dqcom,sm8250-mdss.yaml47 "^display-controller@[0-9a-f]+$":
55 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^phy@[0-9a-f]+$":
99 reg = <0x0ae00000 0x1000>;
118 iommus = <&apps_smmu 0x820 0x402>;
126 reg = <0x0ae01000 0x8f00
[all...]
H A Ddsi-phy-7nm.yaml44 Connected to VDD_A_DSI_PLL_0P9 pin (or VDDA_DSI{0,1}_PLL_0P9 for sm8150)
65 reg = <0x0ae94400 0x200>,
66 <0x0ae94600 0x280>,
67 <0x0ae94900 0x260>;
73 #phy-cells = <0>;
/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm.c27 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
32 .reg_offset = { 0x00, 0x04, 0x08, 0x0
[all...]
/linux/drivers/ufs/host/
H A Dufs-rockchip.h11 #define SEL_TX_LANE0 0x0
12 #define SEL_TX_LANE1 0x1
13 #define SEL_TX_LANE2 0x2
14 #define SEL_TX_LANE3 0x3
15 #define SEL_RX_LANE0 0x4
16 #define SEL_RX_LANE1 0x5
17 #define SEL_RX_LANE2 0x6
18 #define SEL_RX_LANE3 0x7
20 #define VND_TX_CLK_PRD 0xAA
21 #define VND_TX_CLK_PRD_EN 0xA
[all...]
/linux/Documentation/sound/
H A Dalsa-configuration.rst57 (0 = disable debug prints, 1 = normal debug messages,
71 Default: 0
80 the card #0. Similarly, when ``adsp_map=0``, /dev/adsp will be mapped
81 to PCM #0 of the card #0.
83 commas, such like ``dsp_map=0,1``.
98 Default: 0
119 Values: 0 through 31 or negative;
142 appearing card. They can do it by specifying "index=1,0" modul
[all...]
/linux/sound/isa/es1688/
H A Des1688.c31 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
37 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */
38 static long fm_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* Usually 0x388 */
39 static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
42 static int dma8[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */
70 #define is_isapnp_selected(dev) 0
82 static const long possible_ports[] = {0x22 in snd_es1688_legacy_create()
[all...]
/linux/Documentation/dev-tools/
H A Dkcsan.rst32 write to 0xffffffffc009a628 of 8 bytes by task 487 on cpu 0:
33 test_kernel_write+0x1d/0x30
34 access_thread+0x89/0xd0
35 kthread+0x23e/0x260
36 ret_from_fork+0x2
[all...]
/linux/drivers/pinctrl/
H A Dpinctrl-pic32.h12 #define ANSEL_REG 0x00
13 #define TRIS_REG 0x10
14 #define PORT_REG 0x20
15 #define LAT_REG 0x30
16 #define ODCU_REG 0x40
17 #define CNPU_REG 0x50
18 #define CNPD_REG 0x60
19 #define CNCON_REG 0x70
20 #define CNEN_REG 0x80
21 #define CNSTAT_REG 0x9
[all...]
/linux/drivers/gpu/drm/hisilicon/hibmc/dp/
H A Ddp_reg.h7 #define HIBMC_DP_AUX_CMD_ADDR 0x50
9 #define HIBMC_DP_AUX_WR_DATA0 0x54
10 #define HIBMC_DP_AUX_WR_DATA1 0x58
11 #define HIBMC_DP_AUX_WR_DATA2 0x5c
12 #define HIBMC_DP_AUX_WR_DATA3 0x60
13 #define HIBMC_DP_AUX_RD_DATA0 0x64
15 #define HIBMC_DP_AUX_REQ 0x74
16 #define HIBMC_DP_CFG_AUX_REQ BIT(0)
21 #define HIBMC_DP_AUX_STATUS 0x78
22 #define HIBMC_DP_CFG_AUX_TIMEOUT BIT(0)
[all...]
/linux/Documentation/sound/cards/
H A Dmultisound.sh77 # 0x250, 0x260 or 0x270. This port can be disabled to have the card
96 # to obtain one with the command `pnpdump 1 0x203' -- this may vary
107 # io base 0x210, irq 5 and mem 0xd8000, and also sets the Kurzweil
108 # synth to 0x330 and irq 9 (may need editing for your system):
110 # (READPORT 0x0203)
115 # (CONFIGURE BVJ0440/-1 (LD 0
[all...]
/linux/drivers/devfreq/event/
H A Dexynos-ppmu.h13 PPMU_DISABLE = 0,
18 PPMU_PMNCNT0 = 0,
30 PPMU_RO_BUSY_CYCLE_CNT = 0x0,
31 PPMU_WO_BUSY_CYCLE_CNT = 0x1,
32 PPMU_RW_BUSY_CYCLE_CNT = 0x2,
33 PPMU_RO_REQUEST_CNT = 0x3,
34 PPMU_WO_REQUEST_CNT = 0x4,
35 PPMU_RO_DATA_CNT = 0x5,
36 PPMU_WO_DATA_CNT = 0x6,
37 PPMU_RO_LATENCY = 0x1
[all...]
/linux/arch/arm/include/asm/
H A Dv7m.h5 #define V7M_SCS_ICTR IOMEM(0xe000e004)
6 #define V7M_SCS_ICTR_INTLINESNUM_MASK 0x0000000f
8 #define BASEADDR_V7M_SCB IOMEM(0xe000ed00)
10 #define V7M_SCB_CPUID 0x00
12 #define V7M_SCB_ICSR 0x04
16 #define V7M_SCB_ICSR_VECTACTIVE 0x000001ff
18 #define V7M_SCB_VTOR 0x08
20 #define V7M_SCB_AIRCR 0x0c
21 #define V7M_SCB_AIRCR_VECTKEY (0x05fa << 16)
24 #define V7M_SCB_SCR 0x1
[all...]
/linux/tools/perf/arch/powerpc/util/
H A Dbook3s_hcalls.h9 {0x4, "H_REMOVE"}, \
10 {0x8, "H_ENTER"}, \
11 {0xc, "H_READ"}, \
12 {0x10, "H_CLEAR_MOD"}, \
13 {0x14, "H_CLEAR_REF"}, \
14 {0x18, "H_PROTECT"}, \
15 {0x1c, "H_GET_TCE"}, \
16 {0x20, "H_PUT_TCE"}, \
17 {0x24, "H_SET_SPRG0"}, \
18 {0x2
[all...]

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