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Searched +full:0 +full:x20120000 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/mfd/
H A Drsmu_i2c.c24 #define RSMU_CM_PAGE_ADDR 0xFC
25 #define RSMU_CM_PAGE_MASK 0xFFFFFF00
26 #define RSMU_CM_ADDRESS_MASK 0x000000FF
32 #define RSMU_SABRE_PAGE_ADDR 0x7F
39 .range_min = 0,
40 .range_max = 0x400,
42 .selector_mask = 0xFF,
43 .selector_shift = 0,
44 .window_start = 0,
73 return 0; in rsmu_smbus_i2c_read_device()
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H A Drsmu_spi.c20 #define RSMU_CM_PAGE_ADDR 0x7C
21 #define RSMU_SABRE_PAGE_ADDR 0x7F
22 #define RSMU_PAGE_MASK 0xFFFFFF80
23 #define RSMU_ADDR_MASK 0x7F
28 struct spi_transfer xfer = {0}; in rsmu_read_device()
30 u8 cmd[RSMU_MAX_READ_COUNT + 1] = {0}; in rsmu_read_device()
31 u8 rsp[RSMU_MAX_READ_COUNT + 1] = {0}; in rsmu_read_device()
37 cmd[0] = reg | 0x80; in rsmu_read_device()
49 * you get one back at the same time. Example read from 0xC02 in rsmu_read_device()
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/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-dynamic-replicator.yaml97 reg = <0x20120000 0x1000>;
104 #size-cells = <0>;
107 port@0 {
108 reg = <0>;
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi15 #size-cells = <0>;
18 cpu0: cpu@0 {
24 reg = <0>;
189 #clock-cells = <0>;
194 mboxes = <&mbox 0>;
199 #clock-cells = <0>;
211 reg = <0x0 0x2010000 0x0 0x100
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/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi12 reg = <0x0 0x2a810000 0x0 0x10000>;
15 ranges = <0 0x0 0x2a820000 0x20000>;
20 reg = <0x10000 0x1000
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62a-main.dtsi11 reg = <0x00 0x70000000 0x00 0x10000>;
14 ranges = <0x0 0x00 0x70000000 0x10000>;
19 reg = <0x00 0x0180000
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H A Dk3-am62p-j722s-common-main.dtsi22 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
23 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
24 <0x01 0x0000000
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H A Dk3-am62-main.dtsi11 reg = <0x00 0x70000000 0x00 0x10000>;
14 ranges = <0x0 0x00 0x70000000 0x10000>;
24 reg = <0x00 0x0180000
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_hsi.h17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0
25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0
33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
42 #define PIN_CFG_NA 0x00000000
43 #define PIN_CFG_GPIO0_P0 0x00000001
44 #define PIN_CFG_GPIO1_P0 0x0000000
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