Searched +full:0 +full:x0c300000 (Results 1 – 17 of 17) sorted by relevance
/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,aoss-qmp.yaml | 71 const: 0 107 reg = <0x0c300000 0x100000>; 109 mboxes = <&apss_shared 0>; 111 #clock-cells = <0>;
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8996.dtsi | 30 #clock-cells = <0>; 37 #clock-cells = <0>; 45 #size-cells = <0>; 47 cpu0: cpu@0 { 50 reg = <0x0 0x0>; 54 clocks = <&kryocc 0>; 69 reg = <0x0 0x1>; 73 clocks = <&kryocc 0>; [all...] |
H A D | qcs615.dtsi | 23 #size-cells = <0>; 25 cpu0: cpu@0 { 28 reg = <0x0 0x0>; 48 reg = <0x0 0x100>; 67 reg = <0x0 0x200>; 86 reg = <0x0 0x30 [all...] |
H A D | sm6350.dtsi | 35 #clock-cells = <0>; 43 #clock-cells = <0>; 49 #size-cells = <0>; 51 cpu0: cpu@0 { 54 reg = <0x0 0x0>; 55 clocks = <&cpufreq_hw 0>; 60 qcom,freq-domain = <&cpufreq_hw 0>; 84 reg = <0x0 0x10 [all...] |
H A D | sm8750.dtsi | 29 #size-cells = <0>; 31 cpu0: cpu@0 { 34 reg = <0x0 0x0>; 50 reg = <0x0 0x100>; 60 reg = <0x0 0x200>; 70 reg = <0x0 0x30 [all...] |
H A D | sar2130p.dtsi | 34 #clock-cells = <0>; 40 #clock-cells = <0>; 47 #size-cells = <0>; 49 cpu0: cpu@0 { 52 reg = <0x0 0x0>; 53 clocks = <&cpufreq_hw 0>; 56 qcom,freq-domain = <&cpufreq_hw 0>; 78 reg = <0x0 0x10 [all...] |
H A D | sc8180x.dtsi | 31 #clock-cells = <0>; 37 #clock-cells = <0>; 45 #size-cells = <0>; 47 cpu0: cpu@0 { 50 reg = <0x0 0x0>; 54 qcom,freq-domain = <&cpufreq_hw 0>; 61 clocks = <&cpufreq_hw 0>; 79 reg = <0x0 0x10 [all...] |
H A D | sm8350.dtsi | 40 #clock-cells = <0>; 48 #clock-cells = <0>; 54 #size-cells = <0>; 56 cpu0: cpu@0 { 59 reg = <0x0 0x0>; 60 clocks = <&cpufreq_hw 0>; 63 qcom,freq-domain = <&cpufreq_hw 0>; 83 reg = <0x0 0x10 [all...] |
H A D | sc7180.dtsi | 67 #clock-cells = <0>; 73 #clock-cells = <0>; 79 #size-cells = <0>; 81 cpu0: cpu@0 { 84 reg = <0x0 0x0>; 85 clocks = <&cpufreq_hw 0>; 96 qcom,freq-domain = <&cpufreq_hw 0>; 113 reg = <0x0 0x10 [all...] |
H A D | sm8150.dtsi | 35 #clock-cells = <0>; 42 #clock-cells = <0>; 50 #size-cells = <0>; 52 cpu0: cpu@0 { 55 reg = <0x0 0x0>; 56 clocks = <&cpufreq_hw 0>; 61 qcom,freq-domain = <&cpufreq_hw 0>; 63 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |
H A D | qcs8300.dtsi | 30 #clock-cells = <0>; 36 #clock-cells = <0>; 43 #size-cells = <0>; 45 cpu0: cpu@0 { 48 reg = <0x0 0x0>; 55 qcom,freq-domain = <&cpufreq_hw 0>; 68 reg = <0x0 0x100>; 75 qcom,freq-domain = <&cpufreq_hw 0>; [all...] |
H A D | sdm845.dtsi | 79 #clock-cells = <0>; 86 #clock-cells = <0>; 93 #size-cells = <0>; 95 cpu0: cpu@0 { 98 reg = <0x0 0x0>; 99 clocks = <&cpufreq_hw 0>; 103 qcom,freq-domain = <&cpufreq_hw 0>; 127 reg = <0x0 0x10 [all...] |
H A D | sc8280xp.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #size-cells = <0>; 47 cpu0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 58 qcom,freq-domain = <&cpufreq_hw 0>; 78 reg = <0x0 0x10 [all...] |
H A D | sm8250.dtsi | 81 #clock-cells = <0>; 89 #clock-cells = <0>; 95 #size-cells = <0>; 97 cpu0: cpu@0 { 100 reg = <0x0 0x0>; 101 clocks = <&cpufreq_hw 0>; 108 qcom,freq-domain = <&cpufreq_hw 0>; 110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |
H A D | sm8550.dtsi | 40 #clock-cells = <0>; 45 #clock-cells = <0>; 49 #clock-cells = <0>; 57 #clock-cells = <0>; 67 #size-cells = <0>; 69 cpu0: cpu@0 { 72 reg = <0 0>; 73 clocks = <&cpufreq_hw 0>; 78 qcom,freq-domain = <&cpufreq_hw 0>; [all...] |
H A D | sc7280.dtsi | 83 #clock-cells = <0>; 89 #clock-cells = <0>; 100 reg = <0x0 0x004cd000 0x0 0x1000>; 104 reg = <0x0 0x80000000 0x0 0x60000 [all...] |
H A D | x1e80100.dtsi | 37 #clock-cells = <0>; 43 #clock-cells = <0>; 48 #clock-cells = <0>; 57 #clock-cells = <0>; 67 #size-cells = <0>; 69 cpu0: cpu@0 { 72 reg = <0x0 0x0>; 75 power-domains = <&cpu_pd0>, <&scmi_dvfs 0>; 89 reg = <0x [all...] |