Searched +full:0 +full:x0ae96900 (Results 1 – 7 of 7) sorted by relevance
48 "^display-controller@[0-9a-f]+$":56 "^displayport-controller@[0-9a-f]+$":65 "^dsi@[0-9a-f]+$":75 "^phy@[0-9a-f]+$":96 reg = <0x0ae00000 0x1000>;115 iommus = <&apps_smmu 0x800 0x420>;123 reg = <0x0ae01000 0x8f00[all...]
47 "^display-controller@[0-9a-f]+$":55 "^displayport-controller@[0-9a-f]+$":65 "^dsi@[0-9a-f]+$":75 "^phy@[0-9a-f]+$":99 reg = <0x0ae00000 0x1000>;118 iommus = <&apps_smmu 0x820 0x402>;126 reg = <0x0ae01000 0x8f00[all...]
38 "^display-controller@[0-9a-f]+$":46 "^displayport-controller@[0-9a-f]+$":55 "^dsi@[0-9a-f]+$":63 "^phy@[0-9a-f]+$":90 reg = <0x0ae00000 0x1000>;111 iommus = <&apps_smmu 0x1000 0x402>;119 reg = <0x0ae01000 0x8f00[all...]
31 #clock-cells = <0>;37 #clock-cells = <0>;45 #size-cells = <0>;47 cpu0: cpu@0 {50 reg = <0x0 0x0>;54 qcom,freq-domain = <&cpufreq_hw 0>;61 clocks = <&cpufreq_hw 0>;79 reg = <0x0 0x10[all...]
40 #clock-cells = <0>;48 #clock-cells = <0>;54 #size-cells = <0>;56 cpu0: cpu@0 {59 reg = <0x0 0x0>;60 clocks = <&cpufreq_hw 0>;63 qcom,freq-domain = <&cpufreq_hw 0>;83 reg = <0x0 0x10[all...]
35 #clock-cells = <0>;42 #clock-cells = <0>;50 #size-cells = <0>;52 cpu0: cpu@0 {55 reg = <0x0 0x0>;56 clocks = <&cpufreq_hw 0>;61 qcom,freq-domain = <&cpufreq_hw 0>;63 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,[all...]
81 #clock-cells = <0>;89 #clock-cells = <0>;95 #size-cells = <0>;97 cpu0: cpu@0 {100 reg = <0x0 0x0>;101 clocks = <&cpufreq_hw 0>;108 qcom,freq-domain = <&cpufreq_hw 0>;110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,[all...]