Searched +full:0 +full:x02000000 (Results 1 – 25 of 827) sorted by relevance
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23 memory@0 {24 reg = <0x00000000 0x08000000>; // 128MB30 cell-index = <0>;61 phy0: ethernet-phy@0 {62 reg = <0>;69 reg = <0x51>;73 reg = <0x52>;80 interrupt-map-mask = <0xf800 0 [all...]
30 size = <0 0x1000000>;31 alignment = <0 0x1000000>;34 size = <0 0x400000>;35 alignment = <0 0x400000>;38 size = <0 0x200000[all...]
17 #size-cells = <0>;19 PowerPC,8536@0 {21 reg = <0>;28 reg = <0 0 0 0>; // Filled by U-Boot32 reg = <0 0xffe05000 0 [all...]
17 #size-cells = <0>;19 PowerPC,8536@0 {21 reg = <0>;28 reg = <0 0 0 0>; // Filled by U-Boot32 reg = <0xf 0xffe05000 0 [all...]
48 size = <0 0x1000000>;49 alignment = <0 0x1000000>;52 size = <0 0x400000>;53 alignment = <0 0x400000>;56 size = <0 0x200000[all...]
27 size = <0 0x1000000>;28 alignment = <0 0x1000000>;31 size = <0 0x400000>;32 alignment = <0 0x400000>;35 size = <0 0x200000[all...]
42 size = <0 0x1000000>;43 alignment = <0 0x1000000>;46 size = <0 0x400000>;47 alignment = <0 0x400000>;50 size = <0 0x200000[all...]
68 size = <0 0x1000000>;69 alignment = <0 0x1000000>;72 size = <0 0x400000>;73 alignment = <0 0x400000>;76 size = <0 0x200000[all...]
56 reg = <0xf 0xfe124000 0 0x2000>;57 ranges = <0 0 0xf 0xe8000000 0x0800000058 2 0 [all...]
50 size = <0 0x1000000>;51 alignment = <0 0x1000000>;55 size = <0 0x400000>;56 alignment = <0 0x400000>;60 size = <0 0x200000[all...]
67 size = <0 0x1000000>;68 alignment = <0 0x1000000>;71 size = <0 0x400000>;72 alignment = <0 0x400000>;75 size = <0 0x200000[all...]
74 size = <0 0x1000000>;75 alignment = <0 0x1000000>;78 size = <0 0x400000>;79 alignment = <0 0x400000>;82 size = <0 0x200000[all...]
54 size = <0 0x1000000>;55 alignment = <0 0x1000000>;59 size = <0 0x400000>;60 alignment = <0 0x400000>;64 size = <0 0x200000[all...]
80 size = <0 0x1000000>;81 alignment = <0 0x1000000>;84 size = <0 0x400000>;85 alignment = <0 0x400000>;88 size = <0 0x200000[all...]
25 reg = <0x0 0x40000000>; // set by uboot29 reg = <0xfef05000 0x1000>;31 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash32 1 0 0xe000000[all...]
83 reg = <0xf 0xfe124000 0 0x2000>;84 ranges = <0 0 0xf 0xe8000000 0x0800000085 2 0 [all...]
7 http://0x04.net/cgit/index.cgi/rules-ng-ng8 git clone git://0x04.net/rules-ng-ng43 #define PIPE_ID_PIPE_3D 0x0000000044 #define PIPE_ID_PIPE_2D 0x0000000145 #define SYNC_RECIPIENT_FE 0x0000000146 #define SYNC_RECIPIENT_RA 0x0000000547 #define SYNC_RECIPIENT_PE 0x0000000748 #define SYNC_RECIPIENT_DE 0x0000000b49 #define SYNC_RECIPIENT_BLT 0x0000001050 #define ENDIAN_MODE_NO_SWAP 0x0000000[all...]
155 reg = <0xff000000 0x01000000>;161 ranges = <0 0xff000000 0x01000000>;163 fs@0 {165 reg = <0 0xf80000>;169 reg = <0xf80000 0x8000[all...]
12 #define E1000_IVAR_VALID 0x8015 #define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */16 #define E1000_RXD_STAT_EOP 0x02 /* End of Packet */17 #define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */18 #define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */19 #define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */20 #define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */21 #define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */22 #define E1000_RXD_ERR_SE 0x02 /* Symbol Error */23 #define E1000_RXD_SPC_VLAN_MASK 0x0FF[all...]