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Searched +full:0 +full:x01200000 (Results 1 – 7 of 7) sorted by relevance

/linux/include/linux/
H A Dsizes.h10 #define SZ_1 0x00000001
11 #define SZ_2 0x00000002
12 #define SZ_4 0x00000004
13 #define SZ_8 0x00000008
14 #define SZ_16 0x00000010
15 #define SZ_32 0x00000020
16 #define SZ_64 0x00000040
17 #define SZ_128 0x00000080
18 #define SZ_256 0x00000100
19 #define SZ_512 0x0000020
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/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml310 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
311 <0 0x0120000
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/linux/drivers/media/platform/chips-media/wave5/
H A Dwave5-vpuerror.h18 #define WAVE5_SYSERR_QUEUEING_FAIL 0x00000001
19 #define WAVE5_SYSERR_ACCESS_VIOLATION_HW 0x00000040
20 #define WAVE5_SYSERR_BUS_ERROR 0x00000200
21 #define WAVE5_SYSERR_DOUBLE_FAULT 0x00000400
22 #define WAVE5_SYSERR_RESULT_NOT_READY 0x00000800
23 #define WAVE5_SYSERR_VPU_STILL_RUNNING 0x00001000
24 #define WAVE5_SYSERR_UNKNOWN_CMD 0x00002000
25 #define WAVE5_SYSERR_UNKNOWN_CODEC_STD 0x00004000
26 #define WAVE5_SYSERR_UNKNOWN_QUERY_OPTION 0x00008000
27 #define WAVE5_SYSERR_VLC_BUF_FULL 0x0001000
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/linux/arch/arm/probes/
H A Ddecode.h42 if (pcv & 0x1) { in bx_write_pc()
44 pcv &= ~0x1; in bx_write_pc()
47 pcv &= ~0x2; /* Avoid UNPREDICTABLE address allignment */ in bx_write_pc()
107 * if P (bit 24) == 0 or W (bit 21) == 1
109 #define is_writeback(insn) ((insn ^ 0x01000000) & 0x01200000)
189 * REGS(0, ANY, NOPC, 0, ANY)
197 * bits 3.. 0 an
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/linux/sound/soc/renesas/rcar/
H A Dsrc.c52 for ((i) = 0; \
70 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_activation()
77 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_halt()
99 return 0; in rsnd_src_convert_rate()
121 unsigned int rate = 0; in rsnd_src_get_rate()
149 0x01800000, /* 6 - 1/6 */
150 0x01000000, /* 6 - 1/4 */
151 0x00c00000, /* 6 - 1/3 */
152 0x00800000, /* 6 - 1/2 */
153 0x0060000
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/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a83t.dtsi62 #size-cells = <0>;
64 cpu0: cpu@0 {
71 reg = <0>;
115 reg = <0x100>;
126 reg = <0x101>;
137 reg = <0x102>;
148 reg = <0x103>;
168 #clock-cells = <0>;
181 #clock-cells = <0>;
188 #clock-cells = <0>;
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/linux/arch/arm64/boot/dts/qcom/
H A Dsdm845.dtsi79 #clock-cells = <0>;
86 #clock-cells = <0>;
93 #size-cells = <0>;
95 cpu0: cpu@0 {
98 reg = <0x0 0x0>;
99 clocks = <&cpufreq_hw 0>;
103 qcom,freq-domain = <&cpufreq_hw 0>;
127 reg = <0x0 0x10
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