1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AMD Memory Encryption Support
4 *
5 * Copyright (C) 2019 SUSE
6 *
7 * Author: Joerg Roedel <jroedel@suse.de>
8 */
9
10 #define pr_fmt(fmt) "SEV: " fmt
11
12 #include <linux/sched/debug.h> /* For show_regs() */
13 #include <linux/cc_platform.h>
14 #include <linux/printk.h>
15 #include <linux/mm_types.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/io.h>
19 #include <linux/psp-sev.h>
20 #include <linux/efi.h>
21 #include <uapi/linux/sev-guest.h>
22
23 #include <asm/init.h>
24 #include <asm/stacktrace.h>
25 #include <asm/sev.h>
26 #include <asm/sev-internal.h>
27 #include <asm/insn-eval.h>
28 #include <asm/fpu/xcr.h>
29 #include <asm/processor.h>
30 #include <asm/setup.h>
31 #include <asm/traps.h>
32 #include <asm/svm.h>
33 #include <asm/smp.h>
34 #include <asm/cpu.h>
35 #include <asm/apic.h>
36 #include <asm/cpuid/api.h>
37
vc_slow_virt_to_phys(struct ghcb * ghcb,struct es_em_ctxt * ctxt,unsigned long vaddr,phys_addr_t * paddr)38 static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
39 unsigned long vaddr, phys_addr_t *paddr)
40 {
41 unsigned long va = (unsigned long)vaddr;
42 unsigned int level;
43 phys_addr_t pa;
44 pgd_t *pgd;
45 pte_t *pte;
46
47 pgd = __va(read_cr3_pa());
48 pgd = &pgd[pgd_index(va)];
49 pte = lookup_address_in_pgd(pgd, va, &level);
50 if (!pte) {
51 ctxt->fi.vector = X86_TRAP_PF;
52 ctxt->fi.cr2 = vaddr;
53 ctxt->fi.error_code = 0;
54
55 if (user_mode(ctxt->regs))
56 ctxt->fi.error_code |= X86_PF_USER;
57
58 return ES_EXCEPTION;
59 }
60
61 if (WARN_ON_ONCE(pte_val(*pte) & _PAGE_ENC))
62 /* Emulated MMIO to/from encrypted memory not supported */
63 return ES_UNSUPPORTED;
64
65 pa = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
66 pa |= va & ~page_level_mask(level);
67
68 *paddr = pa;
69
70 return ES_OK;
71 }
72
vc_ioio_check(struct es_em_ctxt * ctxt,u16 port,size_t size)73 static enum es_result vc_ioio_check(struct es_em_ctxt *ctxt, u16 port, size_t size)
74 {
75 BUG_ON(size > 4);
76
77 if (user_mode(ctxt->regs)) {
78 struct thread_struct *t = ¤t->thread;
79 struct io_bitmap *iobm = t->io_bitmap;
80 size_t idx;
81
82 if (!iobm)
83 goto fault;
84
85 for (idx = port; idx < port + size; ++idx) {
86 if (test_bit(idx, iobm->bitmap))
87 goto fault;
88 }
89 }
90
91 return ES_OK;
92
93 fault:
94 ctxt->fi.vector = X86_TRAP_GP;
95 ctxt->fi.error_code = 0;
96
97 return ES_EXCEPTION;
98 }
99
vc_forward_exception(struct es_em_ctxt * ctxt)100 void vc_forward_exception(struct es_em_ctxt *ctxt)
101 {
102 long error_code = ctxt->fi.error_code;
103 int trapnr = ctxt->fi.vector;
104
105 ctxt->regs->orig_ax = ctxt->fi.error_code;
106
107 switch (trapnr) {
108 case X86_TRAP_GP:
109 exc_general_protection(ctxt->regs, error_code);
110 break;
111 case X86_TRAP_UD:
112 exc_invalid_op(ctxt->regs);
113 break;
114 case X86_TRAP_PF:
115 write_cr2(ctxt->fi.cr2);
116 exc_page_fault(ctxt->regs, error_code);
117 break;
118 case X86_TRAP_AC:
119 exc_alignment_check(ctxt->regs, error_code);
120 break;
121 default:
122 pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n");
123 BUG();
124 }
125 }
126
vc_fetch_insn_kernel(struct es_em_ctxt * ctxt,unsigned char * buffer)127 static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,
128 unsigned char *buffer)
129 {
130 return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE);
131 }
132
__vc_decode_user_insn(struct es_em_ctxt * ctxt)133 static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt)
134 {
135 char buffer[MAX_INSN_SIZE];
136 int insn_bytes;
137
138 insn_bytes = insn_fetch_from_user_inatomic(ctxt->regs, buffer);
139 if (insn_bytes == 0) {
140 /* Nothing could be copied */
141 ctxt->fi.vector = X86_TRAP_PF;
142 ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER;
143 ctxt->fi.cr2 = ctxt->regs->ip;
144 return ES_EXCEPTION;
145 } else if (insn_bytes == -EINVAL) {
146 /* Effective RIP could not be calculated */
147 ctxt->fi.vector = X86_TRAP_GP;
148 ctxt->fi.error_code = 0;
149 ctxt->fi.cr2 = 0;
150 return ES_EXCEPTION;
151 }
152
153 if (!insn_decode_from_regs(&ctxt->insn, ctxt->regs, buffer, insn_bytes))
154 return ES_DECODE_FAILED;
155
156 if (ctxt->insn.immediate.got)
157 return ES_OK;
158 else
159 return ES_DECODE_FAILED;
160 }
161
__vc_decode_kern_insn(struct es_em_ctxt * ctxt)162 static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt)
163 {
164 char buffer[MAX_INSN_SIZE];
165 int res, ret;
166
167 res = vc_fetch_insn_kernel(ctxt, buffer);
168 if (res) {
169 ctxt->fi.vector = X86_TRAP_PF;
170 ctxt->fi.error_code = X86_PF_INSTR;
171 ctxt->fi.cr2 = ctxt->regs->ip;
172 return ES_EXCEPTION;
173 }
174
175 ret = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE, INSN_MODE_64);
176 if (ret < 0)
177 return ES_DECODE_FAILED;
178 else
179 return ES_OK;
180 }
181
182 /*
183 * User instruction decoding is also required for the EFI runtime. Even though
184 * the EFI runtime is running in kernel mode, it uses special EFI virtual
185 * address mappings that require the use of efi_mm to properly address and
186 * decode.
187 */
vc_decode_insn(struct es_em_ctxt * ctxt)188 static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)
189 {
190 if (user_mode(ctxt->regs) || mm_is_efi(current->active_mm))
191 return __vc_decode_user_insn(ctxt);
192 else
193 return __vc_decode_kern_insn(ctxt);
194 }
195
vc_write_mem(struct es_em_ctxt * ctxt,char * dst,char * buf,size_t size)196 static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,
197 char *dst, char *buf, size_t size)
198 {
199 unsigned long error_code = X86_PF_PROT | X86_PF_WRITE;
200
201 /*
202 * This function uses __put_user() independent of whether kernel or user
203 * memory is accessed. This works fine because __put_user() does no
204 * sanity checks of the pointer being accessed. All that it does is
205 * to report when the access failed.
206 *
207 * Also, this function runs in atomic context, so __put_user() is not
208 * allowed to sleep. The page-fault handler detects that it is running
209 * in atomic context and will not try to take mmap_sem and handle the
210 * fault, so additional pagefault_enable()/disable() calls are not
211 * needed.
212 *
213 * The access can't be done via copy_to_user() here because
214 * vc_write_mem() must not use string instructions to access unsafe
215 * memory. The reason is that MOVS is emulated by the #VC handler by
216 * splitting the move up into a read and a write and taking a nested #VC
217 * exception on whatever of them is the MMIO access. Using string
218 * instructions here would cause infinite nesting.
219 */
220 switch (size) {
221 case 1: {
222 u8 d1;
223 u8 __user *target = (u8 __user *)dst;
224
225 memcpy(&d1, buf, 1);
226 if (__put_user(d1, target))
227 goto fault;
228 break;
229 }
230 case 2: {
231 u16 d2;
232 u16 __user *target = (u16 __user *)dst;
233
234 memcpy(&d2, buf, 2);
235 if (__put_user(d2, target))
236 goto fault;
237 break;
238 }
239 case 4: {
240 u32 d4;
241 u32 __user *target = (u32 __user *)dst;
242
243 memcpy(&d4, buf, 4);
244 if (__put_user(d4, target))
245 goto fault;
246 break;
247 }
248 case 8: {
249 u64 d8;
250 u64 __user *target = (u64 __user *)dst;
251
252 memcpy(&d8, buf, 8);
253 if (__put_user(d8, target))
254 goto fault;
255 break;
256 }
257 default:
258 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
259 return ES_UNSUPPORTED;
260 }
261
262 return ES_OK;
263
264 fault:
265 if (user_mode(ctxt->regs))
266 error_code |= X86_PF_USER;
267
268 ctxt->fi.vector = X86_TRAP_PF;
269 ctxt->fi.error_code = error_code;
270 ctxt->fi.cr2 = (unsigned long)dst;
271
272 return ES_EXCEPTION;
273 }
274
vc_read_mem(struct es_em_ctxt * ctxt,char * src,char * buf,size_t size)275 static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,
276 char *src, char *buf, size_t size)
277 {
278 unsigned long error_code = X86_PF_PROT;
279
280 /*
281 * This function uses __get_user() independent of whether kernel or user
282 * memory is accessed. This works fine because __get_user() does no
283 * sanity checks of the pointer being accessed. All that it does is
284 * to report when the access failed.
285 *
286 * Also, this function runs in atomic context, so __get_user() is not
287 * allowed to sleep. The page-fault handler detects that it is running
288 * in atomic context and will not try to take mmap_sem and handle the
289 * fault, so additional pagefault_enable()/disable() calls are not
290 * needed.
291 *
292 * The access can't be done via copy_from_user() here because
293 * vc_read_mem() must not use string instructions to access unsafe
294 * memory. The reason is that MOVS is emulated by the #VC handler by
295 * splitting the move up into a read and a write and taking a nested #VC
296 * exception on whatever of them is the MMIO access. Using string
297 * instructions here would cause infinite nesting.
298 */
299 switch (size) {
300 case 1: {
301 u8 d1;
302 u8 __user *s = (u8 __user *)src;
303
304 if (__get_user(d1, s))
305 goto fault;
306 memcpy(buf, &d1, 1);
307 break;
308 }
309 case 2: {
310 u16 d2;
311 u16 __user *s = (u16 __user *)src;
312
313 if (__get_user(d2, s))
314 goto fault;
315 memcpy(buf, &d2, 2);
316 break;
317 }
318 case 4: {
319 u32 d4;
320 u32 __user *s = (u32 __user *)src;
321
322 if (__get_user(d4, s))
323 goto fault;
324 memcpy(buf, &d4, 4);
325 break;
326 }
327 case 8: {
328 u64 d8;
329 u64 __user *s = (u64 __user *)src;
330 if (__get_user(d8, s))
331 goto fault;
332 memcpy(buf, &d8, 8);
333 break;
334 }
335 default:
336 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
337 return ES_UNSUPPORTED;
338 }
339
340 return ES_OK;
341
342 fault:
343 if (user_mode(ctxt->regs))
344 error_code |= X86_PF_USER;
345
346 ctxt->fi.vector = X86_TRAP_PF;
347 ctxt->fi.error_code = error_code;
348 ctxt->fi.cr2 = (unsigned long)src;
349
350 return ES_EXCEPTION;
351 }
352
353 #define sev_printk(fmt, ...) printk(fmt, ##__VA_ARGS__)
354
355 #include "vc-shared.c"
356
357 /* Writes to the SVSM CAA MSR are ignored */
__vc_handle_msr_caa(struct pt_regs * regs,bool write)358 static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write)
359 {
360 if (write)
361 return ES_OK;
362
363 regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa));
364 regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa));
365
366 return ES_OK;
367 }
368
369 /*
370 * TSC related accesses should not exit to the hypervisor when a guest is
371 * executing with Secure TSC enabled, so special handling is required for
372 * accesses of MSR_IA32_TSC and MSR_AMD64_GUEST_TSC_FREQ.
373 */
__vc_handle_secure_tsc_msrs(struct es_em_ctxt * ctxt,bool write)374 static enum es_result __vc_handle_secure_tsc_msrs(struct es_em_ctxt *ctxt, bool write)
375 {
376 struct pt_regs *regs = ctxt->regs;
377 u64 tsc;
378
379 /*
380 * Writing to MSR_IA32_TSC can cause subsequent reads of the TSC to
381 * return undefined values, and GUEST_TSC_FREQ is read-only. Generate
382 * a #GP on all writes.
383 */
384 if (write) {
385 ctxt->fi.vector = X86_TRAP_GP;
386 ctxt->fi.error_code = 0;
387 return ES_EXCEPTION;
388 }
389
390 /*
391 * GUEST_TSC_FREQ read should not be intercepted when Secure TSC is
392 * enabled. Terminate the guest if a read is attempted.
393 */
394 if (regs->cx == MSR_AMD64_GUEST_TSC_FREQ)
395 return ES_VMM_ERROR;
396
397 /* Reads of MSR_IA32_TSC should return the current TSC value. */
398 tsc = rdtsc_ordered();
399 regs->ax = lower_32_bits(tsc);
400 regs->dx = upper_32_bits(tsc);
401
402 return ES_OK;
403 }
404
vc_handle_msr(struct ghcb * ghcb,struct es_em_ctxt * ctxt)405 static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
406 {
407 struct pt_regs *regs = ctxt->regs;
408 enum es_result ret;
409 bool write;
410
411 /* Is it a WRMSR? */
412 write = ctxt->insn.opcode.bytes[1] == 0x30;
413
414 switch (regs->cx) {
415 case MSR_SVSM_CAA:
416 return __vc_handle_msr_caa(regs, write);
417 case MSR_IA32_TSC:
418 case MSR_AMD64_GUEST_TSC_FREQ:
419 if (sev_status & MSR_AMD64_SNP_SECURE_TSC)
420 return __vc_handle_secure_tsc_msrs(ctxt, write);
421 break;
422 default:
423 break;
424 }
425
426 ghcb_set_rcx(ghcb, regs->cx);
427 if (write) {
428 ghcb_set_rax(ghcb, regs->ax);
429 ghcb_set_rdx(ghcb, regs->dx);
430 }
431
432 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, write, 0);
433
434 if ((ret == ES_OK) && !write) {
435 regs->ax = ghcb->save.rax;
436 regs->dx = ghcb->save.rdx;
437 }
438
439 return ret;
440 }
441
vc_early_forward_exception(struct es_em_ctxt * ctxt)442 static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt)
443 {
444 int trapnr = ctxt->fi.vector;
445
446 if (trapnr == X86_TRAP_PF)
447 native_write_cr2(ctxt->fi.cr2);
448
449 ctxt->regs->orig_ax = ctxt->fi.error_code;
450 do_early_exception(ctxt->regs, trapnr);
451 }
452
vc_insn_get_rm(struct es_em_ctxt * ctxt)453 static long *vc_insn_get_rm(struct es_em_ctxt *ctxt)
454 {
455 long *reg_array;
456 int offset;
457
458 reg_array = (long *)ctxt->regs;
459 offset = insn_get_modrm_rm_off(&ctxt->insn, ctxt->regs);
460
461 if (offset < 0)
462 return NULL;
463
464 offset /= sizeof(long);
465
466 return reg_array + offset;
467 }
vc_do_mmio(struct ghcb * ghcb,struct es_em_ctxt * ctxt,unsigned int bytes,bool read)468 static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
469 unsigned int bytes, bool read)
470 {
471 u64 exit_code, exit_info_1, exit_info_2;
472 unsigned long ghcb_pa = __pa(ghcb);
473 enum es_result res;
474 phys_addr_t paddr;
475 void __user *ref;
476
477 ref = insn_get_addr_ref(&ctxt->insn, ctxt->regs);
478 if (ref == (void __user *)-1L)
479 return ES_UNSUPPORTED;
480
481 exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE;
482
483 res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &paddr);
484 if (res != ES_OK) {
485 if (res == ES_EXCEPTION && !read)
486 ctxt->fi.error_code |= X86_PF_WRITE;
487
488 return res;
489 }
490
491 exit_info_1 = paddr;
492 /* Can never be greater than 8 */
493 exit_info_2 = bytes;
494
495 ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer));
496
497 return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2);
498 }
499
500 /*
501 * The MOVS instruction has two memory operands, which raises the
502 * problem that it is not known whether the access to the source or the
503 * destination caused the #VC exception (and hence whether an MMIO read
504 * or write operation needs to be emulated).
505 *
506 * Instead of playing games with walking page-tables and trying to guess
507 * whether the source or destination is an MMIO range, split the move
508 * into two operations, a read and a write with only one memory operand.
509 * This will cause a nested #VC exception on the MMIO address which can
510 * then be handled.
511 *
512 * This implementation has the benefit that it also supports MOVS where
513 * source _and_ destination are MMIO regions.
514 *
515 * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a
516 * rare operation. If it turns out to be a performance problem the split
517 * operations can be moved to memcpy_fromio() and memcpy_toio().
518 */
vc_handle_mmio_movs(struct es_em_ctxt * ctxt,unsigned int bytes)519 static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt,
520 unsigned int bytes)
521 {
522 unsigned long ds_base, es_base;
523 unsigned char *src, *dst;
524 unsigned char buffer[8];
525 enum es_result ret;
526 bool rep;
527 int off;
528
529 ds_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_DS);
530 es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
531
532 if (ds_base == -1L || es_base == -1L) {
533 ctxt->fi.vector = X86_TRAP_GP;
534 ctxt->fi.error_code = 0;
535 return ES_EXCEPTION;
536 }
537
538 src = ds_base + (unsigned char *)ctxt->regs->si;
539 dst = es_base + (unsigned char *)ctxt->regs->di;
540
541 ret = vc_read_mem(ctxt, src, buffer, bytes);
542 if (ret != ES_OK)
543 return ret;
544
545 ret = vc_write_mem(ctxt, dst, buffer, bytes);
546 if (ret != ES_OK)
547 return ret;
548
549 if (ctxt->regs->flags & X86_EFLAGS_DF)
550 off = -bytes;
551 else
552 off = bytes;
553
554 ctxt->regs->si += off;
555 ctxt->regs->di += off;
556
557 rep = insn_has_rep_prefix(&ctxt->insn);
558 if (rep)
559 ctxt->regs->cx -= 1;
560
561 if (!rep || ctxt->regs->cx == 0)
562 return ES_OK;
563 else
564 return ES_RETRY;
565 }
566
vc_handle_mmio(struct ghcb * ghcb,struct es_em_ctxt * ctxt)567 static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
568 {
569 struct insn *insn = &ctxt->insn;
570 enum insn_mmio_type mmio;
571 unsigned int bytes = 0;
572 enum es_result ret;
573 u8 sign_byte;
574 long *reg_data;
575
576 mmio = insn_decode_mmio(insn, &bytes);
577 if (mmio == INSN_MMIO_DECODE_FAILED)
578 return ES_DECODE_FAILED;
579
580 if (mmio != INSN_MMIO_WRITE_IMM && mmio != INSN_MMIO_MOVS) {
581 reg_data = insn_get_modrm_reg_ptr(insn, ctxt->regs);
582 if (!reg_data)
583 return ES_DECODE_FAILED;
584 }
585
586 if (user_mode(ctxt->regs))
587 return ES_UNSUPPORTED;
588
589 switch (mmio) {
590 case INSN_MMIO_WRITE:
591 memcpy(ghcb->shared_buffer, reg_data, bytes);
592 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
593 break;
594 case INSN_MMIO_WRITE_IMM:
595 memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes);
596 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
597 break;
598 case INSN_MMIO_READ:
599 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
600 if (ret)
601 break;
602
603 /* Zero-extend for 32-bit operation */
604 if (bytes == 4)
605 *reg_data = 0;
606
607 memcpy(reg_data, ghcb->shared_buffer, bytes);
608 break;
609 case INSN_MMIO_READ_ZERO_EXTEND:
610 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
611 if (ret)
612 break;
613
614 /* Zero extend based on operand size */
615 memset(reg_data, 0, insn->opnd_bytes);
616 memcpy(reg_data, ghcb->shared_buffer, bytes);
617 break;
618 case INSN_MMIO_READ_SIGN_EXTEND:
619 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
620 if (ret)
621 break;
622
623 if (bytes == 1) {
624 u8 *val = (u8 *)ghcb->shared_buffer;
625
626 sign_byte = (*val & 0x80) ? 0xff : 0x00;
627 } else {
628 u16 *val = (u16 *)ghcb->shared_buffer;
629
630 sign_byte = (*val & 0x8000) ? 0xff : 0x00;
631 }
632
633 /* Sign extend based on operand size */
634 memset(reg_data, sign_byte, insn->opnd_bytes);
635 memcpy(reg_data, ghcb->shared_buffer, bytes);
636 break;
637 case INSN_MMIO_MOVS:
638 ret = vc_handle_mmio_movs(ctxt, bytes);
639 break;
640 default:
641 ret = ES_UNSUPPORTED;
642 break;
643 }
644
645 return ret;
646 }
647
vc_handle_dr7_write(struct ghcb * ghcb,struct es_em_ctxt * ctxt)648 static enum es_result vc_handle_dr7_write(struct ghcb *ghcb,
649 struct es_em_ctxt *ctxt)
650 {
651 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
652 long val, *reg = vc_insn_get_rm(ctxt);
653 enum es_result ret;
654
655 if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP)
656 return ES_VMM_ERROR;
657
658 if (!reg)
659 return ES_DECODE_FAILED;
660
661 val = *reg;
662
663 /* Upper 32 bits must be written as zeroes */
664 if (val >> 32) {
665 ctxt->fi.vector = X86_TRAP_GP;
666 ctxt->fi.error_code = 0;
667 return ES_EXCEPTION;
668 }
669
670 /* Clear out other reserved bits and set bit 10 */
671 val = (val & 0xffff23ffL) | BIT(10);
672
673 /* Early non-zero writes to DR7 are not supported */
674 if (!data && (val & ~DR7_RESET_VALUE))
675 return ES_UNSUPPORTED;
676
677 /* Using a value of 0 for ExitInfo1 means RAX holds the value */
678 ghcb_set_rax(ghcb, val);
679 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);
680 if (ret != ES_OK)
681 return ret;
682
683 if (data)
684 data->dr7 = val;
685
686 return ES_OK;
687 }
688
vc_handle_dr7_read(struct ghcb * ghcb,struct es_em_ctxt * ctxt)689 static enum es_result vc_handle_dr7_read(struct ghcb *ghcb,
690 struct es_em_ctxt *ctxt)
691 {
692 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
693 long *reg = vc_insn_get_rm(ctxt);
694
695 if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP)
696 return ES_VMM_ERROR;
697
698 if (!reg)
699 return ES_DECODE_FAILED;
700
701 if (data)
702 *reg = data->dr7;
703 else
704 *reg = DR7_RESET_VALUE;
705
706 return ES_OK;
707 }
708
vc_handle_wbinvd(struct ghcb * ghcb,struct es_em_ctxt * ctxt)709 static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,
710 struct es_em_ctxt *ctxt)
711 {
712 return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0);
713 }
714
vc_handle_rdpmc(struct ghcb * ghcb,struct es_em_ctxt * ctxt)715 static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
716 {
717 enum es_result ret;
718
719 ghcb_set_rcx(ghcb, ctxt->regs->cx);
720
721 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0);
722 if (ret != ES_OK)
723 return ret;
724
725 if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb)))
726 return ES_VMM_ERROR;
727
728 ctxt->regs->ax = ghcb->save.rax;
729 ctxt->regs->dx = ghcb->save.rdx;
730
731 return ES_OK;
732 }
733
vc_handle_monitor(struct ghcb * ghcb,struct es_em_ctxt * ctxt)734 static enum es_result vc_handle_monitor(struct ghcb *ghcb,
735 struct es_em_ctxt *ctxt)
736 {
737 /*
738 * Treat it as a NOP and do not leak a physical address to the
739 * hypervisor.
740 */
741 return ES_OK;
742 }
743
vc_handle_mwait(struct ghcb * ghcb,struct es_em_ctxt * ctxt)744 static enum es_result vc_handle_mwait(struct ghcb *ghcb,
745 struct es_em_ctxt *ctxt)
746 {
747 /* Treat the same as MONITOR/MONITORX */
748 return ES_OK;
749 }
750
vc_handle_vmmcall(struct ghcb * ghcb,struct es_em_ctxt * ctxt)751 static enum es_result vc_handle_vmmcall(struct ghcb *ghcb,
752 struct es_em_ctxt *ctxt)
753 {
754 enum es_result ret;
755
756 ghcb_set_rax(ghcb, ctxt->regs->ax);
757 ghcb_set_cpl(ghcb, user_mode(ctxt->regs) ? 3 : 0);
758
759 if (x86_platform.hyper.sev_es_hcall_prepare)
760 x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs);
761
762 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0);
763 if (ret != ES_OK)
764 return ret;
765
766 if (!ghcb_rax_is_valid(ghcb))
767 return ES_VMM_ERROR;
768
769 ctxt->regs->ax = ghcb->save.rax;
770
771 /*
772 * Call sev_es_hcall_finish() after regs->ax is already set.
773 * This allows the hypervisor handler to overwrite it again if
774 * necessary.
775 */
776 if (x86_platform.hyper.sev_es_hcall_finish &&
777 !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt->regs))
778 return ES_VMM_ERROR;
779
780 return ES_OK;
781 }
782
vc_handle_trap_ac(struct ghcb * ghcb,struct es_em_ctxt * ctxt)783 static enum es_result vc_handle_trap_ac(struct ghcb *ghcb,
784 struct es_em_ctxt *ctxt)
785 {
786 /*
787 * Calling ecx_alignment_check() directly does not work, because it
788 * enables IRQs and the GHCB is active. Forward the exception and call
789 * it later from vc_forward_exception().
790 */
791 ctxt->fi.vector = X86_TRAP_AC;
792 ctxt->fi.error_code = 0;
793 return ES_EXCEPTION;
794 }
795
vc_handle_exitcode(struct es_em_ctxt * ctxt,struct ghcb * ghcb,unsigned long exit_code)796 static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
797 struct ghcb *ghcb,
798 unsigned long exit_code)
799 {
800 enum es_result result = vc_check_opcode_bytes(ctxt, exit_code);
801
802 if (result != ES_OK)
803 return result;
804
805 switch (exit_code) {
806 case SVM_EXIT_READ_DR7:
807 result = vc_handle_dr7_read(ghcb, ctxt);
808 break;
809 case SVM_EXIT_WRITE_DR7:
810 result = vc_handle_dr7_write(ghcb, ctxt);
811 break;
812 case SVM_EXIT_EXCP_BASE + X86_TRAP_AC:
813 result = vc_handle_trap_ac(ghcb, ctxt);
814 break;
815 case SVM_EXIT_RDTSC:
816 case SVM_EXIT_RDTSCP:
817 result = vc_handle_rdtsc(ghcb, ctxt, exit_code);
818 break;
819 case SVM_EXIT_RDPMC:
820 result = vc_handle_rdpmc(ghcb, ctxt);
821 break;
822 case SVM_EXIT_INVD:
823 pr_err_ratelimited("#VC exception for INVD??? Seriously???\n");
824 result = ES_UNSUPPORTED;
825 break;
826 case SVM_EXIT_CPUID:
827 result = vc_handle_cpuid(ghcb, ctxt);
828 break;
829 case SVM_EXIT_IOIO:
830 result = vc_handle_ioio(ghcb, ctxt);
831 break;
832 case SVM_EXIT_MSR:
833 result = vc_handle_msr(ghcb, ctxt);
834 break;
835 case SVM_EXIT_VMMCALL:
836 result = vc_handle_vmmcall(ghcb, ctxt);
837 break;
838 case SVM_EXIT_WBINVD:
839 result = vc_handle_wbinvd(ghcb, ctxt);
840 break;
841 case SVM_EXIT_MONITOR:
842 result = vc_handle_monitor(ghcb, ctxt);
843 break;
844 case SVM_EXIT_MWAIT:
845 result = vc_handle_mwait(ghcb, ctxt);
846 break;
847 case SVM_EXIT_NPF:
848 result = vc_handle_mmio(ghcb, ctxt);
849 break;
850 default:
851 /*
852 * Unexpected #VC exception
853 */
854 result = ES_UNSUPPORTED;
855 }
856
857 return result;
858 }
859
is_vc2_stack(unsigned long sp)860 static __always_inline bool is_vc2_stack(unsigned long sp)
861 {
862 return (sp >= __this_cpu_ist_bottom_va(VC2) && sp < __this_cpu_ist_top_va(VC2));
863 }
864
vc_from_invalid_context(struct pt_regs * regs)865 static __always_inline bool vc_from_invalid_context(struct pt_regs *regs)
866 {
867 unsigned long sp, prev_sp;
868
869 sp = (unsigned long)regs;
870 prev_sp = regs->sp;
871
872 /*
873 * If the code was already executing on the VC2 stack when the #VC
874 * happened, let it proceed to the normal handling routine. This way the
875 * code executing on the VC2 stack can cause #VC exceptions to get handled.
876 */
877 return is_vc2_stack(sp) && !is_vc2_stack(prev_sp);
878 }
879
vc_raw_handle_exception(struct pt_regs * regs,unsigned long error_code)880 static bool vc_raw_handle_exception(struct pt_regs *regs, unsigned long error_code)
881 {
882 struct ghcb_state state;
883 struct es_em_ctxt ctxt;
884 enum es_result result;
885 struct ghcb *ghcb;
886 bool ret = true;
887
888 ghcb = __sev_get_ghcb(&state);
889
890 vc_ghcb_invalidate(ghcb);
891 result = vc_init_em_ctxt(&ctxt, regs, error_code);
892
893 if (result == ES_OK)
894 result = vc_handle_exitcode(&ctxt, ghcb, error_code);
895
896 __sev_put_ghcb(&state);
897
898 /* Done - now check the result */
899 switch (result) {
900 case ES_OK:
901 vc_finish_insn(&ctxt);
902 break;
903 case ES_UNSUPPORTED:
904 pr_err_ratelimited("Unsupported exit-code 0x%02lx in #VC exception (IP: 0x%lx)\n",
905 error_code, regs->ip);
906 ret = false;
907 break;
908 case ES_VMM_ERROR:
909 pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
910 error_code, regs->ip);
911 ret = false;
912 break;
913 case ES_DECODE_FAILED:
914 pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
915 error_code, regs->ip);
916 ret = false;
917 break;
918 case ES_EXCEPTION:
919 vc_forward_exception(&ctxt);
920 break;
921 case ES_RETRY:
922 /* Nothing to do */
923 break;
924 default:
925 pr_emerg("Unknown result in %s():%d\n", __func__, result);
926 /*
927 * Emulating the instruction which caused the #VC exception
928 * failed - can't continue so print debug information
929 */
930 BUG();
931 }
932
933 return ret;
934 }
935
vc_is_db(unsigned long error_code)936 static __always_inline bool vc_is_db(unsigned long error_code)
937 {
938 return error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB;
939 }
940
941 /*
942 * Runtime #VC exception handler when raised from kernel mode. Runs in NMI mode
943 * and will panic when an error happens.
944 */
DEFINE_IDTENTRY_VC_KERNEL(exc_vmm_communication)945 DEFINE_IDTENTRY_VC_KERNEL(exc_vmm_communication)
946 {
947 irqentry_state_t irq_state;
948
949 /*
950 * With the current implementation it is always possible to switch to a
951 * safe stack because #VC exceptions only happen at known places, like
952 * intercepted instructions or accesses to MMIO areas/IO ports. They can
953 * also happen with code instrumentation when the hypervisor intercepts
954 * #DB, but the critical paths are forbidden to be instrumented, so #DB
955 * exceptions currently also only happen in safe places.
956 *
957 * But keep this here in case the noinstr annotations are violated due
958 * to bug elsewhere.
959 */
960 if (unlikely(vc_from_invalid_context(regs))) {
961 instrumentation_begin();
962 panic("Can't handle #VC exception from unsupported context\n");
963 instrumentation_end();
964 }
965
966 /*
967 * Handle #DB before calling into !noinstr code to avoid recursive #DB.
968 */
969 if (vc_is_db(error_code)) {
970 exc_debug(regs);
971 return;
972 }
973
974 irq_state = irqentry_nmi_enter(regs);
975
976 instrumentation_begin();
977
978 if (!vc_raw_handle_exception(regs, error_code)) {
979 /* Show some debug info */
980 show_regs(regs);
981
982 /* Ask hypervisor to sev_es_terminate */
983 sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
984
985 /* If that fails and we get here - just panic */
986 panic("Returned from Terminate-Request to Hypervisor\n");
987 }
988
989 instrumentation_end();
990 irqentry_nmi_exit(regs, irq_state);
991 }
992
993 /*
994 * Runtime #VC exception handler when raised from user mode. Runs in IRQ mode
995 * and will kill the current task with SIGBUS when an error happens.
996 */
DEFINE_IDTENTRY_VC_USER(exc_vmm_communication)997 DEFINE_IDTENTRY_VC_USER(exc_vmm_communication)
998 {
999 /*
1000 * Handle #DB before calling into !noinstr code to avoid recursive #DB.
1001 */
1002 if (vc_is_db(error_code)) {
1003 noist_exc_debug(regs);
1004 return;
1005 }
1006
1007 irqentry_enter_from_user_mode(regs);
1008 instrumentation_begin();
1009
1010 if (!vc_raw_handle_exception(regs, error_code)) {
1011 /*
1012 * Do not kill the machine if user-space triggered the
1013 * exception. Send SIGBUS instead and let user-space deal with
1014 * it.
1015 */
1016 force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0);
1017 }
1018
1019 instrumentation_end();
1020 irqentry_exit_to_user_mode(regs);
1021 }
1022
handle_vc_boot_ghcb(struct pt_regs * regs)1023 bool __init handle_vc_boot_ghcb(struct pt_regs *regs)
1024 {
1025 unsigned long exit_code = regs->orig_ax;
1026 struct es_em_ctxt ctxt;
1027 enum es_result result;
1028
1029 vc_ghcb_invalidate(boot_ghcb);
1030
1031 result = vc_init_em_ctxt(&ctxt, regs, exit_code);
1032 if (result == ES_OK)
1033 result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code);
1034
1035 /* Done - now check the result */
1036 switch (result) {
1037 case ES_OK:
1038 vc_finish_insn(&ctxt);
1039 break;
1040 case ES_UNSUPPORTED:
1041 early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
1042 exit_code, regs->ip);
1043 goto fail;
1044 case ES_VMM_ERROR:
1045 early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
1046 exit_code, regs->ip);
1047 goto fail;
1048 case ES_DECODE_FAILED:
1049 early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
1050 exit_code, regs->ip);
1051 goto fail;
1052 case ES_EXCEPTION:
1053 vc_early_forward_exception(&ctxt);
1054 break;
1055 case ES_RETRY:
1056 /* Nothing to do */
1057 break;
1058 default:
1059 BUG();
1060 }
1061
1062 return true;
1063
1064 fail:
1065 show_regs(regs);
1066
1067 sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
1068 }
1069
1070