1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for NeoMagic 256AV and 256ZX chipsets.
4 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
5 *
6 * Based on nm256_audio.c OSS driver in linux kernel.
7 * The original author of OSS nm256 driver wishes to remain anonymous,
8 * so I just put my acknoledgment to him/her here.
9 * The original author's web page is found at
10 * http://www.uglx.org/sony.html
11 */
12
13 #include <linux/io.h>
14 #include <linux/delay.h>
15 #include <linux/interrupt.h>
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/slab.h>
19 #include <linux/module.h>
20 #include <linux/mutex.h>
21
22 #include <sound/core.h>
23 #include <sound/info.h>
24 #include <sound/control.h>
25 #include <sound/pcm.h>
26 #include <sound/ac97_codec.h>
27 #include <sound/initval.h>
28
29 #define CARD_NAME "NeoMagic 256AV/ZX"
30 #define DRIVER_NAME "NM256"
31
32 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
33 MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
34 MODULE_LICENSE("GPL");
35
36 /*
37 * some compile conditions.
38 */
39
40 static int index = SNDRV_DEFAULT_IDX1; /* Index */
41 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
42 static int playback_bufsize = 16;
43 static int capture_bufsize = 16;
44 static bool force_ac97; /* disabled as default */
45 static int buffer_top; /* not specified */
46 static bool use_cache; /* disabled */
47 static bool vaio_hack; /* disabled */
48 static bool reset_workaround;
49 static bool reset_workaround_2;
50
51 module_param(index, int, 0444);
52 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
53 module_param(id, charp, 0444);
54 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
55 module_param(playback_bufsize, int, 0444);
56 MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
57 module_param(capture_bufsize, int, 0444);
58 MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
59 module_param(force_ac97, bool, 0444);
60 MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
61 module_param(buffer_top, int, 0444);
62 MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
63 module_param(use_cache, bool, 0444);
64 MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
65 module_param(vaio_hack, bool, 0444);
66 MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
67 module_param(reset_workaround, bool, 0444);
68 MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
69 module_param(reset_workaround_2, bool, 0444);
70 MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
71
72 /* just for backward compatibility */
73 static bool enable;
74 module_param(enable, bool, 0444);
75
76
77
78 /*
79 * hw definitions
80 */
81
82 /* The BIOS signature. */
83 #define NM_SIGNATURE 0x4e4d0000
84 /* Signature mask. */
85 #define NM_SIG_MASK 0xffff0000
86
87 /* Size of the second memory area. */
88 #define NM_PORT2_SIZE 4096
89
90 /* The base offset of the mixer in the second memory area. */
91 #define NM_MIXER_OFFSET 0x600
92
93 /* The maximum size of a coefficient entry. */
94 #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
95 #define NM_MAX_RECORD_COEF_SIZE 0x1260
96
97 /* The interrupt register. */
98 #define NM_INT_REG 0xa04
99 /* And its bits. */
100 #define NM_PLAYBACK_INT 0x40
101 #define NM_RECORD_INT 0x100
102 #define NM_MISC_INT_1 0x4000
103 #define NM_MISC_INT_2 0x1
104 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
105
106 /* The AV's "mixer ready" status bit and location. */
107 #define NM_MIXER_STATUS_OFFSET 0xa04
108 #define NM_MIXER_READY_MASK 0x0800
109 #define NM_MIXER_PRESENCE 0xa06
110 #define NM_PRESENCE_MASK 0x0050
111 #define NM_PRESENCE_VALUE 0x0040
112
113 /*
114 * For the ZX. It uses the same interrupt register, but it holds 32
115 * bits instead of 16.
116 */
117 #define NM2_PLAYBACK_INT 0x10000
118 #define NM2_RECORD_INT 0x80000
119 #define NM2_MISC_INT_1 0x8
120 #define NM2_MISC_INT_2 0x2
121 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
122
123 /* The ZX's "mixer ready" status bit and location. */
124 #define NM2_MIXER_STATUS_OFFSET 0xa06
125 #define NM2_MIXER_READY_MASK 0x0800
126
127 /* The playback registers start from here. */
128 #define NM_PLAYBACK_REG_OFFSET 0x0
129 /* The record registers start from here. */
130 #define NM_RECORD_REG_OFFSET 0x200
131
132 /* The rate register is located 2 bytes from the start of the register area. */
133 #define NM_RATE_REG_OFFSET 2
134
135 /* Mono/stereo flag, number of bits on playback, and rate mask. */
136 #define NM_RATE_STEREO 1
137 #define NM_RATE_BITS_16 2
138 #define NM_RATE_MASK 0xf0
139
140 /* Playback enable register. */
141 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
142 #define NM_PLAYBACK_ENABLE_FLAG 1
143 #define NM_PLAYBACK_ONESHOT 2
144 #define NM_PLAYBACK_FREERUN 4
145
146 /* Mutes the audio output. */
147 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
148 #define NM_AUDIO_MUTE_LEFT 0x8000
149 #define NM_AUDIO_MUTE_RIGHT 0x0080
150
151 /* Recording enable register. */
152 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
153 #define NM_RECORD_ENABLE_FLAG 1
154 #define NM_RECORD_FREERUN 2
155
156 /* coefficient buffer pointer */
157 #define NM_COEFF_START_OFFSET 0x1c
158 #define NM_COEFF_END_OFFSET 0x20
159
160 /* DMA buffer offsets */
161 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
162 #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
163 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
164 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
165
166 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
167 #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
168 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
169 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
170
171 struct nm256_stream {
172
173 struct nm256 *chip;
174 struct snd_pcm_substream *substream;
175 int running;
176 int suspended;
177
178 u32 buf; /* offset from chip->buffer */
179 int bufsize; /* buffer size in bytes */
180 void __iomem *bufptr; /* mapped pointer */
181 unsigned long bufptr_addr; /* physical address of the mapped pointer */
182
183 int dma_size; /* buffer size of the substream in bytes */
184 int period_size; /* period size in bytes */
185 int periods; /* # of periods */
186 int shift; /* bit shifts */
187 int cur_period; /* current period # */
188
189 };
190
191 struct nm256 {
192
193 struct snd_card *card;
194
195 void __iomem *cport; /* control port */
196 unsigned long cport_addr; /* physical address */
197
198 void __iomem *buffer; /* buffer */
199 unsigned long buffer_addr; /* buffer phyiscal address */
200
201 u32 buffer_start; /* start offset from pci resource 0 */
202 u32 buffer_end; /* end offset */
203 u32 buffer_size; /* total buffer size */
204
205 u32 all_coeff_buf; /* coefficient buffer */
206 u32 coeff_buf[2]; /* coefficient buffer for each stream */
207
208 unsigned int coeffs_current: 1; /* coeff. table is loaded? */
209 unsigned int use_cache: 1; /* use one big coef. table */
210 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
211 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
212 unsigned int in_resume: 1;
213
214 int mixer_base; /* register offset of ac97 mixer */
215 int mixer_status_offset; /* offset of mixer status reg. */
216 int mixer_status_mask; /* bit mask to test the mixer status */
217
218 int irq;
219 int irq_acks;
220 irq_handler_t interrupt;
221 int badintrcount; /* counter to check bogus interrupts */
222 struct mutex irq_mutex;
223
224 struct nm256_stream streams[2];
225
226 struct snd_ac97 *ac97;
227 unsigned short *ac97_regs; /* register caches, only for valid regs */
228
229 struct snd_pcm *pcm;
230
231 struct pci_dev *pci;
232
233 spinlock_t reg_lock;
234
235 };
236
237
238 /*
239 * include coefficient table
240 */
241 #include "nm256_coef.c"
242
243
244 /*
245 * PCI ids
246 */
247 static const struct pci_device_id snd_nm256_ids[] = {
248 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0},
249 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0},
250 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0},
251 {0,},
252 };
253
254 MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
255
256
257 /*
258 * lowlvel stuffs
259 */
260
261 static inline u8
snd_nm256_readb(struct nm256 * chip,int offset)262 snd_nm256_readb(struct nm256 *chip, int offset)
263 {
264 return readb(chip->cport + offset);
265 }
266
267 static inline u16
snd_nm256_readw(struct nm256 * chip,int offset)268 snd_nm256_readw(struct nm256 *chip, int offset)
269 {
270 return readw(chip->cport + offset);
271 }
272
273 static inline u32
snd_nm256_readl(struct nm256 * chip,int offset)274 snd_nm256_readl(struct nm256 *chip, int offset)
275 {
276 return readl(chip->cport + offset);
277 }
278
279 static inline void
snd_nm256_writeb(struct nm256 * chip,int offset,u8 val)280 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
281 {
282 writeb(val, chip->cport + offset);
283 }
284
285 static inline void
snd_nm256_writew(struct nm256 * chip,int offset,u16 val)286 snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
287 {
288 writew(val, chip->cport + offset);
289 }
290
291 static inline void
snd_nm256_writel(struct nm256 * chip,int offset,u32 val)292 snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
293 {
294 writel(val, chip->cport + offset);
295 }
296
297 static inline void
snd_nm256_write_buffer(struct nm256 * chip,const void * src,int offset,int size)298 snd_nm256_write_buffer(struct nm256 *chip, const void *src, int offset, int size)
299 {
300 offset -= chip->buffer_start;
301 #ifdef CONFIG_SND_DEBUG
302 if (offset < 0 || offset >= chip->buffer_size) {
303 dev_err(chip->card->dev,
304 "write_buffer invalid offset = %d size = %d\n",
305 offset, size);
306 return;
307 }
308 #endif
309 memcpy_toio(chip->buffer + offset, src, size);
310 }
311
312 /*
313 * coefficient handlers -- what a magic!
314 */
315
316 static u16
snd_nm256_get_start_offset(int which)317 snd_nm256_get_start_offset(int which)
318 {
319 u16 offset = 0;
320 while (which-- > 0)
321 offset += coefficient_sizes[which];
322 return offset;
323 }
324
325 static void
snd_nm256_load_one_coefficient(struct nm256 * chip,int stream,u32 port,int which)326 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
327 {
328 u32 coeff_buf = chip->coeff_buf[stream];
329 u16 offset = snd_nm256_get_start_offset(which);
330 u16 size = coefficient_sizes[which];
331
332 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
333 snd_nm256_writel(chip, port, coeff_buf);
334 /* ??? Record seems to behave differently than playback. */
335 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
336 size--;
337 snd_nm256_writel(chip, port + 4, coeff_buf + size);
338 }
339
340 static void
snd_nm256_load_coefficient(struct nm256 * chip,int stream,int number)341 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
342 {
343 /* The enable register for the specified engine. */
344 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
345 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
346 u32 addr = NM_COEFF_START_OFFSET;
347
348 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
349 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
350
351 if (snd_nm256_readb(chip, poffset) & 1) {
352 dev_dbg(chip->card->dev,
353 "NM256: Engine was enabled while loading coefficients!\n");
354 return;
355 }
356
357 /* The recording engine uses coefficient values 8-15. */
358 number &= 7;
359 if (stream == SNDRV_PCM_STREAM_CAPTURE)
360 number += 8;
361
362 if (! chip->use_cache) {
363 snd_nm256_load_one_coefficient(chip, stream, addr, number);
364 return;
365 }
366 if (! chip->coeffs_current) {
367 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
368 NM_TOTAL_COEFF_COUNT * 4);
369 chip->coeffs_current = 1;
370 } else {
371 u32 base = chip->all_coeff_buf;
372 u32 offset = snd_nm256_get_start_offset(number);
373 u32 end_offset = offset + coefficient_sizes[number];
374 snd_nm256_writel(chip, addr, base + offset);
375 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
376 end_offset--;
377 snd_nm256_writel(chip, addr + 4, base + end_offset);
378 }
379 }
380
381
382 /* The actual rates supported by the card. */
383 static const unsigned int samplerates[8] = {
384 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
385 };
386 static const struct snd_pcm_hw_constraint_list constraints_rates = {
387 .count = ARRAY_SIZE(samplerates),
388 .list = samplerates,
389 .mask = 0,
390 };
391
392 /*
393 * return the index of the target rate
394 */
395 static int
snd_nm256_fixed_rate(unsigned int rate)396 snd_nm256_fixed_rate(unsigned int rate)
397 {
398 unsigned int i;
399 for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
400 if (rate == samplerates[i])
401 return i;
402 }
403 snd_BUG();
404 return 0;
405 }
406
407 /*
408 * set sample rate and format
409 */
410 static void
snd_nm256_set_format(struct nm256 * chip,struct nm256_stream * s,struct snd_pcm_substream * substream)411 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
412 struct snd_pcm_substream *substream)
413 {
414 struct snd_pcm_runtime *runtime = substream->runtime;
415 int rate_index = snd_nm256_fixed_rate(runtime->rate);
416 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
417
418 s->shift = 0;
419 if (snd_pcm_format_width(runtime->format) == 16) {
420 ratebits |= NM_RATE_BITS_16;
421 s->shift++;
422 }
423 if (runtime->channels > 1) {
424 ratebits |= NM_RATE_STEREO;
425 s->shift++;
426 }
427
428 runtime->rate = samplerates[rate_index];
429
430 switch (substream->stream) {
431 case SNDRV_PCM_STREAM_PLAYBACK:
432 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
433 snd_nm256_writeb(chip,
434 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
435 ratebits);
436 break;
437 case SNDRV_PCM_STREAM_CAPTURE:
438 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
439 snd_nm256_writeb(chip,
440 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
441 ratebits);
442 break;
443 }
444 }
445
446 /* acquire interrupt */
snd_nm256_acquire_irq(struct nm256 * chip)447 static int snd_nm256_acquire_irq(struct nm256 *chip)
448 {
449 guard(mutex)(&chip->irq_mutex);
450 if (chip->irq < 0) {
451 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
452 KBUILD_MODNAME, chip)) {
453 dev_err(chip->card->dev,
454 "unable to grab IRQ %d\n", chip->pci->irq);
455 return -EBUSY;
456 }
457 chip->irq = chip->pci->irq;
458 chip->card->sync_irq = chip->irq;
459 }
460 chip->irq_acks++;
461 return 0;
462 }
463
464 /* release interrupt */
snd_nm256_release_irq(struct nm256 * chip)465 static void snd_nm256_release_irq(struct nm256 *chip)
466 {
467 guard(mutex)(&chip->irq_mutex);
468 if (chip->irq_acks > 0)
469 chip->irq_acks--;
470 if (chip->irq_acks == 0 && chip->irq >= 0) {
471 free_irq(chip->irq, chip);
472 chip->irq = -1;
473 chip->card->sync_irq = -1;
474 }
475 }
476
477 /*
478 * start / stop
479 */
480
481 /* update the watermark (current period) */
snd_nm256_pcm_mark(struct nm256 * chip,struct nm256_stream * s,int reg)482 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
483 {
484 s->cur_period++;
485 s->cur_period %= s->periods;
486 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
487 }
488
489 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
490 #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
491
492 static void
snd_nm256_playback_start(struct nm256 * chip,struct nm256_stream * s,struct snd_pcm_substream * substream)493 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
494 struct snd_pcm_substream *substream)
495 {
496 /* program buffer pointers */
497 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
498 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
499 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
500 snd_nm256_playback_mark(chip, s);
501
502 /* Enable playback engine and interrupts. */
503 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
504 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
505 /* Enable both channels. */
506 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
507 }
508
509 static void
snd_nm256_capture_start(struct nm256 * chip,struct nm256_stream * s,struct snd_pcm_substream * substream)510 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
511 struct snd_pcm_substream *substream)
512 {
513 /* program buffer pointers */
514 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
515 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
516 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
517 snd_nm256_capture_mark(chip, s);
518
519 /* Enable playback engine and interrupts. */
520 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
521 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
522 }
523
524 /* Stop the play engine. */
525 static void
snd_nm256_playback_stop(struct nm256 * chip)526 snd_nm256_playback_stop(struct nm256 *chip)
527 {
528 /* Shut off sound from both channels. */
529 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
530 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
531 /* Disable play engine. */
532 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
533 }
534
535 static void
snd_nm256_capture_stop(struct nm256 * chip)536 snd_nm256_capture_stop(struct nm256 *chip)
537 {
538 /* Disable recording engine. */
539 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
540 }
541
542 static int
snd_nm256_playback_trigger(struct snd_pcm_substream * substream,int cmd)543 snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
544 {
545 struct nm256 *chip = snd_pcm_substream_chip(substream);
546 struct nm256_stream *s = substream->runtime->private_data;
547
548 if (snd_BUG_ON(!s))
549 return -ENXIO;
550
551 guard(spinlock)(&chip->reg_lock);
552 switch (cmd) {
553 case SNDRV_PCM_TRIGGER_RESUME:
554 s->suspended = 0;
555 fallthrough;
556 case SNDRV_PCM_TRIGGER_START:
557 if (! s->running) {
558 snd_nm256_playback_start(chip, s, substream);
559 s->running = 1;
560 }
561 break;
562 case SNDRV_PCM_TRIGGER_SUSPEND:
563 s->suspended = 1;
564 fallthrough;
565 case SNDRV_PCM_TRIGGER_STOP:
566 if (s->running) {
567 snd_nm256_playback_stop(chip);
568 s->running = 0;
569 }
570 break;
571 default:
572 return -EINVAL;
573 }
574 return 0;
575 }
576
577 static int
snd_nm256_capture_trigger(struct snd_pcm_substream * substream,int cmd)578 snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
579 {
580 struct nm256 *chip = snd_pcm_substream_chip(substream);
581 struct nm256_stream *s = substream->runtime->private_data;
582
583 if (snd_BUG_ON(!s))
584 return -ENXIO;
585
586 guard(spinlock)(&chip->reg_lock);
587 switch (cmd) {
588 case SNDRV_PCM_TRIGGER_START:
589 case SNDRV_PCM_TRIGGER_RESUME:
590 if (! s->running) {
591 snd_nm256_capture_start(chip, s, substream);
592 s->running = 1;
593 }
594 break;
595 case SNDRV_PCM_TRIGGER_STOP:
596 case SNDRV_PCM_TRIGGER_SUSPEND:
597 if (s->running) {
598 snd_nm256_capture_stop(chip);
599 s->running = 0;
600 }
601 break;
602 default:
603 return -EINVAL;
604 }
605 return 0;
606 }
607
608
609 /*
610 * prepare playback/capture channel
611 */
snd_nm256_pcm_prepare(struct snd_pcm_substream * substream)612 static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
613 {
614 struct nm256 *chip = snd_pcm_substream_chip(substream);
615 struct snd_pcm_runtime *runtime = substream->runtime;
616 struct nm256_stream *s = runtime->private_data;
617
618 if (snd_BUG_ON(!s))
619 return -ENXIO;
620 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
621 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
622 s->periods = substream->runtime->periods;
623 s->cur_period = 0;
624
625 guard(spinlock_irq)(&chip->reg_lock);
626 s->running = 0;
627 snd_nm256_set_format(chip, s, substream);
628
629 return 0;
630 }
631
632
633 /*
634 * get the current pointer
635 */
636 static snd_pcm_uframes_t
snd_nm256_playback_pointer(struct snd_pcm_substream * substream)637 snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
638 {
639 struct nm256 *chip = snd_pcm_substream_chip(substream);
640 struct nm256_stream *s = substream->runtime->private_data;
641 unsigned long curp;
642
643 if (snd_BUG_ON(!s))
644 return 0;
645 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
646 curp %= s->dma_size;
647 return bytes_to_frames(substream->runtime, curp);
648 }
649
650 static snd_pcm_uframes_t
snd_nm256_capture_pointer(struct snd_pcm_substream * substream)651 snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
652 {
653 struct nm256 *chip = snd_pcm_substream_chip(substream);
654 struct nm256_stream *s = substream->runtime->private_data;
655 unsigned long curp;
656
657 if (snd_BUG_ON(!s))
658 return 0;
659 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
660 curp %= s->dma_size;
661 return bytes_to_frames(substream->runtime, curp);
662 }
663
664 /* Remapped I/O space can be accessible as pointer on i386 */
665 /* This might be changed in the future */
666 #ifndef __i386__
667 /*
668 * silence / copy for playback
669 */
670 static int
snd_nm256_playback_silence(struct snd_pcm_substream * substream,int channel,unsigned long pos,unsigned long count)671 snd_nm256_playback_silence(struct snd_pcm_substream *substream,
672 int channel, unsigned long pos, unsigned long count)
673 {
674 struct snd_pcm_runtime *runtime = substream->runtime;
675 struct nm256_stream *s = runtime->private_data;
676
677 memset_io(s->bufptr + pos, 0, count);
678 return 0;
679 }
680
681 static int
snd_nm256_playback_copy(struct snd_pcm_substream * substream,int channel,unsigned long pos,struct iov_iter * src,unsigned long count)682 snd_nm256_playback_copy(struct snd_pcm_substream *substream,
683 int channel, unsigned long pos,
684 struct iov_iter *src, unsigned long count)
685 {
686 struct snd_pcm_runtime *runtime = substream->runtime;
687 struct nm256_stream *s = runtime->private_data;
688
689 if (copy_from_iter_toio(s->bufptr + pos, count, src) != count)
690 return -EFAULT;
691 return 0;
692 }
693
694 /*
695 * copy to user
696 */
697 static int
snd_nm256_capture_copy(struct snd_pcm_substream * substream,int channel,unsigned long pos,struct iov_iter * dst,unsigned long count)698 snd_nm256_capture_copy(struct snd_pcm_substream *substream,
699 int channel, unsigned long pos,
700 struct iov_iter *dst, unsigned long count)
701 {
702 struct snd_pcm_runtime *runtime = substream->runtime;
703 struct nm256_stream *s = runtime->private_data;
704
705 if (copy_to_iter_fromio(s->bufptr + pos, count, dst) != count)
706 return -EFAULT;
707 return 0;
708 }
709
710 #endif /* !__i386__ */
711
712
713 /*
714 * update playback/capture watermarks
715 */
716
717 /* spinlock held! */
718 static void
snd_nm256_playback_update(struct nm256 * chip)719 snd_nm256_playback_update(struct nm256 *chip)
720 {
721 struct nm256_stream *s;
722
723 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
724 if (s->running && s->substream) {
725 spin_unlock(&chip->reg_lock);
726 snd_pcm_period_elapsed(s->substream);
727 spin_lock(&chip->reg_lock);
728 snd_nm256_playback_mark(chip, s);
729 }
730 }
731
732 /* spinlock held! */
733 static void
snd_nm256_capture_update(struct nm256 * chip)734 snd_nm256_capture_update(struct nm256 *chip)
735 {
736 struct nm256_stream *s;
737
738 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
739 if (s->running && s->substream) {
740 spin_unlock(&chip->reg_lock);
741 snd_pcm_period_elapsed(s->substream);
742 spin_lock(&chip->reg_lock);
743 snd_nm256_capture_mark(chip, s);
744 }
745 }
746
747 /*
748 * hardware info
749 */
750 static const struct snd_pcm_hardware snd_nm256_playback =
751 {
752 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
753 SNDRV_PCM_INFO_INTERLEAVED |
754 /*SNDRV_PCM_INFO_PAUSE |*/
755 SNDRV_PCM_INFO_RESUME,
756 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
757 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
758 .rate_min = 8000,
759 .rate_max = 48000,
760 .channels_min = 1,
761 .channels_max = 2,
762 .periods_min = 2,
763 .periods_max = 1024,
764 .buffer_bytes_max = 128 * 1024,
765 .period_bytes_min = 256,
766 .period_bytes_max = 128 * 1024,
767 };
768
769 static const struct snd_pcm_hardware snd_nm256_capture =
770 {
771 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
772 SNDRV_PCM_INFO_INTERLEAVED |
773 /*SNDRV_PCM_INFO_PAUSE |*/
774 SNDRV_PCM_INFO_RESUME,
775 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
776 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
777 .rate_min = 8000,
778 .rate_max = 48000,
779 .channels_min = 1,
780 .channels_max = 2,
781 .periods_min = 2,
782 .periods_max = 1024,
783 .buffer_bytes_max = 128 * 1024,
784 .period_bytes_min = 256,
785 .period_bytes_max = 128 * 1024,
786 };
787
788
789 /* set dma transfer size */
snd_nm256_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)790 static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
791 struct snd_pcm_hw_params *hw_params)
792 {
793 /* area and addr are already set and unchanged */
794 substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
795 return 0;
796 }
797
798 /*
799 * open
800 */
snd_nm256_setup_stream(struct nm256 * chip,struct nm256_stream * s,struct snd_pcm_substream * substream,const struct snd_pcm_hardware * hw_ptr)801 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
802 struct snd_pcm_substream *substream,
803 const struct snd_pcm_hardware *hw_ptr)
804 {
805 struct snd_pcm_runtime *runtime = substream->runtime;
806
807 s->running = 0;
808 runtime->hw = *hw_ptr;
809 runtime->hw.buffer_bytes_max = s->bufsize;
810 runtime->hw.period_bytes_max = s->bufsize / 2;
811 runtime->dma_area = (void __force *) s->bufptr;
812 runtime->dma_addr = s->bufptr_addr;
813 runtime->dma_bytes = s->bufsize;
814 runtime->private_data = s;
815 s->substream = substream;
816
817 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
818 &constraints_rates);
819 }
820
821 static int
snd_nm256_playback_open(struct snd_pcm_substream * substream)822 snd_nm256_playback_open(struct snd_pcm_substream *substream)
823 {
824 struct nm256 *chip = snd_pcm_substream_chip(substream);
825
826 if (snd_nm256_acquire_irq(chip) < 0)
827 return -EBUSY;
828 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
829 substream, &snd_nm256_playback);
830 return 0;
831 }
832
833 static int
snd_nm256_capture_open(struct snd_pcm_substream * substream)834 snd_nm256_capture_open(struct snd_pcm_substream *substream)
835 {
836 struct nm256 *chip = snd_pcm_substream_chip(substream);
837
838 if (snd_nm256_acquire_irq(chip) < 0)
839 return -EBUSY;
840 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
841 substream, &snd_nm256_capture);
842 return 0;
843 }
844
845 /*
846 * close - we don't have to do special..
847 */
848 static int
snd_nm256_playback_close(struct snd_pcm_substream * substream)849 snd_nm256_playback_close(struct snd_pcm_substream *substream)
850 {
851 struct nm256 *chip = snd_pcm_substream_chip(substream);
852
853 snd_nm256_release_irq(chip);
854 return 0;
855 }
856
857
858 static int
snd_nm256_capture_close(struct snd_pcm_substream * substream)859 snd_nm256_capture_close(struct snd_pcm_substream *substream)
860 {
861 struct nm256 *chip = snd_pcm_substream_chip(substream);
862
863 snd_nm256_release_irq(chip);
864 return 0;
865 }
866
867 /*
868 * create a pcm instance
869 */
870 static const struct snd_pcm_ops snd_nm256_playback_ops = {
871 .open = snd_nm256_playback_open,
872 .close = snd_nm256_playback_close,
873 .hw_params = snd_nm256_pcm_hw_params,
874 .prepare = snd_nm256_pcm_prepare,
875 .trigger = snd_nm256_playback_trigger,
876 .pointer = snd_nm256_playback_pointer,
877 #ifndef __i386__
878 .copy = snd_nm256_playback_copy,
879 .fill_silence = snd_nm256_playback_silence,
880 #endif
881 .mmap = snd_pcm_lib_mmap_iomem,
882 };
883
884 static const struct snd_pcm_ops snd_nm256_capture_ops = {
885 .open = snd_nm256_capture_open,
886 .close = snd_nm256_capture_close,
887 .hw_params = snd_nm256_pcm_hw_params,
888 .prepare = snd_nm256_pcm_prepare,
889 .trigger = snd_nm256_capture_trigger,
890 .pointer = snd_nm256_capture_pointer,
891 #ifndef __i386__
892 .copy = snd_nm256_capture_copy,
893 #endif
894 .mmap = snd_pcm_lib_mmap_iomem,
895 };
896
897 static int
snd_nm256_pcm(struct nm256 * chip,int device)898 snd_nm256_pcm(struct nm256 *chip, int device)
899 {
900 struct snd_pcm *pcm;
901 int i, err;
902
903 for (i = 0; i < 2; i++) {
904 struct nm256_stream *s = &chip->streams[i];
905 s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
906 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
907 }
908
909 err = snd_pcm_new(chip->card, chip->card->driver, device,
910 1, 1, &pcm);
911 if (err < 0)
912 return err;
913
914 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
915 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
916
917 pcm->private_data = chip;
918 pcm->info_flags = 0;
919 chip->pcm = pcm;
920
921 return 0;
922 }
923
924
925 /*
926 * Initialize the hardware.
927 */
928 static void
snd_nm256_init_chip(struct nm256 * chip)929 snd_nm256_init_chip(struct nm256 *chip)
930 {
931 /* Reset everything. */
932 snd_nm256_writeb(chip, 0x0, 0x11);
933 snd_nm256_writew(chip, 0x214, 0);
934 /* stop sounds.. */
935 //snd_nm256_playback_stop(chip);
936 //snd_nm256_capture_stop(chip);
937 }
938
939
940 static irqreturn_t
snd_nm256_intr_check(struct nm256 * chip)941 snd_nm256_intr_check(struct nm256 *chip)
942 {
943 if (chip->badintrcount++ > 1000) {
944 /*
945 * I'm not sure if the best thing is to stop the card from
946 * playing or just release the interrupt (after all, we're in
947 * a bad situation, so doing fancy stuff may not be such a good
948 * idea).
949 *
950 * I worry about the card engine continuing to play noise
951 * over and over, however--that could become a very
952 * obnoxious problem. And we know that when this usually
953 * happens things are fairly safe, it just means the user's
954 * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
955 */
956 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
957 snd_nm256_playback_stop(chip);
958 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
959 snd_nm256_capture_stop(chip);
960 chip->badintrcount = 0;
961 return IRQ_HANDLED;
962 }
963 return IRQ_NONE;
964 }
965
966 /*
967 * Handle a potential interrupt for the device referred to by DEV_ID.
968 *
969 * I don't like the cut-n-paste job here either between the two routines,
970 * but there are sufficient differences between the two interrupt handlers
971 * that parameterizing it isn't all that great either. (Could use a macro,
972 * I suppose...yucky bleah.)
973 */
974
975 static irqreturn_t
snd_nm256_interrupt(int irq,void * dev_id)976 snd_nm256_interrupt(int irq, void *dev_id)
977 {
978 struct nm256 *chip = dev_id;
979 u16 status;
980 u8 cbyte;
981
982 status = snd_nm256_readw(chip, NM_INT_REG);
983
984 /* Not ours. */
985 if (status == 0)
986 return snd_nm256_intr_check(chip);
987
988 chip->badintrcount = 0;
989
990 /* Rather boring; check for individual interrupts and process them. */
991
992 guard(spinlock)(&chip->reg_lock);
993 if (status & NM_PLAYBACK_INT) {
994 status &= ~NM_PLAYBACK_INT;
995 NM_ACK_INT(chip, NM_PLAYBACK_INT);
996 snd_nm256_playback_update(chip);
997 }
998
999 if (status & NM_RECORD_INT) {
1000 status &= ~NM_RECORD_INT;
1001 NM_ACK_INT(chip, NM_RECORD_INT);
1002 snd_nm256_capture_update(chip);
1003 }
1004
1005 if (status & NM_MISC_INT_1) {
1006 status &= ~NM_MISC_INT_1;
1007 NM_ACK_INT(chip, NM_MISC_INT_1);
1008 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1009 snd_nm256_writew(chip, NM_INT_REG, 0x8000);
1010 cbyte = snd_nm256_readb(chip, 0x400);
1011 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1012 }
1013
1014 if (status & NM_MISC_INT_2) {
1015 status &= ~NM_MISC_INT_2;
1016 NM_ACK_INT(chip, NM_MISC_INT_2);
1017 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1018 cbyte = snd_nm256_readb(chip, 0x400);
1019 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1020 }
1021
1022 /* Unknown interrupt. */
1023 if (status) {
1024 dev_dbg(chip->card->dev,
1025 "NM256: Fire in the hole! Unknown status 0x%x\n",
1026 status);
1027 /* Pray. */
1028 NM_ACK_INT(chip, status);
1029 }
1030
1031 return IRQ_HANDLED;
1032 }
1033
1034 /*
1035 * Handle a potential interrupt for the device referred to by DEV_ID.
1036 * This handler is for the 256ZX, and is very similar to the non-ZX
1037 * routine.
1038 */
1039
1040 static irqreturn_t
snd_nm256_interrupt_zx(int irq,void * dev_id)1041 snd_nm256_interrupt_zx(int irq, void *dev_id)
1042 {
1043 struct nm256 *chip = dev_id;
1044 u32 status;
1045 u8 cbyte;
1046
1047 status = snd_nm256_readl(chip, NM_INT_REG);
1048
1049 /* Not ours. */
1050 if (status == 0)
1051 return snd_nm256_intr_check(chip);
1052
1053 chip->badintrcount = 0;
1054
1055 /* Rather boring; check for individual interrupts and process them. */
1056
1057 guard(spinlock)(&chip->reg_lock);
1058 if (status & NM2_PLAYBACK_INT) {
1059 status &= ~NM2_PLAYBACK_INT;
1060 NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
1061 snd_nm256_playback_update(chip);
1062 }
1063
1064 if (status & NM2_RECORD_INT) {
1065 status &= ~NM2_RECORD_INT;
1066 NM2_ACK_INT(chip, NM2_RECORD_INT);
1067 snd_nm256_capture_update(chip);
1068 }
1069
1070 if (status & NM2_MISC_INT_1) {
1071 status &= ~NM2_MISC_INT_1;
1072 NM2_ACK_INT(chip, NM2_MISC_INT_1);
1073 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1074 cbyte = snd_nm256_readb(chip, 0x400);
1075 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1076 }
1077
1078 if (status & NM2_MISC_INT_2) {
1079 status &= ~NM2_MISC_INT_2;
1080 NM2_ACK_INT(chip, NM2_MISC_INT_2);
1081 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1082 cbyte = snd_nm256_readb(chip, 0x400);
1083 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1084 }
1085
1086 /* Unknown interrupt. */
1087 if (status) {
1088 dev_dbg(chip->card->dev,
1089 "NM256: Fire in the hole! Unknown status 0x%x\n",
1090 status);
1091 /* Pray. */
1092 NM2_ACK_INT(chip, status);
1093 }
1094
1095 return IRQ_HANDLED;
1096 }
1097
1098 /*
1099 * AC97 interface
1100 */
1101
1102 /*
1103 * Waits for the mixer to become ready to be written; returns a zero value
1104 * if it timed out.
1105 */
1106 static int
snd_nm256_ac97_ready(struct nm256 * chip)1107 snd_nm256_ac97_ready(struct nm256 *chip)
1108 {
1109 int timeout = 10;
1110 u32 testaddr;
1111 u16 testb;
1112
1113 testaddr = chip->mixer_status_offset;
1114 testb = chip->mixer_status_mask;
1115
1116 /*
1117 * Loop around waiting for the mixer to become ready.
1118 */
1119 while (timeout-- > 0) {
1120 if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
1121 return 1;
1122 udelay(100);
1123 }
1124 return 0;
1125 }
1126
1127 /*
1128 * Initial register values to be written to the AC97 mixer.
1129 * While most of these are identical to the reset values, we do this
1130 * so that we have most of the register contents cached--this avoids
1131 * reading from the mixer directly (which seems to be problematic,
1132 * probably due to ignorance).
1133 */
1134
1135 struct initialValues {
1136 unsigned short reg;
1137 unsigned short value;
1138 };
1139
1140 static const struct initialValues nm256_ac97_init_val[] =
1141 {
1142 { AC97_MASTER, 0x8000 },
1143 { AC97_HEADPHONE, 0x8000 },
1144 { AC97_MASTER_MONO, 0x8000 },
1145 { AC97_PC_BEEP, 0x8000 },
1146 { AC97_PHONE, 0x8008 },
1147 { AC97_MIC, 0x8000 },
1148 { AC97_LINE, 0x8808 },
1149 { AC97_CD, 0x8808 },
1150 { AC97_VIDEO, 0x8808 },
1151 { AC97_AUX, 0x8808 },
1152 { AC97_PCM, 0x8808 },
1153 { AC97_REC_SEL, 0x0000 },
1154 { AC97_REC_GAIN, 0x0B0B },
1155 { AC97_GENERAL_PURPOSE, 0x0000 },
1156 { AC97_3D_CONTROL, 0x8000 },
1157 { AC97_VENDOR_ID1, 0x8384 },
1158 { AC97_VENDOR_ID2, 0x7609 },
1159 };
1160
nm256_ac97_idx(unsigned short reg)1161 static int nm256_ac97_idx(unsigned short reg)
1162 {
1163 int i;
1164 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
1165 if (nm256_ac97_init_val[i].reg == reg)
1166 return i;
1167 return -1;
1168 }
1169
1170 /*
1171 * some nm256 easily crash when reading from mixer registers
1172 * thus we're treating it as a write-only mixer and cache the
1173 * written values
1174 */
1175 static unsigned short
snd_nm256_ac97_read(struct snd_ac97 * ac97,unsigned short reg)1176 snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1177 {
1178 struct nm256 *chip = ac97->private_data;
1179 int idx = nm256_ac97_idx(reg);
1180
1181 if (idx < 0)
1182 return 0;
1183 return chip->ac97_regs[idx];
1184 }
1185
1186 /*
1187 */
1188 static void
snd_nm256_ac97_write(struct snd_ac97 * ac97,unsigned short reg,unsigned short val)1189 snd_nm256_ac97_write(struct snd_ac97 *ac97,
1190 unsigned short reg, unsigned short val)
1191 {
1192 struct nm256 *chip = ac97->private_data;
1193 int tries = 2;
1194 int idx = nm256_ac97_idx(reg);
1195 u32 base;
1196
1197 if (idx < 0)
1198 return;
1199
1200 base = chip->mixer_base;
1201
1202 snd_nm256_ac97_ready(chip);
1203
1204 /* Wait for the write to take, too. */
1205 while (tries-- > 0) {
1206 snd_nm256_writew(chip, base + reg, val);
1207 msleep(1); /* a little delay here seems better.. */
1208 if (snd_nm256_ac97_ready(chip)) {
1209 /* successful write: set cache */
1210 chip->ac97_regs[idx] = val;
1211 return;
1212 }
1213 }
1214 dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n");
1215 }
1216
1217 /* static resolution table */
1218 static const struct snd_ac97_res_table nm256_res_table[] = {
1219 { AC97_MASTER, 0x1f1f },
1220 { AC97_HEADPHONE, 0x1f1f },
1221 { AC97_MASTER_MONO, 0x001f },
1222 { AC97_PC_BEEP, 0x001f },
1223 { AC97_PHONE, 0x001f },
1224 { AC97_MIC, 0x001f },
1225 { AC97_LINE, 0x1f1f },
1226 { AC97_CD, 0x1f1f },
1227 { AC97_VIDEO, 0x1f1f },
1228 { AC97_AUX, 0x1f1f },
1229 { AC97_PCM, 0x1f1f },
1230 { AC97_REC_GAIN, 0x0f0f },
1231 { } /* terminator */
1232 };
1233
1234 /* initialize the ac97 into a known state */
1235 static void
snd_nm256_ac97_reset(struct snd_ac97 * ac97)1236 snd_nm256_ac97_reset(struct snd_ac97 *ac97)
1237 {
1238 struct nm256 *chip = ac97->private_data;
1239
1240 /* Reset the mixer. 'Tis magic! */
1241 snd_nm256_writeb(chip, 0x6c0, 1);
1242 if (! chip->reset_workaround) {
1243 /* Dell latitude LS will lock up by this */
1244 snd_nm256_writeb(chip, 0x6cc, 0x87);
1245 }
1246 if (! chip->reset_workaround_2) {
1247 /* Dell latitude CSx will lock up by this */
1248 snd_nm256_writeb(chip, 0x6cc, 0x80);
1249 snd_nm256_writeb(chip, 0x6cc, 0x0);
1250 }
1251 if (! chip->in_resume) {
1252 int i;
1253 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
1254 /* preload the cache, so as to avoid even a single
1255 * read of the mixer regs
1256 */
1257 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
1258 nm256_ac97_init_val[i].value);
1259 }
1260 }
1261 }
1262
1263 /* create an ac97 mixer interface */
1264 static int
snd_nm256_mixer(struct nm256 * chip)1265 snd_nm256_mixer(struct nm256 *chip)
1266 {
1267 struct snd_ac97_bus *pbus;
1268 struct snd_ac97_template ac97;
1269 int err;
1270 static const struct snd_ac97_bus_ops ops = {
1271 .reset = snd_nm256_ac97_reset,
1272 .write = snd_nm256_ac97_write,
1273 .read = snd_nm256_ac97_read,
1274 };
1275
1276 chip->ac97_regs = devm_kcalloc(chip->card->dev,
1277 ARRAY_SIZE(nm256_ac97_init_val),
1278 sizeof(short), GFP_KERNEL);
1279 if (! chip->ac97_regs)
1280 return -ENOMEM;
1281
1282 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
1283 if (err < 0)
1284 return err;
1285
1286 memset(&ac97, 0, sizeof(ac97));
1287 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
1288 ac97.private_data = chip;
1289 ac97.res_table = nm256_res_table;
1290 pbus->no_vra = 1;
1291 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1292 if (err < 0)
1293 return err;
1294 if (! (chip->ac97->id & (0xf0000000))) {
1295 /* looks like an invalid id */
1296 sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
1297 }
1298 return 0;
1299 }
1300
1301 /*
1302 * See if the signature left by the NM256 BIOS is intact; if so, we use
1303 * the associated address as the end of our audio buffer in the video
1304 * RAM.
1305 */
1306
1307 static int
snd_nm256_peek_for_sig(struct nm256 * chip)1308 snd_nm256_peek_for_sig(struct nm256 *chip)
1309 {
1310 /* The signature is located 1K below the end of video RAM. */
1311 void __iomem *temp;
1312 /* Default buffer end is 5120 bytes below the top of RAM. */
1313 unsigned long pointer_found = chip->buffer_end - 0x1400;
1314 u32 sig;
1315
1316 temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16);
1317 if (temp == NULL) {
1318 dev_err(chip->card->dev,
1319 "Unable to scan for card signature in video RAM\n");
1320 return -EBUSY;
1321 }
1322
1323 sig = readl(temp);
1324 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
1325 u32 pointer = readl(temp + 4);
1326
1327 /*
1328 * If it's obviously invalid, don't use it
1329 */
1330 if (pointer == 0xffffffff ||
1331 pointer < chip->buffer_size ||
1332 pointer > chip->buffer_end) {
1333 dev_err(chip->card->dev,
1334 "invalid signature found: 0x%x\n", pointer);
1335 iounmap(temp);
1336 return -ENODEV;
1337 } else {
1338 pointer_found = pointer;
1339 dev_info(chip->card->dev,
1340 "found card signature in video RAM: 0x%x\n",
1341 pointer);
1342 }
1343 }
1344
1345 iounmap(temp);
1346 chip->buffer_end = pointer_found;
1347
1348 return 0;
1349 }
1350
1351 /*
1352 * APM event handler, so the card is properly reinitialized after a power
1353 * event.
1354 */
nm256_suspend(struct device * dev)1355 static int nm256_suspend(struct device *dev)
1356 {
1357 struct snd_card *card = dev_get_drvdata(dev);
1358 struct nm256 *chip = card->private_data;
1359
1360 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1361 snd_ac97_suspend(chip->ac97);
1362 chip->coeffs_current = 0;
1363 return 0;
1364 }
1365
nm256_resume(struct device * dev)1366 static int nm256_resume(struct device *dev)
1367 {
1368 struct snd_card *card = dev_get_drvdata(dev);
1369 struct nm256 *chip = card->private_data;
1370 int i;
1371
1372 /* Perform a full reset on the hardware */
1373 chip->in_resume = 1;
1374
1375 snd_nm256_init_chip(chip);
1376
1377 /* restore ac97 */
1378 snd_ac97_resume(chip->ac97);
1379
1380 for (i = 0; i < 2; i++) {
1381 struct nm256_stream *s = &chip->streams[i];
1382 if (s->substream && s->suspended) {
1383 guard(spinlock_irq)(&chip->reg_lock);
1384 snd_nm256_set_format(chip, s, s->substream);
1385 }
1386 }
1387
1388 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1389 chip->in_resume = 0;
1390 return 0;
1391 }
1392
1393 static DEFINE_SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume);
1394
snd_nm256_free(struct snd_card * card)1395 static void snd_nm256_free(struct snd_card *card)
1396 {
1397 struct nm256 *chip = card->private_data;
1398
1399 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
1400 snd_nm256_playback_stop(chip);
1401 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
1402 snd_nm256_capture_stop(chip);
1403 }
1404
1405 static int
snd_nm256_create(struct snd_card * card,struct pci_dev * pci)1406 snd_nm256_create(struct snd_card *card, struct pci_dev *pci)
1407 {
1408 struct nm256 *chip = card->private_data;
1409 int err, pval;
1410 u32 addr;
1411
1412 err = pcim_enable_device(pci);
1413 if (err < 0)
1414 return err;
1415
1416 chip->card = card;
1417 chip->pci = pci;
1418 chip->use_cache = use_cache;
1419 spin_lock_init(&chip->reg_lock);
1420 chip->irq = -1;
1421 mutex_init(&chip->irq_mutex);
1422
1423 /* store buffer sizes in bytes */
1424 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
1425 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
1426
1427 /*
1428 * The NM256 has two memory ports. The first port is nothing
1429 * more than a chunk of video RAM, which is used as the I/O ring
1430 * buffer. The second port has the actual juicy stuff (like the
1431 * mixer and the playback engine control registers).
1432 */
1433
1434 chip->buffer_addr = pci_resource_start(pci, 0);
1435 chip->cport_addr = pci_resource_start(pci, 1);
1436
1437 err = pcim_request_all_regions(pci, card->driver);
1438 if (err < 0)
1439 return err;
1440
1441 /* Init the memory port info. */
1442 /* remap control port (#2) */
1443 chip->cport = devm_ioremap(&pci->dev, chip->cport_addr, NM_PORT2_SIZE);
1444 if (!chip->cport) {
1445 dev_err(card->dev, "unable to map control port %lx\n",
1446 chip->cport_addr);
1447 return -ENOMEM;
1448 }
1449
1450 if (!strcmp(card->driver, "NM256AV")) {
1451 /* Ok, try to see if this is a non-AC97 version of the hardware. */
1452 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
1453 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
1454 if (! force_ac97) {
1455 dev_err(card->dev,
1456 "no ac97 is found!\n");
1457 dev_err(card->dev,
1458 "force the driver to load by passing in the module parameter\n");
1459 dev_err(card->dev,
1460 " force_ac97=1\n");
1461 dev_err(card->dev,
1462 "or try sb16, opl3sa2, or cs423x drivers instead.\n");
1463 return -ENXIO;
1464 }
1465 }
1466 chip->buffer_end = 2560 * 1024;
1467 chip->interrupt = snd_nm256_interrupt;
1468 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
1469 chip->mixer_status_mask = NM_MIXER_READY_MASK;
1470 } else {
1471 /* Not sure if there is any relevant detect for the ZX or not. */
1472 if (snd_nm256_readb(chip, 0xa0b) != 0)
1473 chip->buffer_end = 6144 * 1024;
1474 else
1475 chip->buffer_end = 4096 * 1024;
1476
1477 chip->interrupt = snd_nm256_interrupt_zx;
1478 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
1479 chip->mixer_status_mask = NM2_MIXER_READY_MASK;
1480 }
1481
1482 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
1483 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1484 if (chip->use_cache)
1485 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
1486 else
1487 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
1488
1489 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
1490 chip->buffer_end = buffer_top;
1491 else {
1492 /* get buffer end pointer from signature */
1493 err = snd_nm256_peek_for_sig(chip);
1494 if (err < 0)
1495 return err;
1496 }
1497
1498 chip->buffer_start = chip->buffer_end - chip->buffer_size;
1499 chip->buffer_addr += chip->buffer_start;
1500
1501 dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n",
1502 chip->buffer_start, chip->buffer_end);
1503
1504 chip->buffer = devm_ioremap(&pci->dev, chip->buffer_addr,
1505 chip->buffer_size);
1506 if (!chip->buffer) {
1507 dev_err(card->dev, "unable to map ring buffer at %lx\n",
1508 chip->buffer_addr);
1509 return -ENOMEM;
1510 }
1511
1512 /* set offsets */
1513 addr = chip->buffer_start;
1514 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
1515 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
1516 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
1517 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1518 if (chip->use_cache) {
1519 chip->all_coeff_buf = addr;
1520 } else {
1521 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
1522 addr += NM_MAX_PLAYBACK_COEF_SIZE;
1523 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
1524 }
1525
1526 /* Fixed setting. */
1527 chip->mixer_base = NM_MIXER_OFFSET;
1528
1529 chip->coeffs_current = 0;
1530
1531 snd_nm256_init_chip(chip);
1532
1533 // pci_set_master(pci); /* needed? */
1534 return 0;
1535 }
1536
1537
1538 enum { NM_IGNORED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
1539
1540 static const struct snd_pci_quirk nm256_quirks[] = {
1541 /* HP omnibook 4150 has cs4232 codec internally */
1542 SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_IGNORED),
1543 /* Reset workarounds to avoid lock-ups */
1544 SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
1545 SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
1546 SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
1547 { } /* terminator */
1548 };
1549
1550
snd_nm256_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)1551 static int snd_nm256_probe(struct pci_dev *pci,
1552 const struct pci_device_id *pci_id)
1553 {
1554 struct snd_card *card;
1555 struct nm256 *chip;
1556 int err;
1557 const struct snd_pci_quirk *q;
1558
1559 q = snd_pci_quirk_lookup(pci, nm256_quirks);
1560 if (q) {
1561 dev_dbg(&pci->dev, "Enabled quirk for %s.\n",
1562 snd_pci_quirk_name(q));
1563 switch (q->value) {
1564 case NM_IGNORED:
1565 dev_info(&pci->dev,
1566 "The device is on the denylist. Loading stopped\n");
1567 return -ENODEV;
1568 case NM_RESET_WORKAROUND_2:
1569 reset_workaround_2 = 1;
1570 fallthrough;
1571 case NM_RESET_WORKAROUND:
1572 reset_workaround = 1;
1573 break;
1574 }
1575 }
1576
1577 err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
1578 sizeof(*chip), &card);
1579 if (err < 0)
1580 return err;
1581 chip = card->private_data;
1582
1583 switch (pci->device) {
1584 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
1585 strscpy(card->driver, "NM256AV");
1586 break;
1587 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
1588 strscpy(card->driver, "NM256ZX");
1589 break;
1590 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
1591 strscpy(card->driver, "NM256XL+");
1592 break;
1593 default:
1594 dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device);
1595 return -EINVAL;
1596 }
1597
1598 if (vaio_hack)
1599 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
1600
1601 if (playback_bufsize < 4)
1602 playback_bufsize = 4;
1603 if (playback_bufsize > 128)
1604 playback_bufsize = 128;
1605 if (capture_bufsize < 4)
1606 capture_bufsize = 4;
1607 if (capture_bufsize > 128)
1608 capture_bufsize = 128;
1609 err = snd_nm256_create(card, pci);
1610 if (err < 0)
1611 return err;
1612
1613 if (reset_workaround) {
1614 dev_dbg(&pci->dev, "reset_workaround activated\n");
1615 chip->reset_workaround = 1;
1616 }
1617
1618 if (reset_workaround_2) {
1619 dev_dbg(&pci->dev, "reset_workaround_2 activated\n");
1620 chip->reset_workaround_2 = 1;
1621 }
1622
1623 err = snd_nm256_pcm(chip, 0);
1624 if (err < 0)
1625 return err;
1626 err = snd_nm256_mixer(chip);
1627 if (err < 0)
1628 return err;
1629
1630 sprintf(card->shortname, "NeoMagic %s", card->driver);
1631 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
1632 card->shortname,
1633 chip->buffer_addr, chip->cport_addr, chip->irq);
1634
1635 err = snd_card_register(card);
1636 if (err < 0)
1637 return err;
1638 card->private_free = snd_nm256_free;
1639
1640 pci_set_drvdata(pci, card);
1641 return 0;
1642 }
1643
1644 static struct pci_driver nm256_driver = {
1645 .name = KBUILD_MODNAME,
1646 .id_table = snd_nm256_ids,
1647 .probe = snd_nm256_probe,
1648 .driver = {
1649 .pm = &nm256_pm,
1650 },
1651 };
1652
1653 module_pci_driver(nm256_driver);
1654